Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r443-smll-171701110100242.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is UtilityControlRoom-PT-Z4T4N02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r443-smll-171701110100242
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 23K Apr 13 05:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 154K Apr 13 05:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 29K Apr 13 05:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 137K Apr 13 05:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 8.0K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 34K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 16K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 50K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 46K Apr 13 05:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 278K Apr 13 05:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 74K Apr 13 05:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 312K Apr 13 05:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.2K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 65K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-00
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-01
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-02
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-03
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-04
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-05
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-06
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-07
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-08
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-09
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-10
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-11
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-12
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-13
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-14
FORMULA_NAME UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717081839162

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-PT-Z4T4N02
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-30 15:10:40] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-30 15:10:40] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-30 15:10:41] [INFO ] Load time of PNML (sax parser for PT used): 90 ms
[2024-05-30 15:10:41] [INFO ] Transformed 80 places.
[2024-05-30 15:10:41] [INFO ] Transformed 150 transitions.
[2024-05-30 15:10:41] [INFO ] Parsed PT model containing 80 places and 150 transitions and 482 arcs in 245 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 32 ms.
[2024-05-30 15:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 15:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 15:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 15:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 15:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 15:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 15:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 15:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 15:10:41] [INFO ] Reduced 6 identical enabling conditions.
Ensure Unique test removed 32 transitions
Reduce redundant transitions removed 32 transitions.
Support contains 80 out of 80 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Applied a total of 0 rules in 13 ms. Remains 80 /80 variables (removed 0) and now considering 118/118 (removed 0) transitions.
// Phase 1: matrix 118 rows 80 cols
[2024-05-30 15:10:41] [INFO ] Computed 7 invariants in 13 ms
[2024-05-30 15:10:41] [INFO ] Implicit Places using invariants in 280 ms returned []
[2024-05-30 15:10:41] [INFO ] Invariant cache hit.
[2024-05-30 15:10:41] [INFO ] Implicit Places using invariants and state equation in 236 ms returned []
Implicit Place search using SMT with State Equation took 577 ms to find 0 implicit places.
Running 116 sub problems to find dead transitions.
[2024-05-30 15:10:41] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/78 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/78 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 2 (OVERLAPS) 2/80 variables, 5/7 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/80 variables, 0/7 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 4 (OVERLAPS) 118/198 variables, 80/87 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/198 variables, 0/87 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 6 (OVERLAPS) 0/198 variables, 0/87 constraints. Problems are: Problem set: 0 solved, 116 unsolved
No progress, stopping.
After SMT solving in domain Real declared 198/198 variables, and 87 constraints, problems are : Problem set: 0 solved, 116 unsolved in 3335 ms.
Refiners :[Positive P Invariants (semi-flows): 7/7 constraints, State Equation: 80/80 constraints, PredecessorRefiner: 116/116 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 116 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/78 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/78 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 2 (OVERLAPS) 2/80 variables, 5/7 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/80 variables, 0/7 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 4 (OVERLAPS) 118/198 variables, 80/87 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/198 variables, 116/203 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/198 variables, 0/203 constraints. Problems are: Problem set: 0 solved, 116 unsolved
At refinement iteration 7 (OVERLAPS) 0/198 variables, 0/203 constraints. Problems are: Problem set: 0 solved, 116 unsolved
No progress, stopping.
After SMT solving in domain Int declared 198/198 variables, and 203 constraints, problems are : Problem set: 0 solved, 116 unsolved in 4091 ms.
Refiners :[Positive P Invariants (semi-flows): 7/7 constraints, State Equation: 80/80 constraints, PredecessorRefiner: 116/116 constraints, Known Traps: 0/0 constraints]
After SMT, in 7605ms problems are : Problem set: 0 solved, 116 unsolved
Search for dead transitions found 0 dead transitions in 7627ms
Finished structural reductions in LTL mode , in 1 iterations and 8248 ms. Remains : 80/80 places, 118/118 transitions.
Support contains 80 out of 80 places after structural reductions.
[2024-05-30 15:10:49] [INFO ] Flatten gal took : 53 ms
[2024-05-30 15:10:50] [INFO ] Flatten gal took : 37 ms
[2024-05-30 15:10:50] [INFO ] Input system was already deterministic with 118 transitions.
Reduction of identical properties reduced properties to check from 67 to 62
RANDOM walk for 40000 steps (8 resets) in 1990 ms. (20 steps per ms) remains 4/62 properties
BEST_FIRST walk for 40004 steps (8 resets) in 205 ms. (194 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40003 steps (8 resets) in 98 ms. (404 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40004 steps (8 resets) in 116 ms. (341 steps per ms) remains 4/4 properties
BEST_FIRST walk for 40003 steps (8 resets) in 75 ms. (526 steps per ms) remains 3/4 properties
[2024-05-30 15:10:51] [INFO ] Invariant cache hit.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/15 variables, 0/0 constraints. Problems are: Problem set: 0 solved, 3 unsolved
Problem AtomicPropp30 is UNSAT
Problem AtomicPropp37 is UNSAT
Problem AtomicPropp50 is UNSAT
After SMT solving in domain Real declared 80/198 variables, and 7 constraints, problems are : Problem set: 3 solved, 0 unsolved in 54 ms.
Refiners :[Positive P Invariants (semi-flows): 7/7 constraints, State Equation: 0/80 constraints, PredecessorRefiner: 3/3 constraints, Known Traps: 0/0 constraints]
After SMT, in 66ms problems are : Problem set: 3 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 3 atomic propositions for a total of 16 simplifications.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 19 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 21 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 118 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 11 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 56/80 places, 94/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 9 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 32 transitions
Trivial Post-agglo rules discarded 32 transitions
Performed 32 trivial Post agglomeration. Transition count delta: 32
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 80 transition count 86
Reduce places removed 32 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 40 rules applied. Total rules applied 72 place count 48 transition count 78
Performed 8 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 8 Pre rules applied. Total rules applied 72 place count 48 transition count 70
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 2 with 16 rules applied. Total rules applied 88 place count 40 transition count 70
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 91 place count 37 transition count 46
Iterating global reduction 2 with 3 rules applied. Total rules applied 94 place count 37 transition count 46
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 100 place count 31 transition count 40
Iterating global reduction 2 with 6 rules applied. Total rules applied 106 place count 31 transition count 40
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 112 place count 25 transition count 28
Iterating global reduction 2 with 6 rules applied. Total rules applied 118 place count 25 transition count 28
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 124 place count 19 transition count 22
Iterating global reduction 2 with 6 rules applied. Total rules applied 130 place count 19 transition count 22
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 136 place count 19 transition count 16
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 5 rules applied. Total rules applied 141 place count 16 transition count 14
Applied a total of 141 rules in 34 ms. Remains 16 /80 variables (removed 64) and now considering 14/118 (removed 104) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 34 ms. Remains : 16/80 places, 14/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 1 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 1 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 2 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 56/80 places, 94/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 118/118 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 80/80 places, 118/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Performed 32 Post agglomeration using F-continuation condition.Transition count delta: 32
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 80 transition count 86
Reduce places removed 32 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 40 rules applied. Total rules applied 72 place count 48 transition count 78
Applied a total of 72 rules in 8 ms. Remains 48 /80 variables (removed 32) and now considering 78/118 (removed 40) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 9 ms. Remains : 48/80 places, 78/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 6 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 78 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 2 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 56/80 places, 94/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 7 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 118/118 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 118/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Applied a total of 0 rules in 1 ms. Remains 80 /80 variables (removed 0) and now considering 118/118 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 80/80 places, 118/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 8 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 9 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 118 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 23 places :
Symmetric choice reduction at 0 with 23 rule applications. Total rules 23 place count 57 transition count 95
Iterating global reduction 0 with 23 rules applied. Total rules applied 46 place count 57 transition count 95
Applied a total of 46 rules in 4 ms. Remains 57 /80 variables (removed 23) and now considering 95/118 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 57/80 places, 95/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 95 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Performed 31 Post agglomeration using F-continuation condition.Transition count delta: 31
Iterating post reduction 0 with 31 rules applied. Total rules applied 31 place count 80 transition count 87
Reduce places removed 31 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 39 rules applied. Total rules applied 70 place count 49 transition count 79
Performed 6 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 6 Pre rules applied. Total rules applied 70 place count 49 transition count 73
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 2 with 12 rules applied. Total rules applied 82 place count 43 transition count 73
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 84 place count 42 transition count 72
Partial Post-agglomeration rule applied 2 times.
Drop transitions (Partial Post agglomeration) removed 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 86 place count 42 transition count 72
Applied a total of 86 rules in 15 ms. Remains 42 /80 variables (removed 38) and now considering 72/118 (removed 46) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 15 ms. Remains : 42/80 places, 72/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 4 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:10:51] [INFO ] Input system was already deterministic with 72 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 23 places :
Symmetric choice reduction at 0 with 23 rule applications. Total rules 23 place count 57 transition count 95
Iterating global reduction 0 with 23 rules applied. Total rules applied 46 place count 57 transition count 95
Applied a total of 46 rules in 4 ms. Remains 57 /80 variables (removed 23) and now considering 95/118 (removed 23) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 57/80 places, 95/118 transitions.
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:10:51] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:10:52] [INFO ] Input system was already deterministic with 95 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Performed 32 Post agglomeration using F-continuation condition.Transition count delta: 32
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 80 transition count 86
Reduce places removed 32 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 40 rules applied. Total rules applied 72 place count 48 transition count 78
Performed 8 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 8 Pre rules applied. Total rules applied 72 place count 48 transition count 70
Deduced a syphon composed of 8 places in 0 ms
Reduce places removed 8 places and 0 transitions.
Iterating global reduction 2 with 16 rules applied. Total rules applied 88 place count 40 transition count 70
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 90 place count 38 transition count 54
Iterating global reduction 2 with 2 rules applied. Total rules applied 92 place count 38 transition count 54
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 96 place count 34 transition count 50
Iterating global reduction 2 with 4 rules applied. Total rules applied 100 place count 34 transition count 50
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 104 place count 30 transition count 42
Iterating global reduction 2 with 4 rules applied. Total rules applied 108 place count 30 transition count 42
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 111 place count 27 transition count 36
Iterating global reduction 2 with 3 rules applied. Total rules applied 114 place count 27 transition count 36
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 117 place count 27 transition count 33
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 119 place count 26 transition count 32
Partial Post-agglomeration rule applied 2 times.
Drop transitions (Partial Post agglomeration) removed 2 transitions
Iterating global reduction 3 with 2 rules applied. Total rules applied 121 place count 26 transition count 32
Applied a total of 121 rules in 22 ms. Remains 26 /80 variables (removed 54) and now considering 32/118 (removed 86) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 22 ms. Remains : 26/80 places, 32/118 transitions.
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 2 ms
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 2 ms
[2024-05-30 15:10:52] [INFO ] Input system was already deterministic with 32 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 20 places :
Symmetric choice reduction at 0 with 20 rule applications. Total rules 20 place count 60 transition count 98
Iterating global reduction 0 with 20 rules applied. Total rules applied 40 place count 60 transition count 98
Applied a total of 40 rules in 3 ms. Remains 60 /80 variables (removed 20) and now considering 98/118 (removed 20) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 60/80 places, 98/118 transitions.
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 6 ms
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 6 ms
[2024-05-30 15:10:52] [INFO ] Input system was already deterministic with 98 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 22 places :
Symmetric choice reduction at 0 with 22 rule applications. Total rules 22 place count 58 transition count 96
Iterating global reduction 0 with 22 rules applied. Total rules applied 44 place count 58 transition count 96
Applied a total of 44 rules in 3 ms. Remains 58 /80 variables (removed 22) and now considering 96/118 (removed 22) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 58/80 places, 96/118 transitions.
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 6 ms
[2024-05-30 15:10:52] [INFO ] Input system was already deterministic with 96 transitions.
Starting structural reductions in LTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Discarding 24 places :
Symmetric choice reduction at 0 with 24 rule applications. Total rules 24 place count 56 transition count 94
Iterating global reduction 0 with 24 rules applied. Total rules applied 48 place count 56 transition count 94
Applied a total of 48 rules in 4 ms. Remains 56 /80 variables (removed 24) and now considering 94/118 (removed 24) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 56/80 places, 94/118 transitions.
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 5 ms
[2024-05-30 15:10:52] [INFO ] Input system was already deterministic with 94 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 80/80 places, 118/118 transitions.
Performed 30 Post agglomeration using F-continuation condition.Transition count delta: 30
Iterating post reduction 0 with 30 rules applied. Total rules applied 30 place count 80 transition count 88
Reduce places removed 30 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 1 with 38 rules applied. Total rules applied 68 place count 50 transition count 80
Performed 7 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 7 Pre rules applied. Total rules applied 68 place count 50 transition count 73
Deduced a syphon composed of 7 places in 0 ms
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 2 with 14 rules applied. Total rules applied 82 place count 43 transition count 73
Partial Post-agglomeration rule applied 2 times.
Drop transitions (Partial Post agglomeration) removed 2 transitions
Iterating global reduction 2 with 2 rules applied. Total rules applied 84 place count 43 transition count 73
Applied a total of 84 rules in 11 ms. Remains 43 /80 variables (removed 37) and now considering 73/118 (removed 45) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 43/80 places, 73/118 transitions.
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 4 ms
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 4 ms
[2024-05-30 15:10:52] [INFO ] Input system was already deterministic with 73 transitions.
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 12 ms
[2024-05-30 15:10:52] [INFO ] Flatten gal took : 12 ms
[2024-05-30 15:10:52] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 21 ms.
[2024-05-30 15:10:52] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 80 places, 118 transitions and 354 arcs took 5 ms.
Total runtime 11488 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running UtilityControlRoom-PT-Z4T4N02

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/414/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 80
TRANSITIONS: 118
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.003s, Sys 0.000s]


SAVING FILE /home/mcc/execution/414/model (.net / .def) ...
EXPORT TIME: [User 0.000s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 551
MODEL NAME: /home/mcc/execution/414/model
80 places, 118 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-02 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-04 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-05 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-11 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-00 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-15 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-PT-Z4T4N02-CTLFireability-2024-13 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1717081854113

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-PT-Z4T4N02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is UtilityControlRoom-PT-Z4T4N02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r443-smll-171701110100242"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-PT-Z4T4N02.tgz
mv UtilityControlRoom-PT-Z4T4N02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;