Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r443-smll-171701109700082.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is UtilityControlRoom-COL-Z4T3N06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r443-smll-171701109700082
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 424K
-rw-r--r-- 1 mcc users 8.0K Apr 13 05:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Apr 13 05:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.6K Apr 13 05:09 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Apr 13 05:09 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.3K Apr 23 08:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 08:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 08:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 08:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.1K Apr 13 05:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 78K Apr 13 05:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.5K Apr 13 05:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 59K Apr 13 05:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 23 08:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 23 08:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 29K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-00
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-01
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-02
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-03
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-04
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-05
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-06
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-07
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-08
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-09
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-10
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-11
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-12
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-13
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-14
FORMULA_NAME UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717057653927

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z4T3N06
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-30 08:27:36] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-30 08:27:36] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-30 08:27:36] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-05-30 08:27:36] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-05-30 08:27:37] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 894 ms
[2024-05-30 08:27:37] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 228 PT places and 450.0 transition bindings in 23 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 25 ms.
[2024-05-30 08:27:37] [INFO ] Built PT skeleton of HLPN with 13 places and 12 transitions 37 arcs in 7 ms.
[2024-05-30 08:27:37] [INFO ] Skeletonized 16 HLPN properties in 4 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 13 properties that can be checked using skeleton over-approximation.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Reduction of identical properties reduced properties to check from 21 to 17
RANDOM walk for 6803 steps (1 resets) in 219 ms. (30 steps per ms) remains 0/17 properties
[2024-05-30 08:27:37] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-05-30 08:27:37] [INFO ] Flatten gal took : 65 ms
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-30 08:27:37] [INFO ] Flatten gal took : 8 ms
Transition timeout forces synchronizations/join behavior on parameter c of sort Cli
Domain [Cli(6), Z(4), Z(4)] of place MovetoZ breaks symmetries in sort Z
[2024-05-30 08:27:38] [INFO ] Unfolded HLPN to a Petri net with 228 places and 450 transitions 1446 arcs in 120 ms.
[2024-05-30 08:27:38] [INFO ] Unfolded 15 HLPN properties in 9 ms.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
[2024-05-30 08:27:38] [INFO ] Reduced 18 identical enabling conditions.
Ensure Unique test removed 96 transitions
Reduce redundant transitions removed 96 transitions.
Support contains 228 out of 228 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 24 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
// Phase 1: matrix 354 rows 228 cols
[2024-05-30 08:27:38] [INFO ] Computed 15 invariants in 32 ms
[2024-05-30 08:27:38] [INFO ] Implicit Places using invariants in 402 ms returned []
[2024-05-30 08:27:38] [INFO ] Invariant cache hit.
[2024-05-30 08:27:39] [INFO ] Implicit Places using invariants and state equation in 488 ms returned []
Implicit Place search using SMT with State Equation took 1024 ms to find 0 implicit places.
Running 348 sub problems to find dead transitions.
[2024-05-30 08:27:39] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/222 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/222 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 2 (OVERLAPS) 6/228 variables, 13/15 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/228 variables, 0/15 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 4 (OVERLAPS) 354/582 variables, 228/243 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/582 variables, 0/243 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 6 (OVERLAPS) 0/582 variables, 0/243 constraints. Problems are: Problem set: 0 solved, 348 unsolved
No progress, stopping.
After SMT solving in domain Real declared 582/582 variables, and 243 constraints, problems are : Problem set: 0 solved, 348 unsolved in 24160 ms.
Refiners :[Positive P Invariants (semi-flows): 15/15 constraints, State Equation: 228/228 constraints, PredecessorRefiner: 348/348 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 348 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/222 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/222 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 2 (OVERLAPS) 6/228 variables, 13/15 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/228 variables, 0/15 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 4 (OVERLAPS) 354/582 variables, 228/243 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/582 variables, 348/591 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/582 variables, 0/591 constraints. Problems are: Problem set: 0 solved, 348 unsolved
At refinement iteration 7 (OVERLAPS) 0/582 variables, 0/591 constraints. Problems are: Problem set: 0 solved, 348 unsolved
No progress, stopping.
After SMT solving in domain Int declared 582/582 variables, and 591 constraints, problems are : Problem set: 0 solved, 348 unsolved in 30042 ms.
Refiners :[Positive P Invariants (semi-flows): 15/15 constraints, State Equation: 228/228 constraints, PredecessorRefiner: 348/348 constraints, Known Traps: 0/0 constraints]
After SMT, in 55095ms problems are : Problem set: 0 solved, 348 unsolved
Search for dead transitions found 0 dead transitions in 55155ms
Finished structural reductions in LTL mode , in 1 iterations and 56255 ms. Remains : 228/228 places, 354/354 transitions.
Support contains 228 out of 228 places after structural reductions.
[2024-05-30 08:28:34] [INFO ] Flatten gal took : 57 ms
[2024-05-30 08:28:34] [INFO ] Flatten gal took : 75 ms
[2024-05-30 08:28:35] [INFO ] Input system was already deterministic with 354 transitions.
Reduction of identical properties reduced properties to check from 34 to 25
RANDOM walk for 3640 steps (0 resets) in 533 ms. (6 steps per ms) remains 0/25 properties
[2024-05-30 08:28:35] [INFO ] Flatten gal took : 34 ms
[2024-05-30 08:28:35] [INFO ] Flatten gal took : 47 ms
[2024-05-30 08:28:35] [INFO ] Input system was already deterministic with 354 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 5 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 228/228 places, 354/354 transitions.
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 22 ms
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 21 ms
[2024-05-30 08:28:36] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 17 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 156/228 places, 282/354 transitions.
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 16 ms
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 17 ms
[2024-05-30 08:28:36] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 96 transitions
Trivial Post-agglo rules discarded 96 transitions
Performed 96 trivial Post agglomeration. Transition count delta: 96
Iterating post reduction 0 with 96 rules applied. Total rules applied 96 place count 228 transition count 258
Reduce places removed 96 places and 0 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 1 with 120 rules applied. Total rules applied 216 place count 132 transition count 234
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 24 Pre rules applied. Total rules applied 216 place count 132 transition count 210
Deduced a syphon composed of 24 places in 1 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 2 with 48 rules applied. Total rules applied 264 place count 108 transition count 210
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 267 place count 105 transition count 138
Iterating global reduction 2 with 3 rules applied. Total rules applied 270 place count 105 transition count 138
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 7 places and 0 transitions.
Iterating global reduction 2 with 13 rules applied. Total rules applied 283 place count 98 transition count 132
Applied a total of 283 rules in 44 ms. Remains 98 /228 variables (removed 130) and now considering 132/354 (removed 222) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 44 ms. Remains : 98/228 places, 132/354 transitions.
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 7 ms
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 7 ms
[2024-05-30 08:28:36] [INFO ] Input system was already deterministic with 132 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 15 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 156/228 places, 282/354 transitions.
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 13 ms
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 14 ms
[2024-05-30 08:28:36] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 6 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 156/228 places, 282/354 transitions.
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 12 ms
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 13 ms
[2024-05-30 08:28:36] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 228/228 places, 354/354 transitions.
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 15 ms
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 16 ms
[2024-05-30 08:28:36] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 2 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 228/228 places, 354/354 transitions.
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 20 ms
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 30 ms
[2024-05-30 08:28:36] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 3 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 228/228 places, 354/354 transitions.
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 24 ms
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 28 ms
[2024-05-30 08:28:36] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 7 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 156/228 places, 282/354 transitions.
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 20 ms
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 26 ms
[2024-05-30 08:28:36] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Applied a total of 0 rules in 3 ms. Remains 228 /228 variables (removed 0) and now considering 354/354 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 228/228 places, 354/354 transitions.
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 21 ms
[2024-05-30 08:28:36] [INFO ] Flatten gal took : 26 ms
[2024-05-30 08:28:37] [INFO ] Input system was already deterministic with 354 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 13 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 156/228 places, 282/354 transitions.
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 10 ms
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 10 ms
[2024-05-30 08:28:37] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 4 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 156/228 places, 282/354 transitions.
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 9 ms
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 10 ms
[2024-05-30 08:28:37] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 5 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 156/228 places, 282/354 transitions.
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 9 ms
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 10 ms
[2024-05-30 08:28:37] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 4 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 156/228 places, 282/354 transitions.
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 9 ms
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 12 ms
[2024-05-30 08:28:37] [INFO ] Input system was already deterministic with 282 transitions.
Starting structural reductions in LTL mode, iteration 0 : 228/228 places, 354/354 transitions.
Discarding 72 places :
Symmetric choice reduction at 0 with 72 rule applications. Total rules 72 place count 156 transition count 282
Iterating global reduction 0 with 72 rules applied. Total rules applied 144 place count 156 transition count 282
Applied a total of 144 rules in 3 ms. Remains 156 /228 variables (removed 72) and now considering 282/354 (removed 72) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 156/228 places, 282/354 transitions.
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 10 ms
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 11 ms
[2024-05-30 08:28:37] [INFO ] Input system was already deterministic with 282 transitions.
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 36 ms
[2024-05-30 08:28:37] [INFO ] Flatten gal took : 50 ms
[2024-05-30 08:28:37] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 39 ms.
[2024-05-30 08:28:37] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 228 places, 354 transitions and 1062 arcs took 8 ms.
Total runtime 61756 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running UtilityControlRoom-COL-Z4T3N06

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/414/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 228
TRANSITIONS: 354
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.004s, Sys 0.004s]


SAVING FILE /home/mcc/execution/414/model (.net / .def) ...
EXPORT TIME: [User 0.001s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 557
MODEL NAME: /home/mcc/execution/414/model
228 places, 354 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-00 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-01 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-04 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-11 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-08 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-15 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z4T3N06-CTLFireability-2024-06 CANNOT_COMPUTE
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1717058371446

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
MEDDLY ERROR: Insufficient memory

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z4T3N06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is UtilityControlRoom-COL-Z4T3N06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r443-smll-171701109700082"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z4T3N06.tgz
mv UtilityControlRoom-COL-Z4T3N06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;