Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r443-smll-171701109500018.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is UtilityControlRoom-COL-Z2T3N06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r443-smll-171701109500018
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 496K
-rw-r--r-- 1 mcc users 6.7K Apr 13 05:48 CTLCardinality.txt
-rw-r--r-- 1 mcc users 57K Apr 13 05:48 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Apr 13 05:46 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Apr 13 05:46 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.5K Apr 23 08:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 08:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 08:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 23 08:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 13 05:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 130K Apr 13 05:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 13 05:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 96K Apr 13 05:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Apr 23 08:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Apr 23 08:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 8 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 29K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-00
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-01
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-02
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-03
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-04
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-05
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-06
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-07
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-08
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-09
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-10
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-11
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-12
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-13
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-14
FORMULA_NAME UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717053037180

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=UtilityControlRoom-COL-Z2T3N06
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-30 07:10:39] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-30 07:10:39] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-30 07:10:39] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-05-30 07:10:40] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-05-30 07:10:41] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1135 ms
[2024-05-30 07:10:41] [INFO ] Imported 13 HL places and 12 HL transitions for a total of 106 PT places and 162.0 transition bindings in 34 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 31 ms.
[2024-05-30 07:10:41] [INFO ] Built PT skeleton of HLPN with 13 places and 12 transitions 37 arcs in 8 ms.
[2024-05-30 07:10:41] [INFO ] Skeletonized 16 HLPN properties in 5 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 10 properties that can be checked using skeleton over-approximation.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Reduction of identical properties reduced properties to check from 20 to 18
RANDOM walk for 2611 steps (0 resets) in 248 ms. (10 steps per ms) remains 0/18 properties
[2024-05-30 07:10:41] [INFO ] Flatten gal took : 34 ms
[2024-05-30 07:10:41] [INFO ] Flatten gal took : 9 ms
Transition timeout forces synchronizations/join behavior on parameter c of sort Cli
Domain [Cli(6), Z(2), Z(2)] of place MovetoZ breaks symmetries in sort Z
[2024-05-30 07:10:41] [INFO ] Unfolded HLPN to a Petri net with 106 places and 162 transitions 510 arcs in 46 ms.
[2024-05-30 07:10:41] [INFO ] Unfolded 16 HLPN properties in 1 ms.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
[2024-05-30 07:10:41] [INFO ] Reduced 6 identical enabling conditions.
Ensure Unique test removed 24 transitions
Reduce redundant transitions removed 24 transitions.
Support contains 106 out of 106 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Applied a total of 0 rules in 12 ms. Remains 106 /106 variables (removed 0) and now considering 138/138 (removed 0) transitions.
// Phase 1: matrix 138 rows 106 cols
[2024-05-30 07:10:41] [INFO ] Computed 15 invariants in 16 ms
[2024-05-30 07:10:42] [INFO ] Implicit Places using invariants in 343 ms returned []
[2024-05-30 07:10:42] [INFO ] Invariant cache hit.
[2024-05-30 07:10:42] [INFO ] Implicit Places using invariants and state equation in 208 ms returned []
Implicit Place search using SMT with State Equation took 674 ms to find 0 implicit places.
Running 132 sub problems to find dead transitions.
[2024-05-30 07:10:42] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/100 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/100 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 2 (OVERLAPS) 6/106 variables, 13/15 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/106 variables, 0/15 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 4 (OVERLAPS) 138/244 variables, 106/121 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/244 variables, 0/121 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 6 (OVERLAPS) 0/244 variables, 0/121 constraints. Problems are: Problem set: 0 solved, 132 unsolved
No progress, stopping.
After SMT solving in domain Real declared 244/244 variables, and 121 constraints, problems are : Problem set: 0 solved, 132 unsolved in 5309 ms.
Refiners :[Positive P Invariants (semi-flows): 15/15 constraints, State Equation: 106/106 constraints, PredecessorRefiner: 132/132 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 132 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/100 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/100 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 2 (OVERLAPS) 6/106 variables, 13/15 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/106 variables, 0/15 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 4 (OVERLAPS) 138/244 variables, 106/121 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/244 variables, 132/253 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/244 variables, 0/253 constraints. Problems are: Problem set: 0 solved, 132 unsolved
At refinement iteration 7 (OVERLAPS) 0/244 variables, 0/253 constraints. Problems are: Problem set: 0 solved, 132 unsolved
No progress, stopping.
After SMT solving in domain Int declared 244/244 variables, and 253 constraints, problems are : Problem set: 0 solved, 132 unsolved in 5606 ms.
Refiners :[Positive P Invariants (semi-flows): 15/15 constraints, State Equation: 106/106 constraints, PredecessorRefiner: 132/132 constraints, Known Traps: 0/0 constraints]
After SMT, in 11123ms problems are : Problem set: 0 solved, 132 unsolved
Search for dead transitions found 0 dead transitions in 11146ms
Finished structural reductions in LTL mode , in 1 iterations and 11861 ms. Remains : 106/106 places, 138/138 transitions.
Support contains 106 out of 106 places after structural reductions.
[2024-05-30 07:10:53] [INFO ] Flatten gal took : 32 ms
[2024-05-30 07:10:53] [INFO ] Flatten gal took : 69 ms
[2024-05-30 07:10:54] [INFO ] Input system was already deterministic with 138 transitions.
Reduction of identical properties reduced properties to check from 32 to 25
RANDOM walk for 40000 steps (8 resets) in 1101 ms. (36 steps per ms) remains 1/25 properties
BEST_FIRST walk for 40004 steps (8 resets) in 1286 ms. (31 steps per ms) remains 1/1 properties
[2024-05-30 07:10:55] [INFO ] Invariant cache hit.
Problem AtomicPropp5 is UNSAT
After SMT solving in domain Real declared 45/244 variables, and 0 constraints, problems are : Problem set: 1 solved, 0 unsolved in 40 ms.
Refiners :[Positive P Invariants (semi-flows): 0/15 constraints, State Equation: 0/106 constraints, PredecessorRefiner: 1/1 constraints, Known Traps: 0/0 constraints]
After SMT, in 78ms problems are : Problem set: 1 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 1 formulas.
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 28 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 39 ms
[2024-05-30 07:10:55] [INFO ] Input system was already deterministic with 138 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 1 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 12 rules applied. Total rules applied 12 place count 100 transition count 132
Applied a total of 12 rules in 34 ms. Remains 100 /106 variables (removed 6) and now considering 132/138 (removed 6) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 100/106 places, 132/138 transitions.
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 17 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 17 ms
[2024-05-30 07:10:55] [INFO ] Input system was already deterministic with 132 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 8 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 94/106 places, 126/138 transitions.
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 20 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 15 ms
[2024-05-30 07:10:55] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 6 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 94/106 places, 126/138 transitions.
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 14 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 15 ms
[2024-05-30 07:10:55] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Applied a total of 0 rules in 2 ms. Remains 106 /106 variables (removed 0) and now considering 138/138 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 106/106 places, 138/138 transitions.
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 15 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 16 ms
[2024-05-30 07:10:55] [INFO ] Input system was already deterministic with 138 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Drop transitions (Redundant composition of simpler transitions.) removed 12 transitions
Redundant transition composition rules discarded 12 transitions
Iterating global reduction 0 with 12 rules applied. Total rules applied 36 place count 94 transition count 114
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 37 place count 93 transition count 102
Iterating global reduction 0 with 1 rules applied. Total rules applied 38 place count 93 transition count 102
Applied a total of 38 rules in 20 ms. Remains 93 /106 variables (removed 13) and now considering 102/138 (removed 36) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 21 ms. Remains : 93/106 places, 102/138 transitions.
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 6 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 6 ms
[2024-05-30 07:10:55] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Drop transitions (Trivial Post-Agglo cleanup.) removed 24 transitions
Trivial Post-agglo rules discarded 24 transitions
Performed 24 trivial Post agglomeration. Transition count delta: 24
Iterating post reduction 0 with 24 rules applied. Total rules applied 24 place count 106 transition count 114
Reduce places removed 24 places and 0 transitions.
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Iterating post reduction 1 with 36 rules applied. Total rules applied 60 place count 82 transition count 102
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 12 Pre rules applied. Total rules applied 60 place count 82 transition count 90
Deduced a syphon composed of 12 places in 1 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 2 with 24 rules applied. Total rules applied 84 place count 70 transition count 90
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 85 place count 69 transition count 78
Iterating global reduction 2 with 1 rules applied. Total rules applied 86 place count 69 transition count 78
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 92 place count 63 transition count 72
Iterating global reduction 2 with 6 rules applied. Total rules applied 98 place count 63 transition count 72
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 104 place count 57 transition count 60
Iterating global reduction 2 with 6 rules applied. Total rules applied 110 place count 57 transition count 60
Discarding 6 places :
Symmetric choice reduction at 2 with 6 rule applications. Total rules 116 place count 51 transition count 54
Iterating global reduction 2 with 6 rules applied. Total rules applied 122 place count 51 transition count 54
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 2 with 6 rules applied. Total rules applied 128 place count 51 transition count 48
Applied a total of 128 rules in 20 ms. Remains 51 /106 variables (removed 55) and now considering 48/138 (removed 90) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 51/106 places, 48/138 transitions.
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 3 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 3 ms
[2024-05-30 07:10:55] [INFO ] Input system was already deterministic with 48 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 8 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 94/106 places, 126/138 transitions.
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 12 ms
[2024-05-30 07:10:55] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 6 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 94/106 places, 126/138 transitions.
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 8 ms
[2024-05-30 07:10:55] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 5 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 94/106 places, 126/138 transitions.
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:55] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 3 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 94/106 places, 126/138 transitions.
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:55] [INFO ] Flatten gal took : 8 ms
[2024-05-30 07:10:56] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Applied a total of 0 rules in 1 ms. Remains 106 /106 variables (removed 0) and now considering 138/138 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 106/106 places, 138/138 transitions.
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:56] [INFO ] Input system was already deterministic with 138 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Applied a total of 0 rules in 6 ms. Remains 106 /106 variables (removed 0) and now considering 138/138 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 106/106 places, 138/138 transitions.
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 6 ms
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:56] [INFO ] Input system was already deterministic with 138 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 2 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 94/106 places, 126/138 transitions.
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 5 ms
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:56] [INFO ] Input system was already deterministic with 126 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Applied a total of 0 rules in 2 ms. Remains 106 /106 variables (removed 0) and now considering 138/138 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 106/106 places, 138/138 transitions.
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 6 ms
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:56] [INFO ] Input system was already deterministic with 138 transitions.
Starting structural reductions in LTL mode, iteration 0 : 106/106 places, 138/138 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 94 transition count 126
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 94 transition count 126
Applied a total of 24 rules in 5 ms. Remains 94 /106 variables (removed 12) and now considering 126/138 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 94/106 places, 126/138 transitions.
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 6 ms
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 7 ms
[2024-05-30 07:10:56] [INFO ] Input system was already deterministic with 126 transitions.
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 13 ms
[2024-05-30 07:10:56] [INFO ] Flatten gal took : 13 ms
[2024-05-30 07:10:56] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 18 ms.
[2024-05-30 07:10:56] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 106 places, 138 transitions and 414 arcs took 6 ms.
Total runtime 16583 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running UtilityControlRoom-COL-Z2T3N06

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/417/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 106
TRANSITIONS: 138
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.000s, Sys 0.004s]


SAVING FILE /home/mcc/execution/417/model (.net / .def) ...
EXPORT TIME: [User 0.000s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 557
MODEL NAME: /home/mcc/execution/417/model
106 places, 138 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-00 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-04 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-05 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-08 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-02 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-11 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-13 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-07 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-15 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA UtilityControlRoom-COL-Z2T3N06-CTLFireability-2024-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1717053067129

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="UtilityControlRoom-COL-Z2T3N06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is UtilityControlRoom-COL-Z2T3N06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r443-smll-171701109500018"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/UtilityControlRoom-COL-Z2T3N06.tgz
mv UtilityControlRoom-COL-Z2T3N06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;