About the Execution of LoLA for TwoPhaseLocking-PT-nC10000vN
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16209.104 | 504176.00 | 474310.00 | 1754.70 | ????????T??????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r423-smll-171690575300442.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is TwoPhaseLocking-PT-nC10000vN, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-smll-171690575300442
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 416K
-rw-r--r-- 1 mcc users 8.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K May 19 07:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K May 19 16:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 19 07:39 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 19 19:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.1K Apr 13 07:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 84K Apr 13 07:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Apr 13 07:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Apr 13 07:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 08:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 08:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 4.6K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-00
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-01
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-02
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-03
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-04
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-05
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-06
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-09
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-10
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-11
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-12
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-13
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-14
FORMULA_NAME TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717189130423
FORMULA TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717189634599
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 133 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 56 (type FNDP) for 24 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 57 (type EQUN) for 24 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 63 (type EQUN) for 27 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 56 (type FNDP) for TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 57 (type EQUN) for TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08 (obsolete)
[[35mlola[0m][I] LAUNCH task # 70 (type EQUN) for 3 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 27 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 57 (type EQUN) for TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 70 (type EQUN) for TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 63 (type EQUN) for TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 65 (type EQUN) for TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-01: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-09: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-12: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 5/211 7/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 1671932 m, 334386 m/sec, 4984119 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-01: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-09: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-12: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 10/211 14/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 3360088 m, 337631 m/sec, 10050198 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-01: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-09: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-12: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 15/211 21/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 4995754 m, 327133 m/sec, 14958887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-08: EF true findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-01: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-09: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-12: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 20/211 28/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 6598663 m, 320581 m/sec, 19776908 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] 22 CTL EXCL 65/211 84/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 20267018 m, 268879 m/sec, 60811681 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 70/211 90/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 21734103 m, 293417 m/sec, 65244154 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 75/211 96/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 23221649 m, 297509 m/sec, 69713994 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 80/211 102/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 24702713 m, 296212 m/sec, 74152068 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 85/211 108/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 26147228 m, 288903 m/sec, 78510468 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 90/211 114/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 27602674 m, 291089 m/sec, 82900514 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 100/211 126/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 30492849 m, 288376 m/sec, 91585778 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 105/211 132/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 31832926 m, 268015 m/sec, 95619228 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 110/211 138/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 33285242 m, 290463 m/sec, 99997334 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 115/211 144/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 34760224 m, 294996 m/sec, 104426691 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 120/211 150/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 36184817 m, 284918 m/sec, 108732686 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 125/211 156/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 37650246 m, 293085 m/sec, 113137573 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 150/211 186/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 44883654 m, 293362 m/sec, 134942242 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 170/211 210/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 50703082 m, 286917 m/sec, 152490288 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 175/211 216/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 52178281 m, 295039 m/sec, 156936365 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 200/211 245/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2024-07 59294963 m, 284147 m/sec, 178420603 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 20/211 24/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 5714590 m, 273006 m/sec, 26055966 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 35/211 40/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 9712423 m, 264514 m/sec, 44449723 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 40/211 45/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 11018149 m, 261145 m/sec, 50464194 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 55/211 62/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 14970512 m, 259639 m/sec, 68654651 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 60/211 67/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 16238746 m, 253646 m/sec, 74497245 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 75/211 82/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 20041533 m, 247640 m/sec, 91989133 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 80/211 87/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 21309619 m, 253617 m/sec, 97835056 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 85/211 92/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 22533719 m, 244820 m/sec, 103459460 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 120/211 127/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 30957749 m, 236039 m/sec, 142220610 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 140/211 147/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 35857811 m, 245550 m/sec, 164756651 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 145/211 152/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 37055564 m, 239550 m/sec, 170287463 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 150/211 157/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 38284794 m, 245846 m/sec, 175937224 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 155/211 162/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 39477746 m, 238590 m/sec, 181438577 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 160/211 167/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 40686743 m, 241799 m/sec, 186967508 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 165/211 171/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 41871544 m, 236960 m/sec, 192439397 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 170/211 177/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 43144818 m, 254654 m/sec, 198297804 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 175/211 182/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 44426206 m, 256277 m/sec, 204171349 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 180/211 187/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 45678522 m, 250463 m/sec, 209967634 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 185/211 192/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 46910277 m, 246351 m/sec, 215625388 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 200/211 207/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 50597622 m, 241764 m/sec, 232583411 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 205/211 212/2000 TwoPhaseLocking-PT-nC10000vN-CTLFireability-2023-15 51810323 m, 242540 m/sec, 238155853 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 405 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC10000vN"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is TwoPhaseLocking-PT-nC10000vN, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-smll-171690575300442"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC10000vN.tgz
mv TwoPhaseLocking-PT-nC10000vN execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;