About the Execution of LoLA for TwoPhaseLocking-PT-nC10000vD
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 15610.031 | 306811.00 | 306333.00 | 898.50 | TFFFFFFFTFFFTFF? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r423-smll-171690575300435.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is TwoPhaseLocking-PT-nC10000vD, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-smll-171690575300435
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 6.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 66K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Apr 23 08:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 08:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 08:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 23 08:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 13 07:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 128K Apr 13 07:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 13 07:11 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Apr 13 07:11 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 08:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 08:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 4.6K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-01
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-03
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-05
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-07
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14
FORMULA_NAME TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717188318499
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m] [1m[32mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m] [1m[33mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL unknown AGGR[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 306 secs. Pages in use: 568
BK_STOP 1717188625310
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 23 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-05
[[35mlola[0m][I] time limit : 149 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 69 (type FNDP) for 3 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type EQUN) for 3 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 73 (type FNDP) for 37 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 69 (type FNDP) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 70 (type EQUN) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-01 (obsolete)
[[35mlola[0m][I] LAUNCH task # 77 (type FNDP) for 13 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type EQUN) for 13 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 73 (type FNDP) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 81 (type FNDP) for 23 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 70 (type EQUN) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 81 (type FNDP) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 26 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-05 (obsolete)
[[35mlola[0m][I] LAUNCH task # 66 (type EXCL) for 65 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 78 (type EQUN) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][W] CANCELED task # 77 (type FNDP) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-03 (obsolete)
[[35mlola[0m][I] FINISHED task # 77 (type FNDP) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 5/299 16/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 2431068 m, 486213 m/sec, 5717032 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 10/299 31/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 4756066 m, 464999 m/sec, 11669370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 15/299 45/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 6825457 m, 413878 m/sec, 17301783 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 20/299 58/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 8854215 m, 405751 m/sec, 22775113 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 25/299 72/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 10986144 m, 426385 m/sec, 28432540 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 30/299 84/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 12879584 m, 378688 m/sec, 33589064 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 35/299 96/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 14739930 m, 372069 m/sec, 38853653 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 36 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 40/299 109/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 16687359 m, 389485 m/sec, 44264158 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 41 secs. Pages in use: 109
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 45/299 121/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 18539239 m, 370376 m/sec, 49466711 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 46 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 50/299 132/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 20335121 m, 359176 m/sec, 54539525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 51 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 55/299 143/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 22043787 m, 341733 m/sec, 59493970 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 56 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 60/299 155/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 23889088 m, 369060 m/sec, 64593296 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 61 secs. Pages in use: 155
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 65/299 167/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 25682379 m, 358658 m/sec, 69657526 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 66 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 70/299 178/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 27297474 m, 323019 m/sec, 74413395 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 71 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 75/299 188/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 28848635 m, 310232 m/sec, 78922205 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 76 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 80/299 199/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 30585336 m, 347340 m/sec, 83740733 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 81 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 85/299 209/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 32212231 m, 325379 m/sec, 88480595 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 86 secs. Pages in use: 209
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 90/299 219/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 33723198 m, 302193 m/sec, 92934734 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 91 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 95/299 228/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 35154840 m, 286328 m/sec, 97196814 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 96 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 100/299 238/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 36597449 m, 288521 m/sec, 101465247 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 101 secs. Pages in use: 238
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 105/299 249/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 38267643 m, 334038 m/sec, 106102973 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 106 secs. Pages in use: 249
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 110/299 258/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 39682469 m, 282965 m/sec, 110304179 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 111 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 115/299 267/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 41051022 m, 273710 m/sec, 114363768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 116 secs. Pages in use: 267
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 120/299 276/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 42538546 m, 297504 m/sec, 118605188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 276
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 125/299 286/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 43952306 m, 282752 m/sec, 122710828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 126 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 130/299 294/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 45303436 m, 270226 m/sec, 126721131 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 131 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 135/299 303/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 46720479 m, 283408 m/sec, 130801593 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 136 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 140/299 312/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 48087606 m, 273425 m/sec, 134764478 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 141 secs. Pages in use: 312
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 145/299 321/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 49386525 m, 259783 m/sec, 138652634 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 146 secs. Pages in use: 321
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 150/299 330/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 50737912 m, 270277 m/sec, 142585246 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 151 secs. Pages in use: 330
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 155/299 338/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 52101602 m, 272738 m/sec, 146530340 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 156 secs. Pages in use: 338
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 160/299 347/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 53379111 m, 255501 m/sec, 150328668 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 161 secs. Pages in use: 347
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 165/299 355/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 54677690 m, 259715 m/sec, 154105459 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 166 secs. Pages in use: 355
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 170/299 363/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 55957712 m, 256004 m/sec, 157843027 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 171 secs. Pages in use: 363
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 175/299 372/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 57266383 m, 261734 m/sec, 161559688 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 176 secs. Pages in use: 372
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 180/299 380/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 58498895 m, 246502 m/sec, 165262513 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 181 secs. Pages in use: 380
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 185/299 388/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 59769377 m, 254096 m/sec, 168981030 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 186 secs. Pages in use: 388
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 190/299 396/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 61005002 m, 247125 m/sec, 172675559 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 191 secs. Pages in use: 396
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 195/299 404/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 62285394 m, 256078 m/sec, 176441246 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 196 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 200/299 412/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 63516475 m, 246216 m/sec, 180066681 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 201 secs. Pages in use: 412
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 205/299 421/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 64798470 m, 256399 m/sec, 183847922 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 206 secs. Pages in use: 421
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 210/299 429/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 66008923 m, 242090 m/sec, 187441014 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 211 secs. Pages in use: 429
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 215/299 437/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 67260501 m, 250315 m/sec, 191044995 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 216 secs. Pages in use: 437
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 220/299 444/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 68422648 m, 232429 m/sec, 194521909 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 221 secs. Pages in use: 444
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 225/299 452/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 69639192 m, 243308 m/sec, 198143923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 226 secs. Pages in use: 452
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 230/299 460/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 70875211 m, 247203 m/sec, 201787977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 231 secs. Pages in use: 460
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 235/299 467/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 72018922 m, 228742 m/sec, 205200930 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 236 secs. Pages in use: 467
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 240/299 475/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 73191567 m, 234529 m/sec, 208679019 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 241 secs. Pages in use: 475
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 245/299 483/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 74400014 m, 241689 m/sec, 212211928 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 246 secs. Pages in use: 483
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 250/299 490/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 75497018 m, 219400 m/sec, 215459591 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 251 secs. Pages in use: 490
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 255/299 498/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 76684437 m, 237483 m/sec, 218992658 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 256 secs. Pages in use: 498
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 260/299 506/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 77898380 m, 242788 m/sec, 222527650 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 261 secs. Pages in use: 506
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 265/299 513/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 79088322 m, 237988 m/sec, 225985355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 266 secs. Pages in use: 513
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 270/299 521/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 80216814 m, 225698 m/sec, 229383476 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 271 secs. Pages in use: 521
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 275/299 528/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 81290190 m, 214675 m/sec, 232580474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 276 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 280/299 535/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 82369108 m, 215783 m/sec, 235836060 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 281 secs. Pages in use: 535
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 285/299 542/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 83441619 m, 214502 m/sec, 239012622 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 286 secs. Pages in use: 542
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 290/299 549/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 84591355 m, 229947 m/sec, 242372321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 291 secs. Pages in use: 549
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 LTL EXCL 295/299 557/2000 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 85754273 m, 232583 m/sec, 245740072 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 296 secs. Pages in use: 557
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 66 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 301 secs. Pages in use: 563
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 63 (type EXCL) for 62 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 66 (type EXCL) for 65 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15
[[35mlola[0m][I] time limit : 3299 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 63 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20001
[[35mlola[0m][I] fired transitions : 20001
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 66 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-01: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-03: CONJ false state equation[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-07: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC10000vD-LTLCardinality-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC10000vD-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 306 secs. Pages in use: 568
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 60 (type EXCL) for 59 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13
[[35mlola[0m][I] time limit : 329 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 60 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20001
[[35mlola[0m][I] fired transitions : 20001
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10
[[35mlola[0m][I] time limit : 366 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 25002
[[35mlola[0m][I] fired transitions : 25002
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09
[[35mlola[0m][I] time limit : 411 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20009
[[35mlola[0m][I] fired transitions : 20010
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 44 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08
[[35mlola[0m][I] time limit : 470 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02
[[35mlola[0m][I] time limit : 549 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 34998
[[35mlola[0m][I] fired transitions : 34998
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00
[[35mlola[0m][I] time limit : 658 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11
[[35mlola[0m][I] time limit : 823 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 29997
[[35mlola[0m][I] fired transitions : 29997
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06
[[35mlola[0m][I] time limit : 1098 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 10004
[[35mlola[0m][I] fired transitions : 10005
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 57 (type EXCL) for 56 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12
[[35mlola[0m][I] time limit : 1647 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 57 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 20 TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04
[[35mlola[0m][I] time limit : 3294 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 21 (type EXCL) for TwoPhaseLocking-PT-nC10000vD-LTLCardinality-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 29992
[[35mlola[0m][I] fired transitions : 29992
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open tasks 16
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC10000vD"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is TwoPhaseLocking-PT-nC10000vD, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-smll-171690575300435"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC10000vD.tgz
mv TwoPhaseLocking-PT-nC10000vD execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;