About the Execution of LoLA for TwoPhaseLocking-PT-nC05000vD
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 261329.00 | 0.00 | 0.00 | FTF??F??F?????T? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r423-smll-171690575300417.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is TwoPhaseLocking-PT-nC05000vD, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-smll-171690575300417
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 440K
-rw-r--r-- 1 mcc users 7.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 72K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Apr 23 08:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 23 08:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 19 07:39 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 19 19:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Apr 13 07:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Apr 13 07:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Apr 13 07:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Apr 13 07:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 08:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 08:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 4.6K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-01
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-02
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-03
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-04
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-05
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-06
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-07
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-08
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-10
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-11
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-12
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-13
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-14
FORMULA_NAME TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-15
=== Now, execution of the tool begins
BK_START 1717186636974
FORMULA TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717186898303
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 7 (type CNST) for 6 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 7 (type CNST) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 61 (type EXCL) for 0 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 133 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 64 (type EQUN) for 0 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 66 (type EQUN) for 0 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 67 (type FNDP) for 54 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 67 (type FNDP) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 73 (type EQUN) for 15 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type EQUN) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 75 (type FNDP) for 24 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 64 (type EQUN) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 76 (type EQUN) for 24 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type EXCL) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 10002
[[35mlola[0m][I] fired transitions : 10001
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 15 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 71 (type EXCL) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 248
[[35mlola[0m][I] fired transitions : 247
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 73 (type EQUN) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-05 (obsolete)
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-13
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 73 (type EQUN) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 75 (type FNDP) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 76 (type EQUN) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-08 (obsolete)
[[35mlola[0m][I] LAUNCH task # 80 (type EQUN) for 44 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 79 (type FNDP) for 44 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 76 (type EQUN) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 79 (type FNDP) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 80 (type EQUN) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-12 (obsolete)
[[35mlola[0m][I] FINISHED task # 80 (type EQUN) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 10000
[[35mlola[0m][I] fired transitions : 9999
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 57 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-15
[[35mlola[0m][I] time limit : 400 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 58 (type EXCL) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 10001
[[35mlola[0m][I] fired transitions : 10000
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 450 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4358174
[[35mlola[0m][I] fired transitions : 4374827
[[35mlola[0m][I] time used : 4
[[35mlola[0m][I] memory pages used : 19
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 513 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 39 (type EXCL) for TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 6341
[[35mlola[0m][I] fired transitions : 6340
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 36 (type EXCL) for 31 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 599 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-05: AXAG false state space /EXEF[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-08: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-12: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-14: EF true findpath[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 CTL EXCL 1/599 7/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 1626446 m, 325289 m/sec, 1652022 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-05: AXAG false state space /EXEF[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-08: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-12: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-14: EF true findpath[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-15: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 36 CTL EXCL 6/599 33/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 7662673 m, 1207245 m/sec, 7716745 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-00: AGAF false state space /EFEG[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-05: AXAG false state space /EXEF[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-08: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-12: CONJ false findpath[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-14: EF true findpath[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC05000vD-CTLCardinality-2023-15: CTL true CTL model checker[0m
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[[35mlola[0m][.] 36 CTL EXCL 11/599 52/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 12365201 m, 940505 m/sec, 12442261 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 16/599 71/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 16778462 m, 882652 m/sec, 16869470 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 21/599 93/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 22040371 m, 1052381 m/sec, 22150867 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 26/599 113/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 27074301 m, 1006786 m/sec, 27213094 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 31/599 135/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 32259017 m, 1036943 m/sec, 32433082 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 36/599 156/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 37301067 m, 1008410 m/sec, 37481126 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 41/599 175/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 41990769 m, 937940 m/sec, 42177923 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 46/599 192/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 46170038 m, 835853 m/sec, 46364793 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 51/599 209/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 50381029 m, 842198 m/sec, 50585286 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 56/599 226/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 54479784 m, 819751 m/sec, 54697717 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 61/599 244/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 58834318 m, 870906 m/sec, 59127594 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 66/599 262/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 63412277 m, 915591 m/sec, 63721606 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 71/599 280/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 68053016 m, 928147 m/sec, 68413095 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 76/599 301/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 73122692 m, 1013935 m/sec, 73506050 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 81/599 322/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 78046576 m, 984776 m/sec, 78437890 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 86/599 343/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 83069270 m, 1004538 m/sec, 83509942 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 91/599 362/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 87786597 m, 943465 m/sec, 88234618 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 96/599 379/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 92128847 m, 868450 m/sec, 92648120 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 101/599 397/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 96488189 m, 871868 m/sec, 97091843 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 106/599 413/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 100349551 m, 772272 m/sec, 101032626 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 111/599 429/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 104357004 m, 801490 m/sec, 105050538 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 116/599 446/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 108581682 m, 844935 m/sec, 109293267 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 121/599 461/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 112243236 m, 732310 m/sec, 112961148 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 126/599 475/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 115735516 m, 698456 m/sec, 116460479 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 131/599 490/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 119330288 m, 718954 m/sec, 120064346 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 136/599 505/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 122929456 m, 719833 m/sec, 123677937 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 141/599 522/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 127019897 m, 818088 m/sec, 127788275 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 146/599 540/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 131614380 m, 918896 m/sec, 132388992 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 151/599 556/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 135676332 m, 812390 m/sec, 136595213 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 156/599 573/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 139851780 m, 835089 m/sec, 140821024 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 161/599 589/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 143860762 m, 801796 m/sec, 144838061 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 166/599 607/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 148184224 m, 864692 m/sec, 149191007 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 171/599 625/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 152569259 m, 877007 m/sec, 153606046 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 176/599 643/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 157014041 m, 888956 m/sec, 158066074 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 181/599 660/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 161107321 m, 818656 m/sec, 162170804 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 186/599 677/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 165101103 m, 798756 m/sec, 166192274 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 191/599 693/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 168982602 m, 776299 m/sec, 170080544 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 196/599 710/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 173296705 m, 862820 m/sec, 174401708 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 201/599 727/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 177403468 m, 821352 m/sec, 178524663 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 206/599 744/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 181555958 m, 830498 m/sec, 182698617 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 211/599 760/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 185600256 m, 808859 m/sec, 186752019 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 216/599 778/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 190035820 m, 887112 m/sec, 191263556 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 221/599 795/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 194221268 m, 837089 m/sec, 195485999 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 226/599 813/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 198605789 m, 876904 m/sec, 199920424 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 231/599 829/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 202551940 m, 789230 m/sec, 203878633 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 236/599 844/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 206262064 m, 742024 m/sec, 207597150 t fired, .
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[[35mlola[0m][.] 36 CTL EXCL 241/599 859/2000 TwoPhaseLocking-PT-nC05000vD-CTLCardinality-2024-09 209806007 m, 708788 m/sec, 211147824 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC05000vD"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is TwoPhaseLocking-PT-nC05000vD, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-smll-171690575300417"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC05000vD.tgz
mv TwoPhaseLocking-PT-nC05000vD execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;