About the Execution of LoLA for TwoPhaseLocking-PT-nC01000vD
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16204.563 | 464526.00 | 466058.00 | 1340.70 | ??????????????FT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r423-smll-171690575200386.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is TwoPhaseLocking-PT-nC01000vD, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-smll-171690575200386
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 420K
-rw-r--r-- 1 mcc users 6.4K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 08:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 23 08:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 23 08:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 08:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 13 06:50 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Apr 13 06:50 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Apr 13 06:50 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Apr 13 06:50 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 08:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 08:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 4.6K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-00
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-01
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-02
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-03
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-04
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-05
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-07
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-08
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-09
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-10
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-11
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-13
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-14
FORMULA_NAME TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717180389160
FORMULA TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717180853686
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 138 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1503
[[35mlola[0m][I] fired transitions : 4003
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 49 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 163 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1001
[[35mlola[0m][I] fired transitions : 1000
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 16 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EQUN) for 16 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 75 (type EQUN) for 43 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[*** LOG ERROR #0001 ***] [2024-05-31 18:33:09] [status_logger] string pointer is null
[[35mlola[0m][I] FINISHED task # 65 (type EQUN) for TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-04
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 67 (type EQUN) for TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 75 (type EQUN) for TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-14: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-15: DISJ true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-03: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-04: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-13: AXAF 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 5/240 5/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12 1148681 m, 229736 m/sec, 4121181 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-03: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-04: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-13: AXAF 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 10/240 10/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12 2265020 m, 223267 m/sec, 8179486 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-03: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-04: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-13: AXAF 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 15/240 14/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12 3248928 m, 196781 m/sec, 11761382 t fired, .
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[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-03: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-04: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-13: AXAF 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 20/240 19/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12 4343623 m, 218939 m/sec, 15766777 t fired, .
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[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-03: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-04: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-13: AXAF 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 41 CTL EXCL 25/240 23/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12 5439674 m, 219210 m/sec, 19777846 t fired, .
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[[35mlola[0m][.] 41 CTL EXCL 235/240 191/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12 45862497 m, 183691 m/sec, 168167152 t fired, .
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[[35mlola[0m][.] 41 CTL EXCL 240/240 195/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12 46774072 m, 182315 m/sec, 171514671 t fired, .
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[[35mlola[0m][.] 41 CTL EXCL 5/239 5/5 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2023-12 1121981 m, -9130418 m/sec, 4025734 t fired, .
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[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-09
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[[35mlola[0m][.] 23 CTL EXCL 5/371 20/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 4637985 m, 927597 m/sec, 5219723 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 10/371 38/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 8925411 m, 857485 m/sec, 10468642 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 15/371 54/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 12807426 m, 776403 m/sec, 15916002 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 25/371 87/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 20766274 m, 781717 m/sec, 26120389 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 30/371 102/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 24365037 m, 719752 m/sec, 31386691 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 55/371 170/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 40540260 m, 582624 m/sec, 57041971 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 60/371 183/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 43611117 m, 614171 m/sec, 62069917 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 65/371 195/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 46687606 m, 615297 m/sec, 67035548 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 70/371 208/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 49705273 m, 603533 m/sec, 71944811 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 75/371 220/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 52641799 m, 587305 m/sec, 76789494 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 80/371 232/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 55359443 m, 543528 m/sec, 81659757 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 95/371 266/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 63528593 m, 546494 m/sec, 95996264 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 100/371 276/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 66073208 m, 508923 m/sec, 100757156 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 105/371 287/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 68680242 m, 521406 m/sec, 105420439 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 110/371 298/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 71339035 m, 531758 m/sec, 110084907 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 115/371 308/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 73823957 m, 496984 m/sec, 114713895 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 120/371 318/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 76107906 m, 456789 m/sec, 119390640 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 125/371 327/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 78348804 m, 448179 m/sec, 124047762 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 130/371 337/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 80754725 m, 481184 m/sec, 128663056 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 135/371 347/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 83233473 m, 495749 m/sec, 133208201 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 140/371 356/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 85437800 m, 440865 m/sec, 137954034 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 145/371 367/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 88037068 m, 519853 m/sec, 142761668 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 150/371 376/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 90149915 m, 422569 m/sec, 147192258 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 155/371 386/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 92545940 m, 479205 m/sec, 151602587 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 160/371 395/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 94762121 m, 443236 m/sec, 156511132 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 165/371 406/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 97433037 m, 534183 m/sec, 161307473 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 170/371 416/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 99706339 m, 454660 m/sec, 166139606 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 175/371 426/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 102168969 m, 492526 m/sec, 170904604 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 180/371 436/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 104504207 m, 467047 m/sec, 175703350 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 185/371 445/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 106782142 m, 455587 m/sec, 180493240 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 190/371 455/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 109151909 m, 473953 m/sec, 185213251 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 195/371 463/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 111187455 m, 407109 m/sec, 189824111 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 200/371 472/2000 TwoPhaseLocking-PT-nC01000vD-CTLFireability-2024-06 113266605 m, 415830 m/sec, 194413591 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 405 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC01000vD"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is TwoPhaseLocking-PT-nC01000vD, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-smll-171690575200386"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC01000vD.tgz
mv TwoPhaseLocking-PT-nC01000vD execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;