About the Execution of LoLA for TwoPhaseLocking-PT-nC00100vD
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 1764.380 | 121756.00 | 123228.00 | 440.70 | TFFFFTTTFFFTFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r423-smll-171690575100337.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is TwoPhaseLocking-PT-nC00100vD, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-smll-171690575100337
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 68K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Apr 23 08:03 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 08:03 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 23 08:03 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 08:03 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 13 07:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 149K Apr 13 07:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Apr 13 07:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 66K Apr 13 07:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 08:03 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 08:03 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 10 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 4.6K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-00
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-01
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-02
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-03
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-04
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-05
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-06
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-07
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-08
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-09
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-10
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-12
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-13
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-14
FORMULA_NAME TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-15
=== Now, execution of the tool begins
BK_START 1717173540011
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-00: EFEG true state space /EFEG[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-01: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-03: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-04: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-06: EF true findpath[0m
[[35mlola[0m] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-07: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-12: CONJ false findpath[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-14: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 121 secs. Pages in use: 40
BK_STOP 1717173661767
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 7 (type CNST) for 6 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 25 (type CNST) for 24 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-08
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 28 (type CNST) for 27 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 44 (type CNST) for 43 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 7 (type CNST) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 25 (type CNST) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 44 (type CNST) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 28 (type CNST) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 50 (type CNST) for 49 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 50 (type CNST) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1470
[[35mlola[0m][I] fired transitions : 3156
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 56 (type EQUN) for 0 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 58 (type EQUN) for 0 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 44
[[35mlola[0m][I] fired transitions : 46
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-14
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 52 (type FNDP) for 18 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 199
[[35mlola[0m][I] fired transitions : 198
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 36 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-12
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type FNDP) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 62 (type FNDP) for 36 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 62 (type FNDP) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 39 (type EXCL) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-12 (obsolete)
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-05
[[35mlola[0m][I] time limit : 599 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-04
[[35mlola[0m][I] time limit : 719 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 58 (type EQUN) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 56 (type EQUN) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 82280
[[35mlola[0m][I] fired transitions : 136500
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-03
[[35mlola[0m][I] time limit : 899 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-12: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-00: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-03: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 CTL EXCL 5/899 6/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-03 1362285 m, 272457 m/sec, 4004819 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-02: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-06: EF true findpath[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-12: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-13: INITIAL false preprocessing[0m
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[[35mlola[0m][.] TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.]
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[[35mlola[0m][.] 10 CTL EXCL 10/899 8/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-03 1898978 m, 107338 m/sec, 8290900 t fired, .
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[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1899523
[[35mlola[0m][I] fired transitions : 9356952
[[35mlola[0m][I] time used : 11
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[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 1196 sec
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[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 147
[[35mlola[0m][I] fired transitions : 146
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 0 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-00
[[35mlola[0m][I] time limit : 1794 sec
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[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 212
[[35mlola[0m][I] fired transitions : 212
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11
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[[35mlola[0m][.] TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 34 CTL EXCL 4/3588 3/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 724870 m, 144974 m/sec, 3645284 t fired, .
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[[35mlola[0m][.] TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 34 CTL EXCL 9/3588 7/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 1621255 m, 179277 m/sec, 8636466 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 14/3588 10/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 2455669 m, 166882 m/sec, 13452029 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 19/3588 14/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 3258075 m, 160481 m/sec, 18106337 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 24/3588 17/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 3989054 m, 146195 m/sec, 22553275 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 29/3588 20/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 4736519 m, 149493 m/sec, 27021925 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 34/3588 22/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 5452468 m, 143189 m/sec, 31450991 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 39/3588 25/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 6126118 m, 134730 m/sec, 35830492 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 44/3588 28/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 6754162 m, 125608 m/sec, 40160358 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 49/3588 30/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 7382904 m, 125748 m/sec, 44442975 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 54/3588 32/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 7949998 m, 113418 m/sec, 48694408 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 59/3588 34/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 8458776 m, 101755 m/sec, 52920071 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 64/3588 36/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 8921703 m, 92585 m/sec, 57157400 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 69/3588 38/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 9312140 m, 78087 m/sec, 61442927 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 74/3588 39/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 9597765 m, 57125 m/sec, 65805668 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 79/3588 40/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 9802819 m, 41010 m/sec, 70373807 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 84/3588 40/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 9803179 m, 72 m/sec, 73760624 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 89/3588 40/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 9803361 m, 36 m/sec, 77077667 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 94/3588 40/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 9803527 m, 33 m/sec, 80448377 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 99/3588 40/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 9803665 m, 27 m/sec, 83958250 t fired, .
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[[35mlola[0m][.] 34 CTL EXCL 104/3588 40/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 9803753 m, 17 m/sec, 87802926 t fired, .
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[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-08: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-09: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-12: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-13: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[32mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mTwoPhaseLocking-PT-nC00100vD-CTLCardinality-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 109/3588 40/2000 TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11 9803777 m, 4 m/sec, 92302263 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 121 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for TwoPhaseLocking-PT-nC00100vD-CTLCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 9803780
[[35mlola[0m][I] fired transitions : 92384204
[[35mlola[0m][I] time used : 109
[[35mlola[0m][I] memory pages used : 40
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TwoPhaseLocking-PT-nC00100vD"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is TwoPhaseLocking-PT-nC00100vD, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-smll-171690575100337"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TwoPhaseLocking-PT-nC00100vD.tgz
mv TwoPhaseLocking-PT-nC00100vD execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;