About the Execution of LoLA for TokenRing-COL-020
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16207.615 | 1917220.00 | 4600500.00 | 5865.50 | ??F???????T????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r423-smll-171690574600098.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is TokenRing-COL-020, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-smll-171690574600098
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 420K
-rw-r--r-- 1 mcc users 4.7K Apr 11 19:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 40K Apr 11 19:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.8K Apr 11 19:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 34K Apr 11 19:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 23 08:02 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 23 08:02 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 23 08:02 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 08:02 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 11 21:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Apr 11 21:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 11 20:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 79K Apr 11 20:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 08:02 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 08:02 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 18K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-00
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-01
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-02
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-03
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-04
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-05
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-06
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-07
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-08
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-09
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-10
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-11
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-12
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-13
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-14
FORMULA_NAME TokenRing-COL-020-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717062030619
FORMULA TokenRing-COL-020-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-020-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717063947839
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 53 (type SKEL/FNDP) for 34 TokenRing-COL-020-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 54 (type SKEL/EQUN) for 34 TokenRing-COL-020-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 55 (type SKEL/SRCH) for 34 TokenRing-COL-020-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 55 (type SKEL/SRCH) for TokenRing-COL-020-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 53 (type FNDP) for TokenRing-COL-020-CTLFireability-2024-10 (obsolete)
[[35mlola[0m][W] CANCELED task # 54 (type EQUN) for TokenRing-COL-020-CTLFireability-2024-10 (obsolete)
[[35mlola[0m][I] FINISHED task # 53 (type SKEL/FNDP) for TokenRing-COL-020-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] Places: 441, Transitions: 8421
[[35mlola[0m][I] FINISHED task # 54 (type SKEL/EQUN) for TokenRing-COL-020-CTLFireability-2024-10
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] findlow criterion satisfied
[[35mlola[0m][I] Time for checking findlow: 0
[[35mlola[0m][I] LAUNCH task # 56 (type SKEL/SRCH) for 43 TokenRing-COL-020-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 56 (type SKEL/SRCH) for TokenRing-COL-020-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 26 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 31 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-05: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 TokenRing-COL-020-CTLFireability-2024-11
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-03: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-04: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-06: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 1 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 38 CTL EXCL 2/209 1/2000 TokenRing-COL-020-CTLFireability-2024-11 41644 m, 8328 m/sec, 170449 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 10/209 1/2000 TokenRing-COL-020-CTLFireability-2024-11 174983 m, 26667 m/sec, 819285 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 1 0 0 0 2 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 0 0 0 1 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 16/209 2/2000 TokenRing-COL-020-CTLFireability-2024-11 353806 m, 35764 m/sec, 1820199 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-02: CONJ 1 1 0 0 2 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-10: EF 0 0 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 0 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 21/222 3/2000 TokenRing-COL-020-CTLFireability-2024-11 532430 m, 35724 m/sec, 2759308 t fired, .
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[[35mlola[0m][I] LAUNCH task # 58 (type FNDP) for 6 TokenRing-COL-020-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 59 (type EQUN) for 6 TokenRing-COL-020-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 58 (type FNDP) for TokenRing-COL-020-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 59 (type EQUN) for TokenRing-COL-020-CTLFireability-2024-02 (obsolete)
[[35mlola[0m][I] LAUNCH task # 61 (type FNDP) for 34 TokenRing-COL-020-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 62 (type EQUN) for 34 TokenRing-COL-020-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 67 (type EQUN) for 46 TokenRing-COL-020-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type FNDP) for TokenRing-COL-020-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 62 (type EQUN) for TokenRing-COL-020-CTLFireability-2024-10 (obsolete)
[[35mlola[0m][I] LAUNCH task # 69 (type EQUN) for 46 TokenRing-COL-020-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-020-CTLFireability-2024-02: CONJ false findpath[0m
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 2 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 26/254 4/2000 TokenRing-COL-020-CTLFireability-2024-11 675242 m, 28562 m/sec, 3560399 t fired, .
[[35mlola[0m][.] 67 EF STEQ 3/3533 0/5 TokenRing-COL-020-CTLFireability-2024-14 sara not yet started (preprocessing).
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 2 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 31/254 5/2000 TokenRing-COL-020-CTLFireability-2024-11 789512 m, 22854 m/sec, 4221277 t fired, .
[[35mlola[0m][.] 67 EF STEQ 8/3533 0/5 TokenRing-COL-020-CTLFireability-2024-14 sara not yet started (preprocessing).
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 2 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 38 CTL EXCL 36/254 5/2000 TokenRing-COL-020-CTLFireability-2024-11 893267 m, 20751 m/sec, 4825627 t fired, .
[[35mlola[0m][.] 67 EF STEQ 13/3533 0/5 TokenRing-COL-020-CTLFireability-2024-14 sara not yet started (preprocessing).
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[[35mlola[0m][I] FINISHED task # 59 (type EQUN) for TokenRing-COL-020-CTLFireability-2024-02
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[[35mlola[0m][I] FINISHED task # 67 (type EQUN) for TokenRing-COL-020-CTLFireability-2024-14
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 1 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 38 CTL EXCL 41/254 6/2000 TokenRing-COL-020-CTLFireability-2024-11 1013969 m, 24140 m/sec, 5604893 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 1 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 46/254 7/2000 TokenRing-COL-020-CTLFireability-2024-11 1094716 m, 16149 m/sec, 6163669 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 1 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 38 CTL EXCL 51/254 7/2000 TokenRing-COL-020-CTLFireability-2024-11 1228506 m, 26758 m/sec, 7032972 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 1 0 2 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 56/254 8/2000 TokenRing-COL-020-CTLFireability-2024-11 1388317 m, 31962 m/sec, 7976108 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 1 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 61/254 9/2000 TokenRing-COL-020-CTLFireability-2024-11 1557959 m, 33928 m/sec, 8863357 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 1 0 2 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 66/254 10/2000 TokenRing-COL-020-CTLFireability-2024-11 1721317 m, 32671 m/sec, 9782682 t fired, .
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[[35mlola[0m][.] 38 CTL EXCL 71/254 11/2000 TokenRing-COL-020-CTLFireability-2024-11 1880424 m, 31821 m/sec, 10703565 t fired, .
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[[35mlola[0m][.] 38 CTL EXCL 76/254 12/2000 TokenRing-COL-020-CTLFireability-2024-11 2040105 m, 31936 m/sec, 11630919 t fired, .
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[[35mlola[0m][.] 38 CTL EXCL 81/254 13/2000 TokenRing-COL-020-CTLFireability-2024-11 2188495 m, 29678 m/sec, 12596851 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 1 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 86/254 13/2000 TokenRing-COL-020-CTLFireability-2024-11 2333838 m, 29068 m/sec, 13590629 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 1 0 2 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 91/254 14/2000 TokenRing-COL-020-CTLFireability-2024-11 2485133 m, 30259 m/sec, 14570006 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 96/254 15/2000 TokenRing-COL-020-CTLFireability-2024-11 2645522 m, 32077 m/sec, 15490293 t fired, .
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[[35mlola[0m][.] 38 CTL EXCL 101/254 16/2000 TokenRing-COL-020-CTLFireability-2024-11 2804749 m, 31845 m/sec, 16413737 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 106/254 17/2000 TokenRing-COL-020-CTLFireability-2024-11 2950473 m, 29144 m/sec, 17383100 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 111/254 18/2000 TokenRing-COL-020-CTLFireability-2024-11 3103488 m, 30603 m/sec, 18392401 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 38 CTL EXCL 116/254 18/2000 TokenRing-COL-020-CTLFireability-2024-11 3266039 m, 32510 m/sec, 19375929 t fired, .
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[[35mlola[0m][.] 38 CTL EXCL 121/254 19/2000 TokenRing-COL-020-CTLFireability-2024-11 3418281 m, 30448 m/sec, 20413582 t fired, .
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[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-14: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] TokenRing-COL-020-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 44 CTL EXCL 245/253 20/2000 TokenRing-COL-020-CTLFireability-2024-13 3562680 m, 13497 m/sec, 42698494 t fired, .
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[[35mlola[0m][.] 44 CTL EXCL 250/253 20/2000 TokenRing-COL-020-CTLFireability-2024-13 3630727 m, 13609 m/sec, 43548664 t fired, .
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[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 TokenRing-COL-020-CTLFireability-2024-13
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[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for TokenRing-COL-020-CTLFireability-2024-08
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[[35mlola[0m][.] 44 CTL EXCL 4/253 1/5 TokenRing-COL-020-CTLFireability-2024-13 73319 m, -711481 m/sec, 663092 t fired, .
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[[35mlola[0m][.] 44 CTL EXCL 9/253 1/5 TokenRing-COL-020-CTLFireability-2024-13 158706 m, 17077 m/sec, 1478413 t fired, .
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[[35mlola[0m][.] 44 CTL EXCL 14/253 2/5 TokenRing-COL-020-CTLFireability-2024-13 243730 m, 17004 m/sec, 2332479 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 405 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TokenRing-COL-020"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is TokenRing-COL-020, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-smll-171690574600098"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TokenRing-COL-020.tgz
mv TokenRing-COL-020 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;