About the Execution of LoLA for TokenRing-COL-010
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 1497.439 | 15760.00 | 40772.00 | 112.50 | TFTTFTFFFFFTFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r423-smll-171690574500082.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is TokenRing-COL-010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r423-smll-171690574500082
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 444K
-rw-r--r-- 1 mcc users 7.5K Apr 11 19:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Apr 11 19:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K Apr 11 19:05 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Apr 11 19:05 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Apr 23 08:02 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 23 08:02 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Apr 23 08:02 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 23 08:02 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Apr 11 19:34 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 103K Apr 11 19:34 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Apr 11 19:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K Apr 11 19:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 08:02 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 08:02 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 13K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-00
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-01
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-02
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-03
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-04
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-05
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-06
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-07
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-08
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-09
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-10
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-11
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-12
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-13
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-14
FORMULA_NAME TokenRing-COL-010-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717059403039
FORMULA TokenRing-COL-010-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA TokenRing-COL-010-CTLFireability-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mTokenRing-COL-010-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m] [1m[32mTokenRing-COL-010-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mTokenRing-COL-010-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-04: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mTokenRing-COL-010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-09: DISJ false DISJ[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mTokenRing-COL-010-CTLFireability-2024-11: AXAG true state space /EXEF[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-14: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mTokenRing-COL-010-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 15 secs. Pages in use: 1
BK_STOP 1717059418799
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 69 (type SKEL/FNDP) for 3 TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 70 (type SKEL/EQUN) for 3 TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 71 (type SKEL/SRCH) for 3 TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 76 (type SKEL/EQUN) for 53 TokenRing-COL-010-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 71 (type SKEL/SRCH) for TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 69 (type FNDP) for TokenRing-COL-010-CTLFireability-2024-01 (obsolete)
[[35mlola[0m][W] CANCELED task # 70 (type EQUN) for TokenRing-COL-010-CTLFireability-2024-01 (obsolete)
[[35mlola[0m][I] LAUNCH task # 74 (type SKEL/SRCH) for 53 TokenRing-COL-010-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 69 (type SKEL/FNDP) for TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 74 (type SKEL/SRCH) for TokenRing-COL-010-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 76 (type EQUN) for TokenRing-COL-010-CTLFireability-2024-11 (obsolete)
[[35mlola[0m][I] Places: 121, Transitions: 1111
[[35mlola[0m][I] findlow criterion satisfied
[[35mlola[0m][I] Time for checking findlow: 0
[[35mlola[0m][I] LAUNCH task # 78 (type SKEL/SRCH) for 31 TokenRing-COL-010-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 78 (type SKEL/SRCH) for TokenRing-COL-010-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 76 (type SKEL/EQUN) for TokenRing-COL-010-CTLFireability-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 70 (type SKEL/EQUN) for TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 31 TokenRing-COL-010-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 83 (type EQUN) for 53 TokenRing-COL-010-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 58786
[[35mlola[0m][I] fired transitions : 293931
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 81 (type EXCL) for 53 TokenRing-COL-010-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 84 (type FNDP) for 3 TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 85 (type EQUN) for 3 TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 84 (type FNDP) for TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 85 (type EQUN) for TokenRing-COL-010-CTLFireability-2024-01 (obsolete)
[[35mlola[0m][I] FINISHED task # 81 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 58904
[[35mlola[0m][I] fired transitions : 294049
[[35mlola[0m][I] time used : 3
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 83 (type EQUN) for TokenRing-COL-010-CTLFireability-2024-11 (obsolete)
[[35mlola[0m][I] LAUNCH task # 63 (type EXCL) for 62 TokenRing-COL-010-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 63 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 164
[[35mlola[0m][I] fired transitions : 172
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 60 (type EXCL) for 59 TokenRing-COL-010-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mTokenRing-COL-010-CTLFireability-2024-11: AXAG true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-14: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-01: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-09: DISJ 0 2 0 0 6 0 0 4
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 60 CTL EXCL 0/239 1/2000 TokenRing-COL-010-CTLFireability-2024-13 23191 m, 4638 m/sec, 104261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 60 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 58905
[[35mlola[0m][I] fired transitions : 1176644
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 TokenRing-COL-010-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 58786
[[35mlola[0m][I] fired transitions : 705410
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 31 TokenRing-COL-010-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 31 TokenRing-COL-010-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 32123
[[35mlola[0m][I] fired transitions : 152251
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 TokenRing-COL-010-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 326 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-09: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mTokenRing-COL-010-CTLFireability-2024-11: AXAG true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-14: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-01: CONJ 0 1 0 0 5 0 0 2
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 CTL EXCL 1/326 1/2000 TokenRing-COL-010-CTLFireability-2024-08 49991 m, 9998 m/sec, 441518 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 58905
[[35mlola[0m][I] fired transitions : 529671
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 TokenRing-COL-010-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 154
[[35mlola[0m][I] fired transitions : 330
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 TokenRing-COL-010-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 398 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 58905
[[35mlola[0m][I] fired transitions : 294746
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 TokenRing-COL-010-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 448 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 58905
[[35mlola[0m][I] fired transitions : 646897
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 TokenRing-COL-010-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 512 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 58905
[[35mlola[0m][I] fired transitions : 647033
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 6 (type EXCL) for 3 TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 597 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 6 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 283
[[35mlola[0m][I] fired transitions : 292
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 TokenRing-COL-010-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 717 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 154
[[35mlola[0m][I] fired transitions : 462
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 TokenRing-COL-010-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 896 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 155
[[35mlola[0m][I] fired transitions : 299
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 TokenRing-COL-010-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 1195 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 58786
[[35mlola[0m][I] fired transitions : 352716
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 57 (type EXCL) for 56 TokenRing-COL-010-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 1793 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 57 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 155
[[35mlola[0m][I] fired transitions : 465
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 66 (type EXCL) for 65 TokenRing-COL-010-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 3586 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mTokenRing-COL-010-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[32mTokenRing-COL-010-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mTokenRing-COL-010-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mTokenRing-COL-010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-09: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mTokenRing-COL-010-CTLFireability-2024-11: AXAG true state space /EXEF[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mTokenRing-COL-010-CTLFireability-2024-14: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] TokenRing-COL-010-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 66 CTL EXCL 1/3586 1/2000 TokenRing-COL-010-CTLFireability-2024-15 58905 m, 11781 m/sec, 430451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 66 (type EXCL) for TokenRing-COL-010-CTLFireability-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 58905
[[35mlola[0m][I] fired transitions : 588723
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TokenRing-COL-010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is TokenRing-COL-010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r423-smll-171690574500082"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/TokenRing-COL-010.tgz
mv TokenRing-COL-010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;