About the Execution of LoLA for StigmergyElection-PT-10a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 3387.987 | 177560.00 | 192206.00 | 572.70 | FTTTTFFFTFTFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r401-tall-171690534300380.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is StigmergyElection-PT-10a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r401-tall-171690534300380
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 51M
-rw-r--r-- 1 mcc users 7.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Apr 23 08:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 23 08:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 23 08:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 08:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 11 19:58 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 117K Apr 11 19:58 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Apr 11 19:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 47K Apr 11 19:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 08:00 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 08:00 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 50M May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-00
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-01
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-02
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-03
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-04
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-05
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-06
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-07
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-08
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-09
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-10
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-11
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-12
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-13
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-14
FORMULA_NAME StigmergyElection-PT-10a-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717122372532
FORMULA StigmergyElection-PT-10a-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-10a-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-10a-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-10a-LTLFireability-01: CONJ true CONJ[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-10a-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-10a-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-10a-LTLFireability-04: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-10a-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-10a-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-10a-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-10a-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-10a-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-10a-LTLFireability-10: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-10a-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-10a-LTLFireability-12: CONJ false findpath[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-10a-LTLFireability-13: CONJ false findpath[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-10a-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-10a-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 177 secs. Pages in use: 71
BK_STOP 1717122550092
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-03: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-04: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-12: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-13: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 9 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 62 (type CNST) for 59 StigmergyElection-PT-10a-LTLFireability-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 62 (type CNST) for StigmergyElection-PT-10a-LTLFireability-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-12: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-13: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 14 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-05: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-06: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-12: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-13: CONJ 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 19 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-00: CONJ 0 0 0 0 3 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-01: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-02: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-03: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-04: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-05: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-06: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-07: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-08: LTL 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-09: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-10: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-11: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-12: CONJ 0 0 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-13: CONJ 0 0 0 0 2 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-14: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-15: LTL 0 0 0 0 0 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 24 secs. Pages in use: 0
[[35mlola[0m][.] # running tasks: 0 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 77 (type EXCL) for 0 StigmergyElection-PT-10a-LTLFireability-00
[[35mlola[0m][I] time limit : 162 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 80 (type EQUN) for 0 StigmergyElection-PT-10a-LTLFireability-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 77 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1023
[[35mlola[0m][I] fired transitions : 5110
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 80 (type EQUN) for StigmergyElection-PT-10a-LTLFireability-00 (obsolete)
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[[35mlola[0m][I] FINISHED task # 82 (type FNDP) for StigmergyElection-PT-10a-LTLFireability-13
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[[35mlola[0m][.] 37 LTL EXCL 0/238 1/2000 StigmergyElection-PT-10a-LTLFireability-08 22784 m, 4556 m/sec, 141758 t fired, .
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[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-07
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[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-04
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[[35mlola[0m][.] 22 LTL EXCL 1/297 1/2000 StigmergyElection-PT-10a-LTLFireability-03 82665 m, 16533 m/sec, 812862 t fired, .
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[[35mlola[0m][.] 22 LTL EXCL 6/297 3/2000 StigmergyElection-PT-10a-LTLFireability-03 431993 m, 69865 m/sec, 4170993 t fired, .
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[[35mlola[0m][.] 22 LTL EXCL 11/297 6/2000 StigmergyElection-PT-10a-LTLFireability-03 780530 m, 69707 m/sec, 8221142 t fired, .
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[[35mlola[0m][.] 22 LTL EXCL 16/297 8/2000 StigmergyElection-PT-10a-LTLFireability-03 1133232 m, 70540 m/sec, 12131270 t fired, .
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[[35mlola[0m][.] 22 LTL EXCL 21/297 10/2000 StigmergyElection-PT-10a-LTLFireability-03 1485580 m, 70469 m/sec, 16006724 t fired, .
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[[35mlola[0m][.] 22 LTL EXCL 31/297 15/2000 StigmergyElection-PT-10a-LTLFireability-03 2232001 m, 82818 m/sec, 23846247 t fired, .
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[[35mlola[0m][.] 22 LTL EXCL 36/297 18/2000 StigmergyElection-PT-10a-LTLFireability-03 2688051 m, 91210 m/sec, 28557342 t fired, .
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[[35mlola[0m][.] 22 LTL EXCL 41/297 21/2000 StigmergyElection-PT-10a-LTLFireability-03 3128120 m, 88013 m/sec, 33886939 t fired, .
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[[35mlola[0m][.] 22 LTL EXCL 117/297 59/2000 StigmergyElection-PT-10a-LTLFireability-03 8992762 m, 76492 m/sec, 106073889 t fired, .
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[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 22 LTL EXCL 122/297 61/2000 StigmergyElection-PT-10a-LTLFireability-03 9358024 m, 73052 m/sec, 111056741 t fired, .
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[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 22 LTL EXCL 127/297 64/2000 StigmergyElection-PT-10a-LTLFireability-03 9699373 m, 68269 m/sec, 115662369 t fired, .
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[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 22 LTL EXCL 132/297 66/2000 StigmergyElection-PT-10a-LTLFireability-03 10047017 m, 69528 m/sec, 120138717 t fired, .
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[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 22 LTL EXCL 137/297 68/2000 StigmergyElection-PT-10a-LTLFireability-03 10391491 m, 68894 m/sec, 124435426 t fired, .
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[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-10a-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 LTL EXCL 142/297 70/2000 StigmergyElection-PT-10a-LTLFireability-03 10734340 m, 68569 m/sec, 129185164 t fired, .
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[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 10873289
[[35mlola[0m][I] fired transitions : 130690470
[[35mlola[0m][I] time used : 144
[[35mlola[0m][I] memory pages used : 71
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 StigmergyElection-PT-10a-LTLFireability-02
[[35mlola[0m][I] time limit : 311 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 67
[[35mlola[0m][I] fired transitions : 111
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 11 StigmergyElection-PT-10a-LTLFireability-01
[[35mlola[0m][I] time limit : 342 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 9 (type EXCL) for 0 StigmergyElection-PT-10a-LTLFireability-00
[[35mlola[0m][I] time limit : 380 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 9 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 70 StigmergyElection-PT-10a-LTLFireability-14
[[35mlola[0m][I] time limit : 427 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 71 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 StigmergyElection-PT-10a-LTLFireability-11
[[35mlola[0m][I] time limit : 489 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 11 StigmergyElection-PT-10a-LTLFireability-01
[[35mlola[0m][I] time limit : 570 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 StigmergyElection-PT-10a-LTLFireability-10
[[35mlola[0m][I] time limit : 684 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1024
[[35mlola[0m][I] fired transitions : 5120
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 StigmergyElection-PT-10a-LTLFireability-06
[[35mlola[0m][I] time limit : 855 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20
[[35mlola[0m][I] fired transitions : 22
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 0 StigmergyElection-PT-10a-LTLFireability-00
[[35mlola[0m][I] time limit : 1141 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 16
[[35mlola[0m][I] fired transitions : 16
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 StigmergyElection-PT-10a-LTLFireability-05
[[35mlola[0m][I] time limit : 1711 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 524
[[35mlola[0m][I] fired transitions : 2317
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 74 (type EXCL) for 73 StigmergyElection-PT-10a-LTLFireability-15
[[35mlola[0m][I] time limit : 3423 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 74 (type EXCL) for StigmergyElection-PT-10a-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 13
[[35mlola[0m][I] fired transitions : 14
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-10a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is StigmergyElection-PT-10a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r401-tall-171690534300380"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-10a.tgz
mv StigmergyElection-PT-10a execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;