Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r401-tall-171690534100314.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is StigmergyElection-PT-06a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r401-tall-171690534100314
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 9.4K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 113K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 08:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 08:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 08:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 08:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 11 18:58 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 118K Apr 11 18:58 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 15K Apr 11 18:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 145K Apr 11 18:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 08:00 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 08:00 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 565K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-00
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-01
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-02
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-03
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-04
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-05
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-06
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-07
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-08
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-09
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-10
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2024-11
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2023-12
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2023-13
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2023-14
FORMULA_NAME StigmergyElection-PT-06a-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717113241189

FORMULA StigmergyElection-PT-06a-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2023-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-06a-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] StigmergyElection-PT-06a-CTLFireability-2024-00: LTL/CTL false LTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-01: CTL true CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-02: CTL false CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-03: CTL true CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-04: CTL false CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-05: CTL true CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-06: CTL false CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-07: CTL true CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-08: CTL true CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-09: CTL false CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-10: CTL false CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2024-11: CTL true CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2023-12: CTL false CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2023-13: CONJ false findpath
[lola] StigmergyElection-PT-06a-CTLFireability-2023-14: CTL false CTL model checker
[lola] StigmergyElection-PT-06a-CTLFireability-2023-15: CTL false CTL model checker
[lola]
[lola] Time elapsed: 1 secs. Pages in use: 1

BK_STOP 1717113242470

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 13 (type EXCL) for 12 StigmergyElection-PT-06a-CTLFireability-2024-04
[lola][I] time limit : 143 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 13 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-04
[lola][I] result : false
[lola][I] markings : 1098
[lola][I] fired transitions : 10012
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 37 (type EXCL) for 36 StigmergyElection-PT-06a-CTLFireability-2023-12
[lola][I] time limit : 149 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 53 (type FNDP) for 39 StigmergyElection-PT-06a-CTLFireability-2023-13
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 54 (type EQUN) for 39 StigmergyElection-PT-06a-CTLFireability-2023-13
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 37 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2023-12
[lola][I] result : false
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 55 (type EXCL) for 39 StigmergyElection-PT-06a-CTLFireability-2023-13
[lola][I] time limit : 163 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 55 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2023-13
[lola][I] result : false
[lola][I] markings : 5
[lola][I] fired transitions : 10
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 53 (type FNDP) for StigmergyElection-PT-06a-CTLFireability-2023-13 (obsolete)
[lola][W] CANCELED task # 54 (type EQUN) for StigmergyElection-PT-06a-CTLFireability-2023-13 (obsolete)
[lola][I] LAUNCH task # 47 (type EXCL) for 46 StigmergyElection-PT-06a-CTLFireability-2023-14
[lola][I] time limit : 179 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 57 (type FNDP) for 39 StigmergyElection-PT-06a-CTLFireability-2023-13
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 58 (type EQUN) for 39 StigmergyElection-PT-06a-CTLFireability-2023-13
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 57 (type FNDP) for StigmergyElection-PT-06a-CTLFireability-2023-13
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 58 (type EQUN) for StigmergyElection-PT-06a-CTLFireability-2023-13 (obsolete)
[lola][I] FINISHED task # 47 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2023-14
[lola][I] result : false
[lola][I] markings : 730
[lola][I] fired transitions : 5109
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] FINISHED task # 54 (type EQUN) for StigmergyElection-PT-06a-CTLFireability-2023-13
[lola][I] result : false
[lola][I] LAUNCH task # 16 (type EXCL) for 15 StigmergyElection-PT-06a-CTLFireability-2024-05
[lola][I] time limit : 257 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 58 (type EQUN) for StigmergyElection-PT-06a-CTLFireability-2023-13
[lola][I] result : true
[lola][I] FINISHED task # 16 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-05
[lola][I] result : true
[lola][I] markings : 170
[lola][I] fired transitions : 595
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 10 (type EXCL) for 9 StigmergyElection-PT-06a-CTLFireability-2024-03
[lola][I] time limit : 276 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 10 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-03
[lola][I] result : true
[lola][I] markings : 139
[lola][I] fired transitions : 572
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 34 (type EXCL) for 33 StigmergyElection-PT-06a-CTLFireability-2024-11
[lola][I] time limit : 299 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 34 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-11
[lola][I] result : true
[lola][I] markings : 730
[lola][I] fired transitions : 5829
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 28 (type EXCL) for 27 StigmergyElection-PT-06a-CTLFireability-2024-09
[lola][I] time limit : 359 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 28 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-09
[lola][I] result : false
[lola][I] markings : 14428
[lola][I] fired transitions : 82379
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 50 (type EXCL) for 49 StigmergyElection-PT-06a-CTLFireability-2023-15
[lola][I] time limit : 449 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 50 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2023-15
[lola][I] result : false
[lola][I] markings : 14
[lola][I] fired transitions : 15
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 25 (type EXCL) for 24 StigmergyElection-PT-06a-CTLFireability-2024-08
[lola][I] time limit : 514 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 25 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-08
[lola][I] result : true
[lola][I] markings : 70
[lola][I] fired transitions : 200
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 22 (type EXCL) for 21 StigmergyElection-PT-06a-CTLFireability-2024-07
[lola][I] time limit : 599 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 22 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-07
[lola][I] result : true
[lola][I] markings : 13
[lola][I] fired transitions : 28
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 19 (type EXCL) for 18 StigmergyElection-PT-06a-CTLFireability-2024-06
[lola][I] time limit : 719 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 19 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-06
[lola][I] result : false
[lola][I] markings : 1043
[lola][I] fired transitions : 9784
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 4 (type EXCL) for 3 StigmergyElection-PT-06a-CTLFireability-2024-01
[lola][I] time limit : 899 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 4 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-01
[lola][I] result : true
[lola][I] markings : 71
[lola][I] fired transitions : 229
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 1 (type EXCL) for 0 StigmergyElection-PT-06a-CTLFireability-2024-00
[lola][I] time limit : 1199 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 1 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-00
[lola][I] result : false
[lola][I] markings : 14
[lola][I] fired transitions : 14
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 31 (type EXCL) for 30 StigmergyElection-PT-06a-CTLFireability-2024-10
[lola][I] time limit : 1799 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 31 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-10
[lola][I] result : false
[lola][I] markings : 64
[lola][I] fired transitions : 257
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 7 (type EXCL) for 6 StigmergyElection-PT-06a-CTLFireability-2024-02
[lola][I] time limit : 3599 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 7 (type EXCL) for StigmergyElection-PT-06a-CTLFireability-2024-02
[lola][I] result : false
[lola][I] markings : 1092
[lola][I] fired transitions : 9962
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-06a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is StigmergyElection-PT-06a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r401-tall-171690534100314"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-06a.tgz
mv StigmergyElection-PT-06a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;