About the Execution of LoLA for StigmergyElection-PT-05b
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 5605.571 | 3600000.00 | 596254.00 | 11905.50 | [undef] | Time out reached |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r401-tall-171690534100307.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is StigmergyElection-PT-05b, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r401-tall-171690534100307
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 852K
-rw-r--r-- 1 mcc users 6.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 70K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 07:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 23 07:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 07:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 11 18:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 127K Apr 11 18:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Apr 11 18:44 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 44K Apr 11 18:44 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:59 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:59 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 428K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-00
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-01
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-02
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-03
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-04
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-05
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-06
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-07
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-08
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-09
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-10
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-11
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-12
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-13
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-14
FORMULA_NAME StigmergyElection-PT-05b-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717112328142
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 3 (type CNST) for 0 StigmergyElection-PT-05b-LTLCardinality-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 3 (type CNST) for StigmergyElection-PT-05b-LTLCardinality-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 11 (type CNST) for 10 StigmergyElection-PT-05b-LTLCardinality-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 41 (type CNST) for 40 StigmergyElection-PT-05b-LTLCardinality-12
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 47 (type CNST) for 46 StigmergyElection-PT-05b-LTLCardinality-14
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] LAUNCH task # 50 (type CNST) for 49 StigmergyElection-PT-05b-LTLCardinality-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 11 (type CNST) for StigmergyElection-PT-05b-LTLCardinality-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 50 (type CNST) for StigmergyElection-PT-05b-LTLCardinality-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 47 (type CNST) for StigmergyElection-PT-05b-LTLCardinality-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 41 (type CNST) for StigmergyElection-PT-05b-LTLCardinality-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 StigmergyElection-PT-05b-LTLCardinality-10
[[35mlola[0m][I] time limit : 296 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for StigmergyElection-PT-05b-LTLCardinality-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 13 StigmergyElection-PT-05b-LTLCardinality-03
[[35mlola[0m][I] time limit : 322 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for StigmergyElection-PT-05b-LTLCardinality-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 StigmergyElection-PT-05b-LTLCardinality-07
[[35mlola[0m][I] time limit : 355 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for StigmergyElection-PT-05b-LTLCardinality-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 15
[[35mlola[0m][I] fired transitions : 16
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 StigmergyElection-PT-05b-LTLCardinality-11
[[35mlola[0m][I] time limit : 394 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-03: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyElection-PT-05b-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mStigmergyElection-PT-05b-LTLCardinality-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-00: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-05: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 LTL EXCL 4/394 3/2000 StigmergyElection-PT-05b-LTLCardinality-11 372547 m, 74509 m/sec, 1785636 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 52 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-03: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyElection-PT-05b-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mStigmergyElection-PT-05b-LTLCardinality-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-00: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-05: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 LTL EXCL 9/394 6/2000 StigmergyElection-PT-05b-LTLCardinality-11 770717 m, 79634 m/sec, 3768110 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 57 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-02: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-03: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyElection-PT-05b-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mStigmergyElection-PT-05b-LTLCardinality-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-00: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-05: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 LTL EXCL 14/394 8/2000 StigmergyElection-PT-05b-LTLCardinality-11 1183308 m, 82518 m/sec, 5653348 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 62 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
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[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-03: LTL/CTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyElection-PT-05b-LTLCardinality-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-10: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-12: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[32mStigmergyElection-PT-05b-LTLCardinality-14: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mStigmergyElection-PT-05b-LTLCardinality-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-00: CONJ 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-05: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-06: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] StigmergyElection-PT-05b-LTLCardinality-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 38 LTL EXCL 19/394 11/2000 StigmergyElection-PT-05b-LTLCardinality-11 1565151 m, 76368 m/sec, 7405412 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] 38 LTL EXCL 24/394 14/2000 StigmergyElection-PT-05b-LTLCardinality-11 1949217 m, 76813 m/sec, 9172198 t fired, .
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[[35mlola[0m][.] 38 LTL EXCL 29/394 16/2000 StigmergyElection-PT-05b-LTLCardinality-11 2370576 m, 84271 m/sec, 11079370 t fired, .
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[[35mlola[0m][.] 38 LTL EXCL 34/394 19/2000 StigmergyElection-PT-05b-LTLCardinality-11 2760587 m, 78002 m/sec, 12855329 t fired, .
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[[35mlola[0m][.] 38 LTL EXCL 64/394 34/2000 StigmergyElection-PT-05b-LTLCardinality-11 4993257 m, 68364 m/sec, 22953562 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 3/435 3/2000 StigmergyElection-PT-05b-LTLCardinality-13 294467 m, 58893 m/sec, 1441654 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 8/435 6/2000 StigmergyElection-PT-05b-LTLCardinality-13 698911 m, 80888 m/sec, 3344376 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 13/435 8/2000 StigmergyElection-PT-05b-LTLCardinality-13 1092434 m, 78704 m/sec, 5132241 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 18/435 11/2000 StigmergyElection-PT-05b-LTLCardinality-13 1494181 m, 80349 m/sec, 6954431 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 23/435 14/2000 StigmergyElection-PT-05b-LTLCardinality-13 1886104 m, 78384 m/sec, 8692621 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 28/435 17/2000 StigmergyElection-PT-05b-LTLCardinality-13 2247378 m, 72254 m/sec, 10317844 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 43/435 25/2000 StigmergyElection-PT-05b-LTLCardinality-13 3301498 m, 77497 m/sec, 15444182 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 48/435 28/2000 StigmergyElection-PT-05b-LTLCardinality-13 3698968 m, 79494 m/sec, 17329959 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 53/435 31/2000 StigmergyElection-PT-05b-LTLCardinality-13 4077934 m, 75793 m/sec, 19164718 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 413/435 233/2000 StigmergyElection-PT-05b-LTLCardinality-13 30930812 m, 67793 m/sec, 148930539 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 418/435 235/2000 StigmergyElection-PT-05b-LTLCardinality-13 31285863 m, 71010 m/sec, 150630295 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 423/435 238/2000 StigmergyElection-PT-05b-LTLCardinality-13 31561619 m, 55151 m/sec, 152340740 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 428/435 240/2000 StigmergyElection-PT-05b-LTLCardinality-13 31932460 m, 74168 m/sec, 154217484 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 433/435 243/2000 StigmergyElection-PT-05b-LTLCardinality-13 32292907 m, 72089 m/sec, 156143085 t fired, .
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[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 StigmergyElection-PT-05b-LTLCardinality-13
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[[35mlola[0m][I] time limit : 506 sec
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[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for StigmergyElection-PT-05b-LTLCardinality-08
[[35mlola[0m][I] result : true
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[[35mlola[0m][I] time limit : 607 sec
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[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for StigmergyElection-PT-05b-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 234
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[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 StigmergyElection-PT-05b-LTLCardinality-05
[[35mlola[0m][I] time limit : 759 sec
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[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for StigmergyElection-PT-05b-LTLCardinality-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 234
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[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 StigmergyElection-PT-05b-LTLCardinality-04
[[35mlola[0m][I] time limit : 1012 sec
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[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for StigmergyElection-PT-05b-LTLCardinality-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 21
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 7 StigmergyElection-PT-05b-LTLCardinality-01
[[35mlola[0m][I] time limit : 1519 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for StigmergyElection-PT-05b-LTLCardinality-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 5 (type EXCL) for 0 StigmergyElection-PT-05b-LTLCardinality-00
[[35mlola[0m][I] time limit : 3038 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 5 (type EXCL) for StigmergyElection-PT-05b-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 234
[[35mlola[0m][I] fired transitions : 234
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-05b"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is StigmergyElection-PT-05b, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r401-tall-171690534100307"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-05b.tgz
mv StigmergyElection-PT-05b execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;