About the Execution of LoLA for StigmergyElection-PT-03a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
84.644 | 335.00 | 141.00 | 0.00 | FTTTFTTFFTTFFTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r401-tall-171690534000266.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is StigmergyElection-PT-03a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r401-tall-171690534000266
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 512K
-rw-r--r-- 1 mcc users 8.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 93K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Apr 23 07:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 23 07:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 11 18:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 130K Apr 11 18:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Apr 11 18:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Apr 11 18:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:59 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:59 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 31K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-00
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-01
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-02
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-03
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-04
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-05
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-06
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-07
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-08
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-09
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-10
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2024-11
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2023-12
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2023-13
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2023-14
FORMULA_NAME StigmergyElection-PT-03a-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717110815178
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2023-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2023-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyElection-PT-03a-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-03a-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-03a-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-03a-CTLFireability-2024-02: EG true state space / EG[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-03a-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-03a-CTLFireability-2024-04: CONJ false CTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-03a-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-03a-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-03a-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-03a-CTLFireability-2024-08: EG false state space / EG[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-03a-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-03a-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-03a-CTLFireability-2024-11: EG false state space / EG[0m
[[35mlola[0m] [1m[31mStigmergyElection-PT-03a-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-03a-CTLFireability-2023-13: CONJ true CONJ[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-03a-CTLFireability-2023-14: DISJ true CTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyElection-PT-03a-CTLFireability-2023-15: DISJ true CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 0 secs. Pages in use: 1
BK_STOP 1717110815513
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 StigmergyElection-PT-03a-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 150 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 13
[[35mlola[0m][I] fired transitions : 29
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 12 StigmergyElection-PT-03a-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 180 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 16
[[35mlola[0m][I] fired transitions : 53
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 StigmergyElection-PT-03a-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 180 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 73 (type EQUN) for 6 StigmergyElection-PT-03a-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 76 (type EQUN) for 28 StigmergyElection-PT-03a-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 14
[[35mlola[0m][I] fired transitions : 32
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 43 StigmergyElection-PT-03a-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 200 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 80 (type EQUN) for 37 StigmergyElection-PT-03a-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 76 (type EQUN) for StigmergyElection-PT-03a-CTLFireability-2024-08
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 84 (type EXCL) for 61 StigmergyElection-PT-03a-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 89 (type EQUN) for 61 StigmergyElection-PT-03a-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 73 (type EQUN) for StigmergyElection-PT-03a-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 87 (type EQUN) for 43 StigmergyElection-PT-03a-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 84 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2023-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 89 (type EQUN) for StigmergyElection-PT-03a-CTLFireability-2023-15 (obsolete)
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 50 StigmergyElection-PT-03a-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 59 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2023-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 50 StigmergyElection-PT-03a-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 StigmergyElection-PT-03a-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 89 (type EQUN) for StigmergyElection-PT-03a-CTLFireability-2023-15
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2023-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 227
[[35mlola[0m][I] fired transitions : 1031
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 StigmergyElection-PT-03a-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 300 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 80 (type EQUN) for StigmergyElection-PT-03a-CTLFireability-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 17
[[35mlola[0m][I] fired transitions : 32
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 StigmergyElection-PT-03a-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 StigmergyElection-PT-03a-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 360 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 227
[[35mlola[0m][I] fired transitions : 1096
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 StigmergyElection-PT-03a-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 400 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 15 (type EXCL) for 12 StigmergyElection-PT-03a-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 450 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 15 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 StigmergyElection-PT-03a-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 87 (type EQUN) for StigmergyElection-PT-03a-CTLFireability-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 227
[[35mlola[0m][I] fired transitions : 1202
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 82 (type EXCL) for 43 StigmergyElection-PT-03a-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 600 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 82 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2023-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 9
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 72 (type EXCL) for 37 StigmergyElection-PT-03a-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 720 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 72 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 28 StigmergyElection-PT-03a-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 900 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 71 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL) for 6 StigmergyElection-PT-03a-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 1200 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 68 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 64 (type EXCL) for 61 StigmergyElection-PT-03a-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 1800 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 64 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2023-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 44
[[35mlola[0m][I] fired transitions : 171
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 StigmergyElection-PT-03a-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 3600 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for StigmergyElection-PT-03a-CTLFireability-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 22
[[35mlola[0m][I] fired transitions : 78
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyElection-PT-03a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is StigmergyElection-PT-03a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r401-tall-171690534000266"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/StigmergyElection-PT-03a.tgz
mv StigmergyElection-PT-03a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;