About the Execution of LoLA for StigmergyCommit-PT-05a
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 336.020 | 14176.00 | 14714.00 | 80.70 | FTTFFTFFFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r401-tall-171690533700140.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is StigmergyCommit-PT-05a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r401-tall-171690533700140
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 984K
-rw-r--r-- 1 mcc users 6.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 35K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 07:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.2K Apr 11 17:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Apr 11 17:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Apr 11 17:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 60K Apr 11 17:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:59 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:59 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 613K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-00
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-01
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-02
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-03
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-04
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-05
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-06
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-07
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-08
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-09
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-10
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-11
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-12
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-13
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-14
FORMULA_NAME StigmergyCommit-PT-05a-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717088400208
FORMULA StigmergyCommit-PT-05a-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyCommit-PT-05a-LTLFireability-01: LTL true LTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyCommit-PT-05a-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mStigmergyCommit-PT-05a-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-11: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m] [1m[31mStigmergyCommit-PT-05a-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 14 secs. Pages in use: 6
BK_STOP 1717088414384
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 StigmergyCommit-PT-05a-LTLFireability-00
[[35mlola[0m][I] time limit : 112 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 7
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 StigmergyCommit-PT-05a-LTLFireability-03
[[35mlola[0m][I] time limit : 116 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 13
[[35mlola[0m][I] fired transitions : 14
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 51 StigmergyCommit-PT-05a-LTLFireability-13
[[35mlola[0m][I] time limit : 120 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 10
[[35mlola[0m][I] fired transitions : 10
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 StigmergyCommit-PT-05a-LTLFireability-05
[[35mlola[0m][I] time limit : 150 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 151264
[[35mlola[0m][I] fired transitions : 782727
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL) for 61 StigmergyCommit-PT-05a-LTLFireability-15
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 62 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 20903
[[35mlola[0m][I] fired transitions : 149909
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 54 StigmergyCommit-PT-05a-LTLFireability-14
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 59 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1078
[[35mlola[0m][I] fired transitions : 6448
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 44 StigmergyCommit-PT-05a-LTLFireability-12
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 48
[[35mlola[0m][I] fired transitions : 48
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 37 StigmergyCommit-PT-05a-LTLFireability-11
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 48
[[35mlola[0m][I] fired transitions : 48
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 StigmergyCommit-PT-05a-LTLFireability-10
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 48
[[35mlola[0m][I] fired transitions : 48
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 StigmergyCommit-PT-05a-LTLFireability-09
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 54
[[35mlola[0m][I] fired transitions : 59
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 21 StigmergyCommit-PT-05a-LTLFireability-07
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 190969
[[35mlola[0m][I] fired transitions : 1069785
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 24 (type EXCL) for 21 StigmergyCommit-PT-05a-LTLFireability-07
[[35mlola[0m][I] time limit : 599 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 24 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 19781
[[35mlola[0m][I] fired transitions : 143398
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 StigmergyCommit-PT-05a-LTLFireability-04
[[35mlola[0m][I] time limit : 719 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 48
[[35mlola[0m][I] fired transitions : 48
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 StigmergyCommit-PT-05a-LTLFireability-02
[[35mlola[0m][I] time limit : 899 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyCommit-PT-05a-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-11: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] StigmergyCommit-PT-05a-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyCommit-PT-05a-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] StigmergyCommit-PT-05a-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyCommit-PT-05a-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 3/899 3/2000 StigmergyCommit-PT-05a-LTLFireability-02 455641 m, 91128 m/sec, 3370413 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 605053
[[35mlola[0m][I] fired transitions : 4696360
[[35mlola[0m][I] time used : 4
[[35mlola[0m][I] memory pages used : 4
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 StigmergyCommit-PT-05a-LTLFireability-01
[[35mlola[0m][I] time limit : 1198 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyCommit-PT-05a-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mStigmergyCommit-PT-05a-LTLFireability-05: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-07: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-11: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-14: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mStigmergyCommit-PT-05a-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] StigmergyCommit-PT-05a-LTLFireability-01: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] StigmergyCommit-PT-05a-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] StigmergyCommit-PT-05a-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 4 LTL EXCL 4/1198 4/2000 StigmergyCommit-PT-05a-LTLFireability-01 563334 m, 112666 m/sec, 4500695 t fired, .
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[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 907562
[[35mlola[0m][I] fired transitions : 9047842
[[35mlola[0m][I] time used : 8
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[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 StigmergyCommit-PT-05a-LTLFireability-06
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[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-06
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 StigmergyCommit-PT-05a-LTLFireability-08
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[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for StigmergyCommit-PT-05a-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 26
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyCommit-PT-05a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is StigmergyCommit-PT-05a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r401-tall-171690533700140"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/StigmergyCommit-PT-05a.tgz
mv StigmergyCommit-PT-05a execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;