Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r401-tall-171690533700138.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is StigmergyCommit-PT-05a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r401-tall-171690533700138
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 984K
-rw-r--r-- 1 mcc users 6.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 35K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:59 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 07:59 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:59 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:59 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.2K Apr 11 17:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 95K Apr 11 17:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Apr 11 17:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 60K Apr 11 17:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:59 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:59 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 613K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-00
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-01
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-02
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-03
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-04
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-05
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-06
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-07
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-08
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-09
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-10
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2024-11
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2023-12
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2023-13
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2023-14
FORMULA_NAME StigmergyCommit-PT-05a-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717088356174

FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2023-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA StigmergyCommit-PT-05a-CTLFireability-2023-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-00: EF true findpath
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-01: CTL true CTL model checker
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-02: CTL true CTL model checker
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-03: CTL false CTL model checker
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-04: CTL true CTL model checker
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-05: CTL false CTL model checker
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-06: EFEG true state space /EFEG
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-07: AG false findpath
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-08: EF true findpath
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-09: CTL true CTL model checker
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-10: CTL false CTL model checker
[lola] StigmergyCommit-PT-05a-CTLFireability-2024-11: EF true findpath
[lola] StigmergyCommit-PT-05a-CTLFireability-2023-12: AG false findpath
[lola] StigmergyCommit-PT-05a-CTLFireability-2023-13: CTL true CTL model checker
[lola] StigmergyCommit-PT-05a-CTLFireability-2023-14: CTL true CTL model checker
[lola] StigmergyCommit-PT-05a-CTLFireability-2023-15: CTL true CTL model checker
[lola]
[lola] Time elapsed: 2 secs. Pages in use: 2

BK_STOP 1717088358756

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 48 (type EXCL) for 18 StigmergyCommit-PT-05a-CTLFireability-2024-06
[lola][I] time limit : 189 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 51 (type EQUN) for 18 StigmergyCommit-PT-05a-CTLFireability-2024-06
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 53 (type EQUN) for 18 StigmergyCommit-PT-05a-CTLFireability-2024-06
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 48 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2024-06
[lola][I] result : true
[lola][I] markings : 7
[lola][I] fired transitions : 7
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 51 (type EQUN) for StigmergyCommit-PT-05a-CTLFireability-2024-06 (obsolete)
[lola][W] CANCELED task # 53 (type EQUN) for StigmergyCommit-PT-05a-CTLFireability-2024-06 (obsolete)
[lola][I] FINISHED task # 53 (type EQUN) for StigmergyCommit-PT-05a-CTLFireability-2024-06
[lola][I] result : true
[lola][I] LAUNCH task # 7 (type EXCL) for 6 StigmergyCommit-PT-05a-CTLFireability-2024-02
[lola][I] time limit : 257 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 55 (type FNDP) for 21 StigmergyCommit-PT-05a-CTLFireability-2024-07
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 56 (type EQUN) for 21 StigmergyCommit-PT-05a-CTLFireability-2024-07
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 7 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2024-02
[lola][I] result : true
[lola][I] markings : 304
[lola][I] fired transitions : 367
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 4 (type EXCL) for 3 StigmergyCommit-PT-05a-CTLFireability-2024-01
[lola][I] time limit : 327 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 4 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2024-01
[lola][I] result : true
[lola][I] markings : 40
[lola][I] fired transitions : 40
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 57 (type EXCL) for 21 StigmergyCommit-PT-05a-CTLFireability-2024-07
[lola][I] time limit : 359 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 55 (type FNDP) for StigmergyCommit-PT-05a-CTLFireability-2024-07
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 56 (type EQUN) for StigmergyCommit-PT-05a-CTLFireability-2024-07 (obsolete)
[lola][W] CANCELED task # 57 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2024-07 (obsolete)
[lola][I] LAUNCH task # 28 (type EXCL) for 27 StigmergyCommit-PT-05a-CTLFireability-2024-09
[lola][I] time limit : 399 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 28 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2024-09
[lola][I] result : true
[lola][I] markings : 69
[lola][I] fired transitions : 214
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 40 (type EXCL) for 39 StigmergyCommit-PT-05a-CTLFireability-2023-13
[lola][I] time limit : 399 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 60 (type FNDP) for 33 StigmergyCommit-PT-05a-CTLFireability-2024-11
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 61 (type EQUN) for 33 StigmergyCommit-PT-05a-CTLFireability-2024-11
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 51 (type EQUN) for StigmergyCommit-PT-05a-CTLFireability-2024-06
[lola][I] result : unknown
[lola][I] LAUNCH task # 59 (type FNDP) for 24 StigmergyCommit-PT-05a-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 59 (type FNDP) for StigmergyCommit-PT-05a-CTLFireability-2024-08
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] LAUNCH task # 68 (type FNDP) for 0 StigmergyCommit-PT-05a-CTLFireability-2024-00
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 68 (type FNDP) for StigmergyCommit-PT-05a-CTLFireability-2024-00
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] LAUNCH task # 63 (type FNDP) for 36 StigmergyCommit-PT-05a-CTLFireability-2023-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 60 (type FNDP) for StigmergyCommit-PT-05a-CTLFireability-2024-11
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 61 (type EQUN) for StigmergyCommit-PT-05a-CTLFireability-2024-11 (obsolete)
[lola][I] LAUNCH task # 64 (type EQUN) for 36 StigmergyCommit-PT-05a-CTLFireability-2023-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 63 (type FNDP) for StigmergyCommit-PT-05a-CTLFireability-2023-12
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 64 (type EQUN) for StigmergyCommit-PT-05a-CTLFireability-2023-12 (obsolete)
[lola][I] FINISHED task # 56 (type EQUN) for StigmergyCommit-PT-05a-CTLFireability-2024-07
[lola][I] result : true
[lola][I] FINISHED task # 64 (type EQUN) for StigmergyCommit-PT-05a-CTLFireability-2023-12
[lola][I] result : true
[lola][I] FINISHED task # 40 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2023-13
[lola][I] result : true
[lola][I] markings : 81782
[lola][I] fired transitions : 620160
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 31 (type EXCL) for 30 StigmergyCommit-PT-05a-CTLFireability-2024-10
[lola][I] time limit : 599 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 31 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2024-10
[lola][I] result : false
[lola][I] markings : 76397
[lola][I] fired transitions : 359217
[lola][I] time used : 1
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 16 (type EXCL) for 15 StigmergyCommit-PT-05a-CTLFireability-2024-05
[lola][I] time limit : 719 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 16 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2024-05
[lola][I] result : false
[lola][I] markings : 310
[lola][I] fired transitions : 465
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 13 (type EXCL) for 12 StigmergyCommit-PT-05a-CTLFireability-2024-04
[lola][I] time limit : 899 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 13 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2024-04
[lola][I] result : true
[lola][I] markings : 14506
[lola][I] fired transitions : 82405
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 10 (type EXCL) for 9 StigmergyCommit-PT-05a-CTLFireability-2024-03
[lola][I] time limit : 1199 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 10 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2024-03
[lola][I] result : false
[lola][I] markings : 61940
[lola][I] fired transitions : 295391
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 43 (type EXCL) for 42 StigmergyCommit-PT-05a-CTLFireability-2023-14
[lola][I] time limit : 1799 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 43 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2023-14
[lola][I] result : true
[lola][I] markings : 23
[lola][I] fired transitions : 26
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 46 (type EXCL) for 45 StigmergyCommit-PT-05a-CTLFireability-2023-15
[lola][I] time limit : 3598 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 46 (type EXCL) for StigmergyCommit-PT-05a-CTLFireability-2023-15
[lola][I] result : true
[lola][I] markings : 20
[lola][I] fired transitions : 37
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="StigmergyCommit-PT-05a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is StigmergyCommit-PT-05a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r401-tall-171690533700138"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/StigmergyCommit-PT-05a.tgz
mv StigmergyCommit-PT-05a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;