Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r399-tall-171690530500498.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is Sudoku-COL-AN12, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r399-tall-171690530500498
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 432K
-rw-r--r-- 1 mcc users 7.1K Apr 12 11:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Apr 12 11:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Apr 12 11:04 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Apr 12 11:04 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Apr 23 08:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 08:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 08:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 08:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.1K Apr 12 12:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 75K Apr 12 12:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Apr 12 11:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 85K Apr 12 11:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 08:00 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 08:00 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-00
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-01
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-02
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-03
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-04
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-05
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-06
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-07
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-08
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-09
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-10
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-11
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-12
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-13
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-14
FORMULA_NAME Sudoku-COL-AN12-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717040406097

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Sudoku-COL-AN12
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-30 03:40:07] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-30 03:40:07] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-30 03:40:07] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2024-05-30 03:40:07] [WARNING] Using fallBack plugin, rng conformance not checked
[2024-05-30 03:40:07] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 523 ms
[2024-05-30 03:40:07] [INFO ] Imported 4 HL places and 1 HL transitions for a total of 2160 PT places and 1728.0 transition bindings in 13 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 30 ms.
[2024-05-30 03:40:07] [INFO ] Built PT skeleton of HLPN with 4 places and 1 transitions 4 arcs in 3 ms.
[2024-05-30 03:40:07] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 4 stabilizing places and 1 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 4 transition count 1
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 9 formulas.
FORMULA Sudoku-COL-AN12-CTLFireability-2024-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN12-CTLFireability-2024-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Sudoku-COL-AN12-CTLFireability-2024-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 1 properties that can be checked using skeleton over-approximation.
Computed a total of 4 stabilizing places and 1 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 4 transition count 1
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
RANDOM walk for 0 steps (0 resets) in 4 ms. (0 steps per ms) remains 0/0 properties
Finished probabilistic random walk after 0 steps, run visited all 0 properties in 0 ms. (steps per millisecond=0 )
[2024-05-30 03:40:08] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-05-30 03:40:08] [INFO ] Flatten gal took : 13 ms
FORMULA Sudoku-COL-AN12-CTLFireability-2024-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-30 03:40:08] [INFO ] Flatten gal took : 0 ms
Domain [N(12), N(12)] of place Rows breaks symmetries in sort N
[2024-05-30 03:40:08] [INFO ] Unfolded HLPN to a Petri net with 2160 places and 1728 transitions 6912 arcs in 48 ms.
[2024-05-30 03:40:08] [INFO ] Unfolded 12 HLPN properties in 18 ms.
Support contains 432 out of 2160 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2160/2160 places, 1728/1728 transitions.
Reduce places removed 1728 places and 0 transitions.
Iterating post reduction 0 with 1728 rules applied. Total rules applied 1728 place count 432 transition count 1728
Applied a total of 1728 rules in 45 ms. Remains 432 /2160 variables (removed 1728) and now considering 1728/1728 (removed 0) transitions.
// Phase 1: matrix 1728 rows 432 cols
[2024-05-30 03:40:28] [INFO ] Computed 35 invariants in 106 ms
[2024-05-30 03:40:28] [INFO ] Implicit Places using invariants in 404 ms returned []
[2024-05-30 03:40:28] [INFO ] Invariant cache hit.
[2024-05-30 03:40:29] [INFO ] Implicit Places using invariants and state equation in 1015 ms returned []
Implicit Place search using SMT with State Equation took 1449 ms to find 0 implicit places.
Running 0 sub problems to find dead transitions.
Search for dead transitions found 0 dead transitions in 2ms
Starting structural reductions in LTL mode, iteration 1 : 432/2160 places, 1728/1728 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1509 ms. Remains : 432/2160 places, 1728/1728 transitions.
Support contains 432 out of 432 places after structural reductions.
[2024-05-30 03:40:32] [INFO ] Flatten gal took : 1005 ms
[2024-05-30 03:40:42] [INFO ] Flatten gal took : 1293 ms
[2024-05-30 03:40:52] [INFO ] Input system was already deterministic with 1728 transitions.
Reduction of identical properties reduced properties to check from 12 to 4
RANDOM walk for 40000 steps (315 resets) in 5555 ms. (7 steps per ms) remains 2/4 properties
BEST_FIRST walk for 24620 steps (4 resets) in 21479 ms. (1 steps per ms) remains 2/2 properties
BEST_FIRST walk for 27396 steps (4 resets) in 21219 ms. (1 steps per ms) remains 2/2 properties
[2024-05-30 03:41:05] [INFO ] Invariant cache hit.
Problem AtomicPropp9 is UNSAT
Problem AtomicPropp11 is UNSAT
After SMT solving in domain Real declared 432/2160 variables, and 0 constraints, problems are : Problem set: 2 solved, 0 unsolved in 188 ms.
Refiners :[Generalized P Invariants (flows): 0/35 constraints, State Equation: 0/432 constraints, PredecessorRefiner: 0/0 constraints, Known Traps: 0/0 constraints]
After SMT, in 9049ms problems are : Problem set: 2 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 2 atomic propositions for a total of 12 simplifications.
[2024-05-30 03:41:24] [INFO ] Flatten gal took : 819 ms
[2024-05-30 03:41:34] [INFO ] Flatten gal took : 1141 ms
[2024-05-30 03:41:43] [INFO ] Input system was already deterministic with 1728 transitions.
Computed a total of 432 stabilizing places and 1728 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 432 transition count 1728
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in SI_CTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 16 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:41:51] [INFO ] Flatten gal took : 130 ms
[2024-05-30 03:41:51] [INFO ] Flatten gal took : 177 ms
[2024-05-30 03:41:52] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:41:52] [INFO ] Flatten gal took : 71 ms
[2024-05-30 03:41:52] [INFO ] Flatten gal took : 93 ms
[2024-05-30 03:41:52] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 5 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:41:53] [INFO ] Flatten gal took : 86 ms
[2024-05-30 03:41:53] [INFO ] Flatten gal took : 121 ms
[2024-05-30 03:41:53] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:41:53] [INFO ] Flatten gal took : 70 ms
[2024-05-30 03:41:53] [INFO ] Flatten gal took : 91 ms
[2024-05-30 03:41:54] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 4 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:41:54] [INFO ] Flatten gal took : 120 ms
[2024-05-30 03:41:54] [INFO ] Flatten gal took : 169 ms
[2024-05-30 03:41:54] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:41:55] [INFO ] Flatten gal took : 83 ms
[2024-05-30 03:41:56] [INFO ] Flatten gal took : 115 ms
[2024-05-30 03:41:56] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:41:56] [INFO ] Flatten gal took : 67 ms
[2024-05-30 03:41:56] [INFO ] Flatten gal took : 83 ms
[2024-05-30 03:41:56] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:41:57] [INFO ] Flatten gal took : 87 ms
[2024-05-30 03:41:57] [INFO ] Flatten gal took : 120 ms
[2024-05-30 03:41:57] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 13 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:41:57] [INFO ] Flatten gal took : 119 ms
[2024-05-30 03:41:58] [INFO ] Flatten gal took : 167 ms
[2024-05-30 03:41:58] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 13 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:41:59] [INFO ] Flatten gal took : 108 ms
[2024-05-30 03:41:59] [INFO ] Flatten gal took : 147 ms
[2024-05-30 03:42:00] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:42:04] [INFO ] Flatten gal took : 228 ms
[2024-05-30 03:42:05] [INFO ] Flatten gal took : 358 ms
[2024-05-30 03:42:06] [INFO ] Input system was already deterministic with 1728 transitions.
Starting structural reductions in LTL mode, iteration 0 : 432/432 places, 1728/1728 transitions.
Applied a total of 0 rules in 3 ms. Remains 432 /432 variables (removed 0) and now considering 1728/1728 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 432/432 places, 1728/1728 transitions.
[2024-05-30 03:42:06] [INFO ] Flatten gal took : 175 ms
[2024-05-30 03:42:07] [INFO ] Flatten gal took : 266 ms
[2024-05-30 03:42:07] [INFO ] Input system was already deterministic with 1728 transitions.
[2024-05-30 03:42:09] [INFO ] Flatten gal took : 1302 ms
[2024-05-30 03:42:20] [INFO ] Flatten gal took : 1306 ms
[2024-05-30 03:42:30] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 360 ms.
[2024-05-30 03:42:30] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 432 places, 1728 transitions and 5184 arcs took 9 ms.
Total runtime 143420 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running Sudoku-COL-AN12

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/412/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 432
TRANSITIONS: 1728
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.036s, Sys 0.003s]


SAVING FILE /home/mcc/execution/412/model (.net / .def) ...
EXPORT TIME: [User 0.002s, Sys 0.003s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 569
MODEL NAME: /home/mcc/execution/412/model
432 places, 1728 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Sudoku-COL-AN12"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is Sudoku-COL-AN12, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r399-tall-171690530500498"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Sudoku-COL-AN12.tgz
mv Sudoku-COL-AN12 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;