Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r395-smll-171683824000099.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool gold2023
Input is SimpleLoadBal-PT-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r395-smll-171683824000099
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 768K
-rw-r--r-- 1 mcc users 8.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 5.7K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 32K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Apr 23 07:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 22K Apr 23 07:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 23K Apr 13 12:09 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 196K Apr 13 12:09 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 17K Apr 13 12:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 107K Apr 13 12:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 155K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-01
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-02
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-03
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-06
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-07
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-08
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-09
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-11
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-12
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-13
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-14
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-2024-15

=== Now, execution of the tool begins

BK_START 1716949040198

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=gold2023
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SimpleLoadBal-PT-05
Applying reductions before tool lola
Invoking reducer
Running Version 202304061127
[2024-05-29 02:17:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2024-05-29 02:17:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-29 02:17:22] [INFO ] Load time of PNML (sax parser for PT used): 105 ms
[2024-05-29 02:17:22] [INFO ] Transformed 59 places.
[2024-05-29 02:17:22] [INFO ] Transformed 180 transitions.
[2024-05-29 02:17:22] [INFO ] Found NUPN structural information;
[2024-05-29 02:17:22] [INFO ] Completing missing partition info from NUPN : creating a component with [P_client_idle_1, P_client_idle_2, P_client_idle_3, P_client_idle_4, P_client_idle_5, P_client_waiting_1, P_client_waiting_2, P_client_waiting_3, P_client_waiting_4, P_client_waiting_5, P_client_request_1, P_client_request_2, P_client_request_3, P_client_request_4, P_client_request_5, P_client_ack_1, P_client_ack_2, P_client_ack_3, P_client_ack_4, P_client_ack_5, P_server_idle_1, P_server_idle_2, P_server_waiting_1, P_server_waiting_2, P_server_processed_1, P_server_processed_2, P_server_notification_1, P_server_notification_2, P_server_notification_ack_1, P_server_notification_ack_2, P_server_request_1_1, P_server_request_1_2, P_server_request_2_1, P_server_request_2_2, P_server_request_3_1, P_server_request_3_2, P_server_request_4_1, P_server_request_4_2, P_server_request_5_1, P_server_request_5_2, P_lb_idle_1, P_lb_routing_1_1, P_lb_routing_1_2, P_lb_routing_1_3, P_lb_routing_1_4, P_lb_routing_1_5, P_lb_balancing_1, P_lb_load_1_0, P_lb_load_1_1, P_lb_load_1_2, P_lb_load_1_3, P_lb_load_1_4, P_lb_load_1_5, P_lb_load_2_0, P_lb_load_2_1, P_lb_load_2_2, P_lb_load_2_3, P_lb_load_2_4, P_lb_load_2_5]
[2024-05-29 02:17:22] [INFO ] Parsed PT model containing 59 places and 180 transitions and 1158 arcs in 223 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 32 ms.
Working with output stream class java.io.PrintStream
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 559 ms. (steps per millisecond=17 ) properties (out of 8) seen :3
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-08 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 111 ms. (steps per millisecond=90 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 85 ms. (steps per millisecond=117 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2024-05-29 02:17:24] [INFO ] Flow matrix only has 140 transitions (discarded 40 similar events)
// Phase 1: matrix 140 rows 59 cols
[2024-05-29 02:17:24] [INFO ] Computed 19 invariants in 11 ms
[2024-05-29 02:17:24] [INFO ] After 268ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:5
[2024-05-29 02:17:24] [INFO ] [Nat]Absence check using 16 positive place invariants in 20 ms returned sat
[2024-05-29 02:17:24] [INFO ] [Nat]Absence check using 16 positive and 3 generalized place invariants in 2 ms returned sat
[2024-05-29 02:17:24] [INFO ] After 116ms SMT Verify possible using state equation in natural domain returned unsat :4 sat :1
[2024-05-29 02:17:24] [INFO ] State equation strengthened by 55 read => feed constraints.
[2024-05-29 02:17:24] [INFO ] After 45ms SMT Verify possible using 55 Read/Feed constraints in natural domain returned unsat :4 sat :1
[2024-05-29 02:17:24] [INFO ] After 94ms SMT Verify possible using trap constraints in natural domain returned unsat :4 sat :1
Attempting to minimize the solution found.
Minimization took 41 ms.
[2024-05-29 02:17:24] [INFO ] After 383ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :1
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-07 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-06 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 5 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 6 ms.
Support contains 8 out of 59 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 59/59 places, 180/180 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 4 rules applied. Total rules applied 4 place count 57 transition count 178
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 6 places and 0 transitions.
Iterating global reduction 0 with 9 rules applied. Total rules applied 13 place count 51 transition count 175
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 19 place count 48 transition count 172
Free-agglomeration rule (complex) applied 4 times.
Iterating global reduction 0 with 4 rules applied. Total rules applied 23 place count 48 transition count 168
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 27 place count 44 transition count 168
Applied a total of 27 rules in 85 ms. Remains 44 /59 variables (removed 15) and now considering 168/180 (removed 12) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 87 ms. Remains : 44/59 places, 168/180 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 1) seen :0
Probably explored full state space saw : 9875 states, properties seen :0
Probabilistic random walk after 52630 steps, saw 9875 distinct states, run finished after 149 ms. (steps per millisecond=353 ) properties seen :0
Explored full state space saw : 9875 states, properties seen :0
Exhaustive walk after 52630 steps, saw 9875 distinct states, run finished after 99 ms. (steps per millisecond=531 ) properties seen :0
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-11 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
Parikh walk visited 0 properties in 0 ms.
All properties solved without resorting to model-checking.
Total runtime 2676 ms.
starting LoLA
BK_INPUT SimpleLoadBal-PT-05
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1716949051085

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202304061127.jar
+ VERSION=202304061127
+ echo 'Running Version 202304061127'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 56 (type EXCL) for 15 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 52 (type FNDP) for 15 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type EQUN) for 15 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 55 (type SRCH) for 15 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-53.sara.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 56 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05
lola: result : false
lola: markings : 8110
lola: fired transitions : 16338
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 52 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 53 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05 (obsolete)
lola: CANCELED task # 55 (type SRCH) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05 (obsolete)
lola: LAUNCH task # 99 (type EXCL) for 9 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-03
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 12 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 12 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 59 (type SRCH) for 12 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 52 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05
lola: result : unknown
lola: fired transitions : 22228
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 53 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05
lola: result : unknown
lola: FINISHED task # 99 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-03
lola: result : false
lola: markings : 3904
lola: fired transitions : 8760
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 129 (type EXCL) for 45 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-15
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 129 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-15
lola: result : false
lola: markings : 2972
lola: fired transitions : 7081
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 106 (type EXCL) for 6 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-02
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 106 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-02
lola: result : false
lola: markings : 2972
lola: fired transitions : 7081
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 152 (type EXCL) for 36 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-12
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 152 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-12
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 82 (type EXCL) for 33 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-11
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 82 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-11
lola: result : false
lola: markings : 6067
lola: fired transitions : 13556
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 147 (type EXCL) for 21 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-07
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 147 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-07
lola: result : false
lola: markings : 16153
lola: fired transitions : 36458
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 121 (type EXCL) for 3 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-01
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 121 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-01
lola: result : true
lola: markings : 12
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 144 (type EXCL) for 42 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-14
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 144 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-14
lola: result : false
lola: markings : 11338
lola: fired transitions : 22456
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 141 (type EXCL) for 39 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-13
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 141 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-13
lola: result : false
lola: markings : 29480
lola: fired transitions : 60364
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 86 (type EXCL) for 18 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-06
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type SRCH) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04
lola: result : false
lola: markings : 113152
lola: fired transitions : 411756
lola: time used : 2.000000
lola: memory pages used : 1
lola: CANCELED task # 49 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04 (obsolete)
lola: CANCELED task # 50 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04 (obsolete)
lola: LAUNCH task # 64 (type FNDP) for 30 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 65 (type EQUN) for 30 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type SRCH) for 30 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04
lola: result : unknown
lola: fired transitions : 163332
lola: tried executions : 2
lola: time used : 2.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-65.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 86 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-06
lola: result : false
lola: markings : 26985
lola: fired transitions : 53449
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 74 (type EXCL) for 27 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-09
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 67 (type SRCH) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10
lola: result : false
lola: markings : 111240
lola: fired transitions : 376935
lola: time used : 2.000000
lola: memory pages used : 1
lola: CANCELED task # 64 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10 (obsolete)
lola: CANCELED task # 65 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10 (obsolete)
lola: LAUNCH task # 113 (type FNDP) for 24 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 114 (type EQUN) for 24 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SRCH) for 24 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 65 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10
lola: result : unknown
lola: FINISHED task # 64 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10
lola: result : unknown
lola: fired transitions : 180682
lola: tried executions : 2
lola: time used : 2.000000
lola: memory pages used : 0
lola: FINISHED task # 74 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-09
lola: result : false
lola: markings : 38234
lola: fired transitions : 79341
lola: time used : 2.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 94 (type EXCL) for 0 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00
lola: time limit : 1798 sec
lola: memory limit: 32 pages
lola: FINISHED task # 113 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-08
lola: result : true
lola: fired transitions : 1062
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 114 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-08 (obsolete)
lola: CANCELED task # 117 (type SRCH) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-08 (obsolete)
lola: LAUNCH task # 90 (type FNDP) for 0 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 91 (type EQUN) for 0 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 93 (type SRCH) for 0 SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-91.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 93 (type SRCH) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00
lola: result : false
lola: markings : 45558
lola: fired transitions : 126368
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 90 (type FNDP) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 91 (type EQUN) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00 (obsolete)
lola: CANCELED task # 94 (type EXCL) for SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-00: AG true tandem / insertion
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-01: EF true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-02: AG true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-03: AG true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-04: AG true tandem / insertion
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-05: AG true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-06: AG true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-07: EF false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-08: AG false findpath
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-09: EF false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-10: EF false tandem / insertion
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-11: AG true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-12: EF true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-13: AG true tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-14: EF false tandem / relaxed
SimpleLoadBal-PT-05-ReachabilityCardinality-2024-15: AG true tandem / relaxed


Time elapsed: 5 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="gold2023"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool gold2023"
echo " Input is SimpleLoadBal-PT-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r395-smll-171683824000099"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-05.tgz
mv SimpleLoadBal-PT-05 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;