About the Execution of LoLA for SmallOperatingSystem-PT-MT8192DC4096
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16205.371 | 404937.00 | 402332.00 | 1834.90 | ?T?????????????F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r379-smll-171683812300329.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SmallOperatingSystem-PT-MT8192DC4096, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r379-smll-171683812300329
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 492K
-rw-r--r-- 1 mcc users 11K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Apr 23 07:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Apr 23 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 12 14:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Apr 12 14:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.6K Apr 12 14:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Apr 12 14:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Apr 23 07:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 13 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 8.1K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-01
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-15
=== Now, execution of the tool begins
BK_START 1717136015901
FORMULA SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717136420838
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 69 (type EXCL) for 68 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12
[[35mlola[0m][I] time limit : 105 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 88 (type EQUN) for 22 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 90 (type EQUN) for 22 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 83 (type EQUN) for 6 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 4 (type CNST) for 3 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-01
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 4 (type CNST) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 83 (type EQUN) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 109 (type EQUN) for 61 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 88 (type EQUN) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 102 (type EQUN) for 22 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 90 (type EQUN) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 104 (type EQUN) for 22 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 78 (type CNST) for 77 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 78 (type CNST) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] FINISHED task # 104 (type EQUN) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 97 (type EQUN) for 22 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 102 (type EQUN) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 94 (type FNDP) for 22 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 94 (type FNDP) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 97 (type EQUN) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06 (obsolete)
[[35mlola[0m][I] LAUNCH task # 111 (type EQUN) for 61 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 109 (type EQUN) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 97 (type EQUN) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 111 (type EQUN) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 5/179 17/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12 4031624 m, 806324 m/sec, 4055237 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 6 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 10/179 29/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12 6890016 m, 571678 m/sec, 6919747 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 11 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 15/179 40/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12 9468164 m, 515629 m/sec, 9505283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 16 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 20/179 51/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12 11912882 m, 488943 m/sec, 11960747 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 21 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-01: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 25/179 62/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12 14591019 m, 535627 m/sec, 14650656 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 69 CTL EXCL 30/179 75/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12 17719522 m, 625700 m/sec, 17792893 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 69 CTL EXCL 35/179 88/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12 20681436 m, 592382 m/sec, 20767821 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02: AXAG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 69 CTL EXCL 40/179 100/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12 23747556 m, 613224 m/sec, 23847423 t fired, .
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[[35mlola[0m][I] FINISHED task # 69 (type EXCL) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 25184261
[[35mlola[0m][I] fired transitions : 25294531
[[35mlola[0m][I] time used : 42
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[[35mlola[0m][I] LAUNCH task # 81 (type EXCL) for 6 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02
[[35mlola[0m][I] time limit : 187 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 81 (type EXCL) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 75 (type EXCL) for 74 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14
[[35mlola[0m][I] time limit : 197 sec
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[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-02: AXAG false state space /EXEF[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-12: CTL false CTL model checker[0m
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 3/197 3/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 582044 m, 116408 m/sec, 2612990 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 8/197 8/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 1663141 m, 216219 m/sec, 7496376 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 75 CTL EXCL 13/197 13/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 2727407 m, 212853 m/sec, 12303381 t fired, .
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[[35mlola[0m][.]
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 75 CTL EXCL 18/197 18/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 3786420 m, 211802 m/sec, 17086365 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 75 CTL EXCL 23/197 23/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 4835058 m, 209727 m/sec, 21825242 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 28/197 27/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 5883473 m, 209683 m/sec, 26560109 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 33/197 32/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 6927799 m, 208865 m/sec, 31277332 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 75 CTL EXCL 38/197 37/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 7968786 m, 208197 m/sec, 35980970 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 43/197 42/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 9009006 m, 208044 m/sec, 40677767 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 48/197 47/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 10052074 m, 208613 m/sec, 45388803 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 53/197 51/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 11098404 m, 209266 m/sec, 50116146 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 58/197 56/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 12146361 m, 209591 m/sec, 54851180 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 63/197 61/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 13196015 m, 209930 m/sec, 59589721 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 68/197 66/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 14246982 m, 210193 m/sec, 64339855 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 73/197 71/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 15301233 m, 210850 m/sec, 69101206 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 78/197 75/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 16359953 m, 211744 m/sec, 73884285 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 83/197 80/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 17373813 m, 202772 m/sec, 78451106 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 88/197 83/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 18319227 m, 189082 m/sec, 82721336 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 93/197 87/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 19255985 m, 187351 m/sec, 86953072 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 75 CTL EXCL 98/197 90/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 20186318 m, 186066 m/sec, 91154972 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 103/197 94/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 21110533 m, 184843 m/sec, 95330416 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 108/197 97/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 22027450 m, 183383 m/sec, 99470682 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 113/197 101/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 22942507 m, 183011 m/sec, 103604761 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 118/197 104/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 23852575 m, 182013 m/sec, 107715082 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 123/197 108/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 24763755 m, 182236 m/sec, 111829851 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 128/197 111/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 25674001 m, 182049 m/sec, 115941338 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 133/197 115/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 26585966 m, 182393 m/sec, 120062123 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 138/197 118/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 27500749 m, 182956 m/sec, 124194324 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 143/197 122/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 28418100 m, 183470 m/sec, 128338772 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 148/197 125/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 29336327 m, 183645 m/sec, 132484934 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 153/197 129/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 30224015 m, 177537 m/sec, 136496198 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 158/197 132/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 31157243 m, 186645 m/sec, 140711428 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 163/197 136/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 32092353 m, 187022 m/sec, 144936070 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 168/197 139/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 33035628 m, 188655 m/sec, 149195604 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 173/197 143/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 33996159 m, 192106 m/sec, 153521763 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 75 CTL EXCL 178/197 147/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 34922539 m, 185276 m/sec, 157706161 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 75 CTL EXCL 183/197 151/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 35834695 m, 182431 m/sec, 161827901 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 75 CTL EXCL 188/197 155/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 36742645 m, 181590 m/sec, 165928614 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 75 CTL EXCL 193/197 158/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 37648333 m, 181137 m/sec, 170018012 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][I] FINISHED task # 64 (type EXCL) for SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 75 CTL EXCL 5/197 5/5 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14 1001198 m, -7329427 m/sec, 4507041 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 5/209 10/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 2003361 m, 400672 m/sec, 3990498 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 10/209 19/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 3941879 m, 387703 m/sec, 7867693 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 15/209 27/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 5825806 m, 376785 m/sec, 11635701 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 20/209 36/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 7699163 m, 374671 m/sec, 15382564 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 25/209 44/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 9594335 m, 379034 m/sec, 19173064 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 30/209 53/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 11482782 m, 377689 m/sec, 22950111 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 35/209 62/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 13392619 m, 381967 m/sec, 26769943 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 40/209 71/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 15312650 m, 384006 m/sec, 30610160 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 45/209 79/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 17141612 m, 365792 m/sec, 34255941 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 50/209 84/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 18523441 m, 276365 m/sec, 37019715 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 55/209 89/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 19887261 m, 272764 m/sec, 39747466 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 60/209 94/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 21234431 m, 269434 m/sec, 42441913 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 65/209 99/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 22574052 m, 267924 m/sec, 45121264 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 70/209 105/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 23917025 m, 268594 m/sec, 47807320 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 75/209 110/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 25247667 m, 266128 m/sec, 50468713 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 80/209 115/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 26597599 m, 269986 m/sec, 53168687 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 85/209 120/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 27953222 m, 271124 m/sec, 55880044 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 56 CTL EXCL 90/209 125/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 29333733 m, 276102 m/sec, 58641177 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 95/209 130/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 30716075 m, 276468 m/sec, 61405975 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 100/209 136/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 32095629 m, 275910 m/sec, 64165192 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-03: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 105/209 141/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 33528258 m, 286525 m/sec, 67030568 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 110/209 147/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 34818307 m, 258009 m/sec, 69598483 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 115/209 152/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 36051727 m, 246684 m/sec, 72065423 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 120/209 157/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 37283943 m, 246443 m/sec, 74529956 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-06: CONJ 0 4 0 0 12 0 0 3
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-08: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-11: DISJ 0 1 0 0 5 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 56 CTL EXCL 125/209 162/2000 SmallOperatingSystem-PT-MT8192DC4096-CTLCardinality-2024-09 38511594 m, 245530 m/sec, 76985357 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 405 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT8192DC4096"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SmallOperatingSystem-PT-MT8192DC4096, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r379-smll-171683812300329"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT8192DC4096.tgz
mv SmallOperatingSystem-PT-MT8192DC4096 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;