About the Execution of LoLA for SmallOperatingSystem-PT-MT4096DC2048
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16207.512 | 713998.00 | 712214.00 | 3265.10 | ??????FF??F????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r379-smll-171683812300313.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SmallOperatingSystem-PT-MT4096DC2048, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r379-smll-171683812300313
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 516K
-rw-r--r-- 1 mcc users 9.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.6K Apr 23 07:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 14:20 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 106K Apr 12 14:20 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 12 14:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 92K Apr 12 14:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Apr 23 07:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 13 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 8.1K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-00
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-01
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-02
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-03
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-04
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-06
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-07
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14
FORMULA_NAME SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15
=== Now, execution of the tool begins
BK_START 1717134309120
FORMULA SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717135023118
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 19 (type CNST) for 18 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 19 (type CNST) for SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 22 (type CNST) for 21 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-07
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 22 (type CNST) for SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 34 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 53 (type FNDP) for 34 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 54 (type EQUN) for 34 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 3820
[[35mlola[0m][I] fired transitions : 3819
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 53 (type FNDP) for SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10 (obsolete)
[[35mlola[0m][W] CANCELED task # 54 (type EQUN) for SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10 (obsolete)
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 53 (type FNDP) for SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 59 (type EQUN) for 40 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type EQUN) for SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 59 (type EQUN) for SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 5/257 14/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 3350771 m, 670154 m/sec, 4192169 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 10/257 26/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 6293796 m, 588605 m/sec, 7871645 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-07: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-10: AG false state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 15/257 37/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 9076122 m, 556465 m/sec, 11350517 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.]
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 CTL EXCL 20/257 44/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 10795853 m, 343946 m/sec, 14673190 t fired, .
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[[35mlola[0m][.]
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 32 CTL EXCL 25/257 50/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 12182068 m, 277243 m/sec, 18836654 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 CTL EXCL 30/257 56/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 13300578 m, 223702 m/sec, 22194683 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 CTL EXCL 35/257 60/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 14316549 m, 203194 m/sec, 25242133 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 CTL EXCL 40/257 65/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 15447503 m, 226190 m/sec, 28637449 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 CTL EXCL 45/257 70/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 16543945 m, 219288 m/sec, 32389244 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 CTL EXCL 50/257 73/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 17190214 m, 129253 m/sec, 36917328 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 CTL EXCL 55/257 76/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 17846110 m, 131179 m/sec, 41512881 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 CTL EXCL 60/257 79/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 18502067 m, 131191 m/sec, 46108863 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-15: LTL/CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 32 CTL EXCL 70/257 84/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 19812172 m, 130920 m/sec, 55288152 t fired, .
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[[35mlola[0m][.] 32 CTL EXCL 80/257 91/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 21504841 m, 204160 m/sec, 63636769 t fired, .
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[[35mlola[0m][.] 32 CTL EXCL 85/257 95/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 22525741 m, 204180 m/sec, 66702122 t fired, .
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[[35mlola[0m][.] 32 CTL EXCL 150/257 144/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 34899540 m, 191060 m/sec, 116424897 t fired, .
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[[35mlola[0m][.] 32 CTL EXCL 155/257 148/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 35815085 m, 183109 m/sec, 119175343 t fired, .
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[[35mlola[0m][.] 32 CTL EXCL 160/257 152/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 36812190 m, 199421 m/sec, 122171400 t fired, .
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[[35mlola[0m][.] 32 CTL EXCL 190/257 177/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 42857465 m, 201220 m/sec, 148461632 t fired, .
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[[35mlola[0m][.] 32 CTL EXCL 195/257 181/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 43863366 m, 201180 m/sec, 152988019 t fired, .
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[[35mlola[0m][.] 32 CTL EXCL 225/257 207/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 50774840 m, 195027 m/sec, 177802898 t fired, .
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[[35mlola[0m][.] 32 CTL EXCL 230/257 211/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 51643951 m, 173822 m/sec, 181713762 t fired, .
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[[35mlola[0m][.] 32 CTL EXCL 235/257 214/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09 52517699 m, 174749 m/sec, 185645483 t fired, .
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[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 47 CTL EXCL 5/277 12/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14 2632558 m, 526511 m/sec, 5926514 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 47 CTL EXCL 10/277 21/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14 4851634 m, 443815 m/sec, 10921375 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 47 CTL EXCL 15/277 31/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14 7161549 m, 461983 m/sec, 16119262 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 47 CTL EXCL 20/277 40/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14 9348022 m, 437294 m/sec, 21038726 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 47 CTL EXCL 25/277 48/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14 11223813 m, 375158 m/sec, 25259692 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 47 CTL EXCL 30/277 56/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-14 13319490 m, 419135 m/sec, 29976558 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 2 0 0 2 0 0 0
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 44 CTL EXCL 2/300 6/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13 1261007 m, 252201 m/sec, 1579044 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 44 CTL EXCL 7/300 22/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13 5353448 m, 818488 m/sec, 6696060 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.]
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[[35mlola[0m][.] 44 CTL EXCL 12/300 36/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13 8853359 m, 699982 m/sec, 11072289 t fired, .
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[[35mlola[0m][.] 44 CTL EXCL 17/300 47/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13 11656079 m, 560544 m/sec, 14577186 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] 44 CTL EXCL 22/300 59/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-13 14608089 m, 590402 m/sec, 18268042 t fired, .
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[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 14608089
[[35mlola[0m][I] fired transitions : 18268042
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[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 24 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08
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[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8193
[[35mlola[0m][I] fired transitions : 16386
[[35mlola[0m][I] time used : 0
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[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 16 CTL EXCL 4/364 1/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 217420 m, 43484 m/sec, 1078934 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 16 CTL EXCL 9/364 3/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 582727 m, 73061 m/sec, 2905528 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 16 CTL EXCL 14/364 4/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 944084 m, 72271 m/sec, 4712372 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-08: DISJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-09: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2023-12: EG 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 16 CTL EXCL 19/364 6/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 1296859 m, 70555 m/sec, 6476309 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 24/364 7/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 1648325 m, 70293 m/sec, 8233692 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 29/364 9/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 1987720 m, 67879 m/sec, 9930722 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 34/364 10/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 2360785 m, 74613 m/sec, 11796108 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 39/364 12/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 2797712 m, 87385 m/sec, 13980814 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 99/364 53/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 12502719 m, 170511 m/sec, 62495145 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 104/364 57/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 13362024 m, 171861 m/sec, 66785661 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 114/364 64/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 15035329 m, 166418 m/sec, 75152458 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 139/364 82/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 19366531 m, 174699 m/sec, 96803036 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 144/364 85/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 20235564 m, 173806 m/sec, 101148338 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 149/364 89/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 21106234 m, 174134 m/sec, 105495694 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 154/364 93/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 21952700 m, 169293 m/sec, 109728160 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 164/364 100/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 23598250 m, 163297 m/sec, 117956174 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 169/364 103/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 24405487 m, 161447 m/sec, 121992495 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 179/364 110/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 26109312 m, 180405 m/sec, 130505755 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 184/364 114/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 26980097 m, 174157 m/sec, 134859818 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 189/364 117/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 27836390 m, 171258 m/sec, 139141423 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 194/364 121/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 28688936 m, 170509 m/sec, 143404295 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 204/364 128/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 30370443 m, 165154 m/sec, 151805960 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 214/364 135/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 31975534 m, 159806 m/sec, 159831683 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 219/364 138/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 32777277 m, 160348 m/sec, 163840522 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 224/364 142/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 33595733 m, 163691 m/sec, 167926799 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 259/364 166/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 39468738 m, 155740 m/sec, 197286638 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 274/364 176/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 41818342 m, 155660 m/sec, 209035045 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 294/364 190/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 45192582 m, 165586 m/sec, 225900652 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 299/364 194/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 46019381 m, 165359 m/sec, 230034782 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 339/364 222/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 52699203 m, 172026 m/sec, 263422710 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 344/364 225/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 53554090 m, 170977 m/sec, 267697279 t fired, .
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[[35mlola[0m][.] 16 CTL EXCL 349/364 229/2000 SmallOperatingSystem-PT-MT4096DC2048-CTLCardinality-2024-05 54410777 m, 171337 m/sec, 271980857 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT4096DC2048"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SmallOperatingSystem-PT-MT4096DC2048, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r379-smll-171683812300313"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT4096DC2048.tgz
mv SmallOperatingSystem-PT-MT4096DC2048 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;