About the Execution of LoLA for SmallOperatingSystem-PT-MT0064DC0016
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2803.939 | 239563.00 | 241016.00 | 722.40 | FFTFFFFFTTFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r379-smll-171683812100210.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SmallOperatingSystem-PT-MT0064DC0016, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r379-smll-171683812100210
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 508K
-rw-r--r-- 1 mcc users 8.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 37K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.7K Apr 23 07:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 23 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 12 14:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 122K Apr 12 14:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 12 14:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 109K Apr 12 14:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Apr 23 07:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 13 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 8.2K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-02
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-04
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-05
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-07
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-08
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-09
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-10
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-11
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-12
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-13
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-14
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717124791428
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01: EFAG false tscc_search[0m
[[35mlola[0m] [1m[32mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03: EFAG false tscc_search[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-04: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-10: AG false findpath[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-12: DISJ false DISJ[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-13: EG false state space / EG[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-14: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 239 secs. Pages in use: 17
BK_STOP 1717125030991
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 61 (type EQUN) for 9 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 63 (type EQUN) for 9 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 57 (type EQUN) for 3 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 57 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 68 (type FNDP) for 30 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 3 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 68 (type FNDP) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 73 (type EQUN) for 43 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 63 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 65 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 73 (type EQUN) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-13
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 122529
[[35mlola[0m][I] fired transitions : 559601
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-10: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-12: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-13: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 4/239 4/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-15 874230 m, 174846 m/sec, 5181475 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-10: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-12: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-13: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 9/239 8/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-15 1799676 m, 185089 m/sec, 11133724 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-04: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-10: AG false findpath[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 50 CTL EXCL 19/239 15/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-15 3667499 m, 189749 m/sec, 23398168 t fired, .
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[[35mlola[0m][.] 25 CTL EXCL 3/352 6/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-08 1356540 m, 271308 m/sec, 4993189 t fired, .
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[[35mlola[0m][.] 25 CTL EXCL 18/352 17/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-08 4076221 m, 1241 m/sec, 26204543 t fired, .
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[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-07
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[[35mlola[0m][.] 16 CTL EXCL 14/437 11/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-05 2571522 m, 172730 m/sec, 15694680 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03: EFAG 0 1 0 0 3 0 0 0
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 29/494 17/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-02 4077847 m, 325 m/sec, 40574938 t fired, .
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[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4077909
[[35mlola[0m][I] fired transitions : 42104088
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 4/571 5/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00 1204932 m, 240986 m/sec, 5461270 t fired, .
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[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 9/571 10/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00 2447286 m, 248470 m/sec, 13644835 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 14/571 17/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00 4056508 m, 321844 m/sec, 21575294 t fired, .
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[[35mlola[0m][.] 1 CTL EXCL 19/571 17/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00 4074141 m, 3526 m/sec, 28493525 t fired, .
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[[35mlola[0m][.] SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.]
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[[35mlola[0m][.] 1 CTL EXCL 24/571 17/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-00 4077733 m, 718 m/sec, 34885517 t fired, .
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[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4077909
[[35mlola[0m][I] fired transitions : 39884823
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[[35mlola[0m][I] FINISHED task # 67 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-13
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 3 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01
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[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-01
[[35mlola[0m][I] result : true
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[[35mlola[0m][I] fired transitions : 152234
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[[35mlola[0m][I] LAUNCH task # 58 (type EXCL) for 9 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03
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[[35mlola[0m][.] 58 AGEF EXCL 1/1133 2/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-03 525130 m, 105026 m/sec, 1646452 t fired, .
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[[35mlola[0m][I] result : true
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[[35mlola[0m][I] fired transitions : 4805777
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[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 36 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-12
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[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2023-12
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06
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[[35mlola[0m][.] 19 CTL EXCL 3/3398 3/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06 675125 m, 135025 m/sec, 4219775 t fired, .
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[[35mlola[0m][.] 19 CTL EXCL 8/3398 7/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06 1696093 m, 204193 m/sec, 11037889 t fired, .
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[[35mlola[0m][.] 19 CTL EXCL 13/3398 11/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06 2607894 m, 182360 m/sec, 17634092 t fired, .
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[[35mlola[0m][.] 19 CTL EXCL 18/3398 14/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06 3447517 m, 167924 m/sec, 24075857 t fired, .
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[[35mlola[0m][.] 19 CTL EXCL 23/3398 17/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06 4066016 m, 123699 m/sec, 31270069 t fired, .
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[[35mlola[0m][.] 19 CTL EXCL 33/3398 17/2000 SmallOperatingSystem-PT-MT0064DC0016-CTLFireability-2024-06 4077733 m, 690 m/sec, 43167987 t fired, .
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[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4077909
[[35mlola[0m][I] fired transitions : 48029196
[[35mlola[0m][I] time used : 37
[[35mlola[0m][I] memory pages used : 17
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT0064DC0016"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SmallOperatingSystem-PT-MT0064DC0016, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r379-smll-171683812100210"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT0064DC0016.tgz
mv SmallOperatingSystem-PT-MT0064DC0016 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;