MCC'2024- Execution of r379-smll-171683812000164

About the Execution of LoLA for SimpleLoadBal-PT-10

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
7102.067	336031.00	337442.00	979.30	FTFTFT?FTTFFTFFF	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r379-smll-171683812000164.qcow2',
Waiting for the VM to be ready (probing ssh)
...........................................................
=====================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SimpleLoadBal-PT-10, examination is LTLFireabi
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r379-smll-171683812000164
===========================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.0M
-rw-r--r-- 1 mcc users 8.7K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 80K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.8K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesD
-rw-r--r-- 1 mcc users 6.8K May 18 16:43 GenericPropertiesV
-rw-r--r-- 1 mcc users 4.3K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 19 07:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 19 19:19 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 13 12:09 ReachabilityCardin
-rw-r--r-- 1 mcc users 119K Apr 13 12:09 ReachabilityCardin
-rw-r--r-- 1 mcc users 14K Apr 13 12:08 ReachabilityFireab
-rw-r--r-- 1 mcc users 83K Apr 13 12:08 ReachabilityFireab
-rw-r--r-- 1 mcc users 1.9K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 535K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-00
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-01
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-02
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-03
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-04
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-05
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-06
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-07
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-08
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-09
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-10
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-11
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-12
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-13
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-14
FORMULA_NAME SimpleLoadBal-PT-10-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717114662468

FORMULA SimpleLoadBal-PT-10-LTLFireability-02
FORMULA SimpleLoadBal-PT-10-LTLFireability-15
FORMULA SimpleLoadBal-PT-10-LTLFireability-12
FORMULA SimpleLoadBal-PT-10-LTLFireability-11
FORMULA SimpleLoadBal-PT-10-LTLFireability-08
FORMULA SimpleLoadBal-PT-10-LTLFireability-07
FORMULA SimpleLoadBal-PT-10-LTLFireability-14
FORMULA SimpleLoadBal-PT-10-LTLFireability-13
FORMULA SimpleLoadBal-PT-10-LTLFireability-05
FORMULA SimpleLoadBal-PT-10-LTLFireability-04
FORMULA SimpleLoadBal-PT-10-LTLFireability-03
FORMULA SimpleLoadBal-PT-10-LTLFireability-01
FORMULA SimpleLoadBal-PT-10-LTLFireability-00
FORMULA SimpleLoadBal-PT-10-LTLFireability-09
FORMULA SimpleLoadBal-PT-10-LTLFireability-10
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY
[[35mlola[0m] [1m[31mSimpleLoadBal-PT-10-LTLFireability-00:
[[35mlola[0m] [1m[32mSimpleLoadBal-PT-10-LTLFireability-01:
[[35mlola[0m] [1m[31mSimpleLoadBal-PT-10-LTLFireability-02:
[[35mlola[0m] [1m[32mSimpleLoadBal-PT-10-LTLFireability-03:
[[35mlola[0m] [1m[31mSimpleLoadBal-PT-10-LTLFireability-04:
[[35mlola[0m] [1m[32mSimpleLoadBal-PT-10-LTLFireability-05:
[[35mlola[0m] [1m[33mSimpleLoadBal-PT-10-LTLFireability-06:
[[35mlola[0m] [1m[31mSimpleLoadBal-PT-10-LTLFireability-07:
[[35mlola[0m] [1m[32mSimpleLoadBal-PT-10-LTLFireability-08:
[[35mlola[0m] [1m[32mSimpleLoadBal-PT-10-LTLFireability-09:
[[35mlola[0m] [1m[31mSimpleLoadBal-PT-10-LTLFireability-10:
[[35mlola[0m] [1m[31mSimpleLoadBal-PT-10-LTLFireability-11:
[[35mlola[0m] [1m[32mSimpleLoadBal-PT-10-LTLFireability-12:
[[35mlola[0m] [1m[31mSimpleLoadBal-PT-10-LTLFireability-13:
[[35mlola[0m] [1m[31mSimpleLoadBal-PT-10-LTLFireability-14:
[[35mlola[0m] [1m[31mSimpleLoadBal-PT-10-LTLFireability-15:
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 336 secs. Pages

BK_STOP 1717114998499

--------------------
content from stderr:

[[35mlola[0m][I] LoLA will run for 3600 seconds
[[35mlola[0m][W] [1m[33munknown unit in memory
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition
[[35mlola[0m][I] closed [1m[34mnet[0m file
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformul
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0
[[35mlola[0m][I] LAUNCH task # 67 (type EXCL)
[[35mlola[0m][I] time limit : 149 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 65 (type FNDP)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 66 (type EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 72 (type EQUN)
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 67 (type EXCL)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 65 (type FNDP)
[[35mlola[0m][W] CANCELED task # 66 (type EQUN)
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL)
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 62 (type EXCL)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 43
[[35mlola[0m][I] fired transitions : 43
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL)
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 41 (type EXCL)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 10
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL)
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 54
[[35mlola[0m][I] fired transitions : 54
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL)
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 10
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL)
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL)
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 43
[[35mlola[0m][I] fired transitions : 43
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL)
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 65 (type FNDP)
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 66 (type EQUN)
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 72 (type EQUN)
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-02:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-07:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-08:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-11:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-12:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-00:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-01:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-03:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-04:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-05:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-06:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-09:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-10:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-13:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.] 19 LTL EXCL 4/327
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-02:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-07:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-08:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-11:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-12:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-00:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-01:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-03:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-04:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-05:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-06:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-09:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-10:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-13:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.] 19 LTL EXCL 9/327
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-02:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-07:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-08:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-11:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-12:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-00:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-01:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-03:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-04:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-05:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-06:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-09:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-10:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-13:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.] 19 LTL EXCL 14/327
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-02:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-07:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-08:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-11:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-12:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-00:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-01:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-03:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-04:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-05:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-06:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-09:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-10:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-13:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.] 19 LTL EXCL 19/327
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-02:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-07:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-08:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-11:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-12:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-00:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-01:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-03:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-04:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-05:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-06:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-09:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-10:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-13:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.] 19 LTL EXCL 24/327
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-02:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-07:
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[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-11:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-12:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-00:
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[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-04:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-05:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-06:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-09:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-10:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-13:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-14:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT
[[35mlola[0m][.] 19 LTL EXCL 29/327
[[35mlola[0m][.]
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[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-02:
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[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-08:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-11:
[[35mlola[0m][.] [1m[32mSimpleLoadBal-PT-10-LTLFireability-12:
[[35mlola[0m][.] [1m[31mSimpleLoadBal-PT-10-LTLFireability-15:
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-00:
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[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-04:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-05:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-06:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-09:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-10:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-13:
[[35mlola[0m][.] SimpleLoadBal-PT-10-LTLFireability-14:
[[35mlola[0m][.]
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[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA:
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================================ lity ========== efinition.xml erdict.xml ality.txt ality.xml ility.txt ility.xml template) text file) FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT VALUE PRODUCED BY[0m LTL false LTL model checker[0m LTL true LTL model checker[0m AG false state space[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL unknown AGGR[0m LTL false LTL model checker[0m LTL true LTL model checker[0m F true state space / EG[0m CONJ false LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m in use: 259 at most ([1m[36m--timelimit[0m) specification: using default[0m [4m[34mmodel.pnml[0m 0m) net [4m[34mmodel.pnml[0m a[0m) from [4m[34mLTLFireability.xml[0m places removed for 6 SimpleLoadBal-PT-10-LTLFireability-02 for 6 SimpleLoadBal-PT-10-LTLFireability-02 for 6 SimpleLoadBal-PT-10-LTLFireability-02 for 27 SimpleLoadBal-PT-10-LTLFireability-09 for SimpleLoadBal-PT-10-LTLFireability-02 for SimpleLoadBal-PT-10-LTLFireability-02 (obsolete) for SimpleLoadBal-PT-10-LTLFireability-02 (obsolete) for 49 SimpleLoadBal-PT-10-LTLFireability-15 for SimpleLoadBal-PT-10-LTLFireability-15 for 40 SimpleLoadBal-PT-10-LTLFireability-12 for SimpleLoadBal-PT-10-LTLFireability-12 for 37 SimpleLoadBal-PT-10-LTLFireability-11 for SimpleLoadBal-PT-10-LTLFireability-11 for 24 SimpleLoadBal-PT-10-LTLFireability-08 for SimpleLoadBal-PT-10-LTLFireability-08 for 21 SimpleLoadBal-PT-10-LTLFireability-07 for SimpleLoadBal-PT-10-LTLFireability-07 for 18 SimpleLoadBal-PT-10-LTLFireability-06 for SimpleLoadBal-PT-10-LTLFireability-02 for SimpleLoadBal-PT-10-LTLFireability-02 for SimpleLoadBal-PT-10-LTLFireability-09 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 7/2000 SimpleLoadBal-PT-10-LTLFireability-06 963351 m, 192670 m/sec, 2025038 t fired, . in use: 7 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 13/2000 SimpleLoadBal-PT-10-LTLFireability-06 1884001 m, 184130 m/sec, 4285870 t fired, . in use: 13 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 19/2000 SimpleLoadBal-PT-10-LTLFireability-06 2788027 m, 180805 m/sec, 6637391 t fired, . in use: 19 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 24/2000 SimpleLoadBal-PT-10-LTLFireability-06 3649219 m, 172238 m/sec, 8985133 t fired, . in use: 24 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 30/2000 SimpleLoadBal-PT-10-LTLFireability-06 4465180 m, 163192 m/sec, 11285188 t fired, . in use: 30 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 34/2000 SimpleLoadBal-PT-10-LTLFireability-06 5194778 m, 145919 m/sec, 13395459 t fired, . in use: 34 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 39/2000 SimpleLoadBal-PT-10-LTLFireability-06 5962552 m, 153554 m/sec, 15644372 t fired, . in use: 39 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 44/2000 SimpleLoadBal-PT-10-LTLFireability-06 6708881 m, 149265 m/sec, 17880443 t fired, . in use: 44 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 49/2000 SimpleLoadBal-PT-10-LTLFireability-06 7442108 m, 146645 m/sec, 20102734 t fired, . in use: 49 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 54/2000 SimpleLoadBal-PT-10-LTLFireability-06 8160107 m, 143599 m/sec, 22314286 t fired, . in use: 54 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 58/2000 SimpleLoadBal-PT-10-LTLFireability-06 8865913 m, 141161 m/sec, 24494953 t fired, . in use: 58 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 63/2000 SimpleLoadBal-PT-10-LTLFireability-06 9563529 m, 139523 m/sec, 26669290 t fired, . in use: 63 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 67/2000 SimpleLoadBal-PT-10-LTLFireability-06 10251070 m, 137508 m/sec, 28837483 t fired, . in use: 67 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 71/2000 SimpleLoadBal-PT-10-LTLFireability-06 10923221 m, 134430 m/sec, 30978704 t fired, . in use: 71 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 76/2000 SimpleLoadBal-PT-10-LTLFireability-06 11591164 m, 133588 m/sec, 33122807 t fired, . in use: 76 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 80/2000 SimpleLoadBal-PT-10-LTLFireability-06 12249967 m, 131760 m/sec, 35257254 t fired, . in use: 80 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 84/2000 SimpleLoadBal-PT-10-LTLFireability-06 12902186 m, 130443 m/sec, 37385078 t fired, . in use: 84 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 88/2000 SimpleLoadBal-PT-10-LTLFireability-06 13546342 m, 128831 m/sec, 39518665 t fired, . in use: 88 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 93/2000 SimpleLoadBal-PT-10-LTLFireability-06 14183143 m, 127360 m/sec, 41646967 t fired, . in use: 93 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 97/2000 SimpleLoadBal-PT-10-LTLFireability-06 14810920 m, 125555 m/sec, 43758150 t fired, . in use: 97 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 101/2000 SimpleLoadBal-PT-10-LTLFireability-06 15429271 m, 123670 m/sec, 45864707 t fired, . in use: 101 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 105/2000 SimpleLoadBal-PT-10-LTLFireability-06 16043890 m, 122923 m/sec, 47969498 t fired, . in use: 105 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 109/2000 SimpleLoadBal-PT-10-LTLFireability-06 16653278 m, 121877 m/sec, 50059613 t fired, . in use: 109 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 113/2000 SimpleLoadBal-PT-10-LTLFireability-06 17253785 m, 120101 m/sec, 52148419 t fired, . in use: 113 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 116/2000 SimpleLoadBal-PT-10-LTLFireability-06 17852186 m, 119680 m/sec, 54220407 t fired, . in use: 116 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 120/2000 SimpleLoadBal-PT-10-LTLFireability-06 18445374 m, 118637 m/sec, 56299150 t fired, . in use: 120 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 124/2000 SimpleLoadBal-PT-10-LTLFireability-06 19030359 m, 116997 m/sec, 58364981 t fired, . in use: 124 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 128/2000 SimpleLoadBal-PT-10-LTLFireability-06 19608461 m, 115620 m/sec, 60423405 t fired, . in use: 128 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 132/2000 SimpleLoadBal-PT-10-LTLFireability-06 20186758 m, 115659 m/sec, 62486522 t fired, . in use: 132 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 135/2000 SimpleLoadBal-PT-10-LTLFireability-06 20761087 m, 114865 m/sec, 64538027 t fired, . in use: 135 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 139/2000 SimpleLoadBal-PT-10-LTLFireability-06 21325745 m, 112931 m/sec, 66575189 t fired, . in use: 139 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 143/2000 SimpleLoadBal-PT-10-LTLFireability-06 21885474 m, 111945 m/sec, 68610799 t fired, . in use: 143 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 146/2000 SimpleLoadBal-PT-10-LTLFireability-06 22442356 m, 111376 m/sec, 70637851 t fired, . in use: 146 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 150/2000 SimpleLoadBal-PT-10-LTLFireability-06 22994851 m, 110499 m/sec, 72655979 t fired, . in use: 150 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 153/2000 SimpleLoadBal-PT-10-LTLFireability-06 23540855 m, 109200 m/sec, 74661325 t fired, . in use: 153 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 157/2000 SimpleLoadBal-PT-10-LTLFireability-06 24084198 m, 108668 m/sec, 76669942 t fired, . in use: 157 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 160/2000 SimpleLoadBal-PT-10-LTLFireability-06 24625000 m, 108160 m/sec, 78671967 t fired, . in use: 160 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 164/2000 SimpleLoadBal-PT-10-LTLFireability-06 25162884 m, 107576 m/sec, 80669253 t fired, . in use: 164 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 167/2000 SimpleLoadBal-PT-10-LTLFireability-06 25696342 m, 106691 m/sec, 82664906 t fired, . in use: 167 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 171/2000 SimpleLoadBal-PT-10-LTLFireability-06 26227183 m, 106168 m/sec, 84651439 t fired, . in use: 171 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 174/2000 SimpleLoadBal-PT-10-LTLFireability-06 26754275 m, 105418 m/sec, 86622045 t fired, . in use: 174 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 178/2000 SimpleLoadBal-PT-10-LTLFireability-06 27277862 m, 104717 m/sec, 88600619 t fired, . in use: 178 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 181/2000 SimpleLoadBal-PT-10-LTLFireability-06 27797516 m, 103930 m/sec, 90582052 t fired, . in use: 181 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 184/2000 SimpleLoadBal-PT-10-LTLFireability-06 28315482 m, 103593 m/sec, 92553348 t fired, . in use: 184 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 188/2000 SimpleLoadBal-PT-10-LTLFireability-06 28827970 m, 102497 m/sec, 94513730 t fired, . in use: 188 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 191/2000 SimpleLoadBal-PT-10-LTLFireability-06 29337939 m, 101993 m/sec, 96471172 t fired, . in use: 191 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 194/2000 SimpleLoadBal-PT-10-LTLFireability-06 29845858 m, 101583 m/sec, 98430306 t fired, . in use: 194 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 198/2000 SimpleLoadBal-PT-10-LTLFireability-06 30352459 m, 101320 m/sec, 100386631 t fired, . in use: 198 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 201/2000 SimpleLoadBal-PT-10-LTLFireability-06 30855197 m, 100547 m/sec, 102344266 t fired, . in use: 201 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 204/2000 SimpleLoadBal-PT-10-LTLFireability-06 31357030 m, 100366 m/sec, 104297855 t fired, . in use: 204 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 207/2000 SimpleLoadBal-PT-10-LTLFireability-06 31854742 m, 99542 m/sec, 106249625 t fired, . in use: 207 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 211/2000 SimpleLoadBal-PT-10-LTLFireability-06 32347642 m, 98580 m/sec, 108187609 t fired, . in use: 211 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 214/2000 SimpleLoadBal-PT-10-LTLFireability-06 32840970 m, 98665 m/sec, 110127879 t fired, . in use: 214 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 217/2000 SimpleLoadBal-PT-10-LTLFireability-06 33331311 m, 98068 m/sec, 112056538 t fired, . in use: 217 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 220/2000 SimpleLoadBal-PT-10-LTLFireability-06 33823081 m, 98354 m/sec, 113993298 t fired, . in use: 220 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 223/2000 SimpleLoadBal-PT-10-LTLFireability-06 34311474 m, 97678 m/sec, 115927541 t fired, . in use: 223 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 227/2000 SimpleLoadBal-PT-10-LTLFireability-06 34795078 m, 96720 m/sec, 117856964 t fired, . in use: 227 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 230/2000 SimpleLoadBal-PT-10-LTLFireability-06 35278162 m, 96616 m/sec, 119786955 t fired, . in use: 230 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 233/2000 SimpleLoadBal-PT-10-LTLFireability-06 35758568 m, 96081 m/sec, 121707708 t fired, . in use: 233 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 236/2000 SimpleLoadBal-PT-10-LTLFireability-06 36237282 m, 95742 m/sec, 123632110 t fired, . in use: 236 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 239/2000 SimpleLoadBal-PT-10-LTLFireability-06 36715897 m, 95723 m/sec, 125557217 t fired, . in use: 239 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 242/2000 SimpleLoadBal-PT-10-LTLFireability-06 37192407 m, 95302 m/sec, 127475418 t fired, . in use: 242 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 245/2000 SimpleLoadBal-PT-10-LTLFireability-06 37666504 m, 94819 m/sec, 129397353 t fired, . in use: 245 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 248/2000 SimpleLoadBal-PT-10-LTLFireability-06 38139823 m, 94663 m/sec, 131320720 t fired, . in use: 248 CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 1 0 1 0 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m 251/2000 SimpleLoadBal-PT-10-LTLFireability-06 38609079 m, 93851 m/sec, 133231120 t fired, . in use: 251 for SimpleLoadBal-PT-10-LTLFireability-06 (local timeout) CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 1 0 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m in use: 254 for 46 SimpleLoadBal-PT-10-LTLFireability-14 for 18 SimpleLoadBal-PT-10-LTLFireability-06 for SimpleLoadBal-PT-10-LTLFireability-14 for SimpleLoadBal-PT-10-LTLFireability-06 (memory limit exceeded) CATEGORY VALUE PRODUCED BY[0m AG false state space[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m LTL true LTL model checker[0m LTL false LTL model checker[0m CONJ false LTL model checker[0m CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 1 0 0 1 0 0 0 LTL 0 0 0 0 1 0 1 0 F 0 1 0 0 2 0 0 0 CONJ 0 2 0 0 2 0 0 0 LTL 0 1 0 0 1 0 0 0 MEM PG/PGLIMIT FORMULA STATUS[0m in use: 259 for 43 SimpleLoadBal-PT-10-LTLFireability-13 for SimpleLoadBal-PT-10-LTLFireability-13 for 15 SimpleLoadBal-PT-10-LTLFireability-05 for SimpleLoadBal-PT-10-LTLFireability-05 for 12 SimpleLoadBal-PT-10-LTLFireability-04 for SimpleLoadBal-PT-10-LTLFireability-04 for 9 SimpleLoadBal-PT-10-LTLFireability-03 for SimpleLoadBal-PT-10-LTLFireability-03 3 SimpleLoadBal-PT-10-LTLFireability-01 for SimpleLoadBal-PT-10-LTLFireability-01 0 SimpleLoadBal-PT-10-LTLFireability-00 for SimpleLoadBal-PT-10-LTLFireability-00 for 27 SimpleLoadBal-PT-10-LTLFireability-09 for SimpleLoadBal-PT-10-LTLFireability-09 for 30 SimpleLoadBal-PT-10-LTLFireability-10 for SimpleLoadBal-PT-10-LTLFireability-10

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-10"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SimpleLoadBal-PT-10, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r379-smll-171683812000164"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-10.tgz
mv SimpleLoadBal-PT-10 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;