About the Execution of LoLA for SieveSingleMsgMbox-PT-d2m06
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 2207.584 | 489670.00 | 500538.00 | 1487.10 | FTTFTFTTFFTFFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r379-smll-171683811900106.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SieveSingleMsgMbox-PT-d2m06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r379-smll-171683811900106
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 7.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 73K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 23 07:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 19:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 102K Apr 12 19:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Apr 12 19:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 41K Apr 12 19:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 1.1M May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-01
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-02
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-04
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-05
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-07
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-08
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-09
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-11
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-12
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-14
FORMULA_NAME SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717087494032
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00: DISJ false DISJ[0m
[[35mlola[0m] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03: AGEF false tscc_search[0m
[[35mlola[0m] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10: EG true state space / EG[0m
[[35mlola[0m] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-11: DISJ false DISJ[0m
[[35mlola[0m] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 489 secs. Pages in use: 40
BK_STOP 1717087983702
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,1984 places removed
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 132 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 59 (type EQUN) for 13 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 61 (type EQUN) for 13 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 34 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 59 (type EQUN) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 65 (type EQUN) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03: AGEF 0 1 1 0 2 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-11: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 4/199 1/2000 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13 160141 m, 32028 m/sec, 589744 t fired, .
[[35mlola[0m][.] 61 EF STEQ 4/3582 0/5 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 22 secs. Pages in use: 1
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 61 (type EQUN) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-11: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 48 CTL EXCL 9/199 3/2000 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13 409622 m, 49896 m/sec, 1551792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 27 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
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[[35mlola[0m][.] 54 CTL EXCL 193/201 38/2000 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-15 6635073 m, 34268 m/sec, 20551872 t fired, .
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[[35mlola[0m][.] 54 CTL EXCL 198/201 39/2000 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-15 6799156 m, 32816 m/sec, 21100467 t fired, .
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[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-14
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[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-14
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[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-12
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[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 37 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-11
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[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-11
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[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-11
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[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-09
[[35mlola[0m][I] result : false
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[[35mlola[0m][.] 23 CTL EXCL 0/293 1/2000 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06 19955 m, 3991 m/sec, 25930 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 5/293 2/2000 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06 382893 m, 72587 m/sec, 671251 t fired, .
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[[35mlola[0m][.] 23 CTL EXCL 10/293 4/2000 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06 705514 m, 64524 m/sec, 1452582 t fired, .
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[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 23 CTL EXCL 105/293 39/2000 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06 6815030 m, 59681 m/sec, 14318940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 477 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 6956405
[[35mlola[0m][I] fired transitions : 14651166
[[35mlola[0m][I] time used : 107
[[35mlola[0m][I] memory pages used : 40
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 312 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 20 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1763
[[35mlola[0m][I] fired transitions : 2085
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 346 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 390 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 5 (type EXCL) for 0 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 445 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-11: DISJ false DISJ[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00: DISJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 5 CTL EXCL 3/445 1/2000 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00 160429 m, 32085 m/sec, 269942 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-06: CTL true CTL model checker[0m
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[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d2m06-CTLFireability-2023-14: CTL true CTL model checker[0m
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[[35mlola[0m][.]
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[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00: DISJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03: AGEF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 5 CTL EXCL 8/445 3/2000 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00 488406 m, 65595 m/sec, 955420 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][I] FINISHED task # 5 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 615729
[[35mlola[0m][I] fired transitions : 1283569
[[35mlola[0m][I] time used : 10
[[35mlola[0m][I] memory pages used : 4
[[35mlola[0m][I] LAUNCH task # 3 (type EXCL) for 0 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 518 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 3 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1865
[[35mlola[0m][I] fired transitions : 2193
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL) for 34 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 622 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 62 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 7
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 13 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 777 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 56 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 14
[[35mlola[0m][I] fired transitions : 13
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 7 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 1037 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 31
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 1555 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 22
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 3111 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for SieveSingleMsgMbox-PT-d2m06-CTLFireability-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1364
[[35mlola[0m][I] fired transitions : 9057
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d2m06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SieveSingleMsgMbox-PT-d2m06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r379-smll-171683811900106"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d2m06.tgz
mv SieveSingleMsgMbox-PT-d2m06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;