fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r379-smll-171683811700058
Last Updated
July 7, 2024

About the Execution of LoLA for SieveSingleMsgMbox-PT-d1m06

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
565.871 42147.00 42926.00 249.00 FTFTTTFFFFFFTFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r379-smll-171683811700058.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SieveSingleMsgMbox-PT-d1m06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r379-smll-171683811700058
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 864K
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 23 07:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 19:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Apr 12 19:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Apr 12 19:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 54K Apr 12 19:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 450K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14
FORMULA_NAME SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717062674974

FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00: CTL false CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01: CTL true CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02: CTL false CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03: CTL true CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04: CTL true CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05: CTL true CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06: CTL false CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07: CTL false CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08: CTL false CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09: CTL false CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10: CONJ false LTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11: CTL false CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12: CTL true CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13: AFAG false CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14: CTL false CTL model checker
[lola] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15: CTL true CTL model checker
[lola]
[lola] Time elapsed: 42 secs. Pages in use: 9

BK_STOP 1717062717121

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 0 transitions removed,1036 places removed
[lola][I] LAUNCH task # 7 (type EXCL) for 6 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02
[lola][I] time limit : 138 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 7 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02
[lola][I] result : false
[lola][I] markings : 5164
[lola][I] fired transitions : 6507
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 50 (type EXCL) for 49 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15
[lola][I] time limit : 156 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 50 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15
[lola][I] result : true
[lola][I] markings : 5194
[lola][I] fired transitions : 6517
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 33 (type EXCL) for 30 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10
[lola][I] time limit : 179 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 33 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10
[lola][I] result : true
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 28 (type EXCL) for 27 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09
[lola][I] time limit : 199 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 28 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09
[lola][I] result : false
[lola][I] markings : 8
[lola][I] fired transitions : 16
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 19 (type EXCL) for 18 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06
[lola][I] time limit : 211 sec
[lola][I] memory limit: 2000 pages
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 52 (type SKEL/SRCH) for 43 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 52 (type SKEL/SRCH) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13
[lola][I] result : false
[lola][I] markings : 6558
[lola][I] fired transitions : 8501
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13: AFAG 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 19 CTL EXCL 4/276 3/2000 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06 417740 m, 83548 m/sec, 1267170 t fired, .
[lola][.]
[lola][.] Time elapsed: 6 secs. Pages in use: 3
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13: AFAG 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 19 CTL EXCL 9/276 5/2000 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06 882964 m, 93044 m/sec, 2686425 t fired, .
[lola][.]
[lola][.] Time elapsed: 11 secs. Pages in use: 5
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10: CONJ 0 1 0 0 3 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13: AFAG 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 19 CTL EXCL 14/276 8/2000 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06 1338749 m, 91157 m/sec, 4184795 t fired, .
[lola][.]
[lola][.] Time elapsed: 16 secs. Pages in use: 8
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 19 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06
[lola][I] result : false
[lola][I] markings : 1551578
[lola][I] fired transitions : 4890846
[lola][I] time used : 17
[lola][I] memory pages used : 9
[lola][I] LAUNCH task # 35 (type EXCL) for 30 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10
[lola][I] time limit : 298 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 35 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10
[lola][I] result : false
[lola][I] markings : 8
[lola][I] fired transitions : 8
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 22 (type EXCL) for 21 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07
[lola][I] time limit : 325 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 22 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07
[lola][I] result : false
[lola][I] markings : 55764
[lola][I] fired transitions : 93028
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 16 (type EXCL) for 15 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05
[lola][I] time limit : 358 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 16 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05
[lola][I] result : true
[lola][I] markings : 8
[lola][I] fired transitions : 30
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 13 (type EXCL) for 12 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04
[lola][I] time limit : 397 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 13 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04
[lola][I] result : true
[lola][I] markings : 8
[lola][I] fired transitions : 16
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 10 (type EXCL) for 9 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03
[lola][I] time limit : 447 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 10 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03
[lola][I] result : true
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 4 (type EXCL) for 3 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01
[lola][I] time limit : 511 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01: CTL 0 0 1 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13: AFAG 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 4 CTL EXCL 2/511 2/2000 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01 241373 m, 48274 m/sec, 495125 t fired, .
[lola][.]
[lola][.] Time elapsed: 21 secs. Pages in use: 9
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 4 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01
[lola][I] result : true
[lola][I] markings : 806319
[lola][I] fired transitions : 1652856
[lola][I] time used : 7
[lola][I] memory pages used : 5
[lola][I] LAUNCH task # 44 (type EXCL) for 43 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13
[lola][I] time limit : 595 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13: AFAG 0 0 1 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 44 CTL EXCL 0/595 1/2000 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13 18564 m, 3712 m/sec, 25474 t fired, .
[lola][.]
[lola][.] Time elapsed: 26 secs. Pages in use: 9
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 44 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13
[lola][I] result : false
[lola][I] markings : 29240
[lola][I] fired transitions : 46563
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 41 (type EXCL) for 40 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12
[lola][I] time limit : 714 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 41 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12
[lola][I] result : true
[lola][I] markings : 8
[lola][I] fired transitions : 8
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 25 (type EXCL) for 24 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08
[lola][I] time limit : 893 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 25 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08
[lola][I] result : false
[lola][I] markings : 8
[lola][I] fired transitions : 16
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 1 (type EXCL) for 0 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00
[lola][I] time limit : 1191 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13: AFAG false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 5/1191 3/2000 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00 505367 m, 101073 m/sec, 1045827 t fired, .
[lola][.]
[lola][.] Time elapsed: 31 secs. Pages in use: 9
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13: AFAG false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 10/1191 6/2000 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00 1029989 m, 104924 m/sec, 2119830 t fired, .
[lola][.]
[lola][.] Time elapsed: 36 secs. Pages in use: 9
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-01: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-03: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-04: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-05: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-06: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-07: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-08: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-10: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-12: CTL true CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-13: AFAG false CTL model checker
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-15: CTL true CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 1 CTL EXCL 15/1191 9/2000 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00 1529446 m, 99891 m/sec, 3288282 t fired, .
[lola][.]
[lola][.] Time elapsed: 41 secs. Pages in use: 9
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] FINISHED task # 1 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-00
[lola][I] result : false
[lola][I] markings : 1551578
[lola][I] fired transitions : 3333038
[lola][I] time used : 16
[lola][I] memory pages used : 9
[lola][I] LAUNCH task # 38 (type EXCL) for 37 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11
[lola][I] time limit : 1779 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 38 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2024-11
[lola][I] result : false
[lola][I] markings : 8
[lola][I] fired transitions : 31
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 47 (type EXCL) for 46 SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14
[lola][I] time limit : 3558 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 47 (type EXCL) for SieveSingleMsgMbox-PT-d1m06-CTLFireability-2023-14
[lola][I] result : false
[lola][I] markings : 23
[lola][I] fired transitions : 40
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d1m06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SieveSingleMsgMbox-PT-d1m06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r379-smll-171683811700058"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d1m06.tgz
mv SieveSingleMsgMbox-PT-d1m06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;