fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r379-smll-171683811700044
Last Updated
July 7, 2024

About the Execution of LoLA for SieveSingleMsgMbox-PT-d0m96

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16207.571 550965.00 446035.00 2641.60 [undef] Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r379-smll-171683811700044.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SieveSingleMsgMbox-PT-d0m96, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r379-smll-171683811700044
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 5.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 45K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.2K Apr 12 19:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 80K Apr 12 19:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Apr 12 19:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Apr 12 19:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 57K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-00
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-01
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-02
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-03
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-04
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-05
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-06
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-07
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-08
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-09
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-10
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-11
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-12
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-13
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-14
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717058655946


BK_STOP 1717059206911

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLFireability.xml
[lola][I] Rule S: 0 transitions removed,190 places removed
[lola][I] LAUNCH task # 10 (type CNST) for 9 SieveSingleMsgMbox-PT-d0m96-LTLFireability-03
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] LAUNCH task # 1 (type EXCL) for 0 SieveSingleMsgMbox-PT-d0m96-LTLFireability-00
[lola][I] time limit : 133 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 10 (type CNST) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-03
[lola][I] result : false
[lola][I] FINISHED task # 1 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-00
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 27 (type EXCL) for 24 SieveSingleMsgMbox-PT-d0m96-LTLFireability-08
[lola][I] time limit : 150 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 27 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-08
[lola][I] result : false
[lola][I] markings : 12
[lola][I] fired transitions : 12
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 7 (type EXCL) for 6 SieveSingleMsgMbox-PT-d0m96-LTLFireability-02
[lola][I] time limit : 171 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 7 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-02
[lola][I] result : false
[lola][I] markings : 10
[lola][I] fired transitions : 10
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 13 (type EXCL) for 12 SieveSingleMsgMbox-PT-d0m96-LTLFireability-04
[lola][I] time limit : 200 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 13 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-04
[lola][I] result : false
[lola][I] markings : 12
[lola][I] fired transitions : 12
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 48 (type EXCL) for 43 SieveSingleMsgMbox-PT-d0m96-LTLFireability-13
[lola][I] time limit : 211 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 48 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-13
[lola][I] result : false
[lola][I] markings : 52
[lola][I] fired transitions : 80
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 41 (type EXCL) for 40 SieveSingleMsgMbox-PT-d0m96-LTLFireability-12
[lola][I] time limit : 257 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 41 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-12
[lola][I] result : false
[lola][I] markings : 10
[lola][I] fired transitions : 10
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 38 (type EXCL) for 37 SieveSingleMsgMbox-PT-d0m96-LTLFireability-11
[lola][I] time limit : 276 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 38 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-11
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 35 (type EXCL) for 34 SieveSingleMsgMbox-PT-d0m96-LTLFireability-10
[lola][I] time limit : 360 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 35 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-10
[lola][I] result : false
[lola][I] markings : 31
[lola][I] fired transitions : 45
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 54 (type EXCL) for 53 SieveSingleMsgMbox-PT-d0m96-LTLFireability-15
[lola][I] time limit : 450 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 54 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-15
[lola][I] result : true
[lola][I] markings : 7
[lola][I] fired transitions : 6
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 32 (type EXCL) for 31 SieveSingleMsgMbox-PT-d0m96-LTLFireability-09
[lola][I] time limit : 514 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 32 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-09
[lola][I] result : false
[lola][I] markings : 12
[lola][I] fired transitions : 12
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 22 (type EXCL) for 21 SieveSingleMsgMbox-PT-d0m96-LTLFireability-07
[lola][I] time limit : 600 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 22 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-07
[lola][I] result : true
[lola][I] markings : 4
[lola][I] fired transitions : 3
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 19 (type EXCL) for 18 SieveSingleMsgMbox-PT-d0m96-LTLFireability-06
[lola][I] time limit : 720 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 19 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-06
[lola][I] result : false
[lola][I] markings : 160
[lola][I] fired transitions : 265
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 51 (type EXCL) for 50 SieveSingleMsgMbox-PT-d0m96-LTLFireability-14
[lola][I] time limit : 900 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 51 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-14
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 4 (type EXCL) for 3 SieveSingleMsgMbox-PT-d0m96-LTLFireability-01
[lola][I] time limit : 1800 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 4 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-LTLFireability-01
[lola][I] result : false
[lola][I] markings : 7
[lola][I] fired transitions : 7
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 16 (type EXCL) for 15 SieveSingleMsgMbox-PT-d0m96-LTLFireability-05
[lola][I] time limit : 3600 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-00: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-01: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-02: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-03: INITIAL false preprocessing
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-04: LTL/CTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-06: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-07: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-08: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-09: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-10: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-11: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-12: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-13: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-14: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-15: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 5/3600 11/2000 SieveSingleMsgMbox-PT-d0m96-LTLFireability-05 1445485 m, 289097 m/sec, 2871179 t fired, .
[lola][.]
[lola][.] Time elapsed: 5 secs. Pages in use: 11
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-00: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-01: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-02: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-03: INITIAL false preprocessing
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-04: LTL/CTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-06: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-07: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-08: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-09: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-10: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-11: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-12: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-13: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-14: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-15: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 10/3600 21/2000 SieveSingleMsgMbox-PT-d0m96-LTLFireability-05 2900072 m, 290917 m/sec, 5775424 t fired, .
[lola][.]
[lola][.] Time elapsed: 10 secs. Pages in use: 21
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-00: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-01: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-02: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-03: INITIAL false preprocessing
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-04: LTL/CTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-06: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-07: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-08: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-09: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-10: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-11: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-12: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-13: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-14: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-15: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 15/3600 29/2000 SieveSingleMsgMbox-PT-d0m96-LTLFireability-05 4051782 m, 230342 m/sec, 8290937 t fired, .
[lola][.]
[lola][.] Time elapsed: 15 secs. Pages in use: 29
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-00: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-01: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-02: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-03: INITIAL false preprocessing
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-04: LTL/CTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-06: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-07: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-08: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-09: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-10: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-11: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-12: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-13: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-14: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-15: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 20/3600 38/2000 SieveSingleMsgMbox-PT-d0m96-LTLFireability-05 5330818 m, 255807 m/sec, 11150645 t fired, .
[lola][.]
[lola][.] Time elapsed: 20 secs. Pages in use: 38
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-00: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-01: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-02: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-03: INITIAL false preprocessing
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-04: LTL/CTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-06: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-07: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-08: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-09: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-10: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-11: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-12: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-13: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-14: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-15: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 25/3600 47/2000 SieveSingleMsgMbox-PT-d0m96-LTLFireability-05 6637993 m, 261435 m/sec, 14082072 t fired, .
[lola][.]
[lola][.] Time elapsed: 25 secs. Pages in use: 47
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-00: LTL true LTL model checker
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[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-00: LTL true LTL model checker
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[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-02: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-03: INITIAL false preprocessing
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-04: LTL/CTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-06: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-07: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-08: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-09: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-10: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-11: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-12: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-13: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-14: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-15: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 468/3600 679/2000 SieveSingleMsgMbox-PT-d0m96-LTLFireability-05 98340961 m, 403 m/sec, 240251234 t fired, .
[lola][.]
[lola][.] Time elapsed: 469 secs. Pages in use: 679
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-00: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-01: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-02: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-03: INITIAL false preprocessing
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-04: LTL/CTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-06: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-07: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-08: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-09: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-10: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-11: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-12: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-13: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-14: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-15: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 493/3600 679/2000 SieveSingleMsgMbox-PT-d0m96-LTLFireability-05 98341065 m, 20 m/sec, 240251472 t fired, .
[lola][.]
[lola][.] Time elapsed: 498 secs. Pages in use: 679
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-00: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-01: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-02: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-03: INITIAL false preprocessing
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-04: LTL/CTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-06: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-07: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-08: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-09: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-10: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-11: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-12: LTL false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-13: CONJ false LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-14: LTL true LTL model checker
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-15: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] SieveSingleMsgMbox-PT-d0m96-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 534/3600 679/2000 SieveSingleMsgMbox-PT-d0m96-LTLFireability-05 98341202 m, 27 m/sec, 240251780 t fired, .
[lola][.]
[lola][.] Time elapsed: 536 secs. Pages in use: 679
[lola][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d0m96"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SieveSingleMsgMbox-PT-d0m96, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r379-smll-171683811700044"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d0m96.tgz
mv SieveSingleMsgMbox-PT-d0m96 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;