About the Execution of LoLA for SieveSingleMsgMbox-PT-d0m96
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 10101.451 | 3600000.00 | 391180.00 | 10950.00 | F?TFTTF????TFT?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r379-smll-171683811700042.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SieveSingleMsgMbox-PT-d0m96, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r379-smll-171683811700042
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 448K
-rw-r--r-- 1 mcc users 5.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 45K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.2K Apr 12 19:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 80K Apr 12 19:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Apr 12 19:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Apr 12 19:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 57K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-00
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-02
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-03
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-04
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-05
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-06
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-07
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-08
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-09
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-10
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-11
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-12
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-13
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-14
FORMULA_NAME SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717058233375
FORMULA SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,190 places removed
[[35mlola[0m][I] LAUNCH task # 28 (type CNST) for 27 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 28 (type CNST) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 64 (type CNST) for 63 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 64 (type CNST) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 133 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 24
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 144 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 37
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 14 (type EXCL) for 3 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 150 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 14 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 42 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 180 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 394
[[35mlola[0m][I] fired transitions : 612
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 240 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 249
[[35mlola[0m][I] fired transitions : 295
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 21
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 75 (type EQUN) for 3 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 61 (type EXCL) for 56 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 300 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 61 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 117
[[35mlola[0m][I] fired transitions : 144
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 70 (type EXCL) for 69 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 360 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 75 (type EQUN) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-12: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-13: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01: DISJ 0 3 0 0 6 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-10: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-14: SP ECTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 70 CTL EXCL 5/360 10/2000 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-15 2043491 m, 408698 m/sec, 2568027 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-12: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-13: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01: DISJ 0 3 0 0 6 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-10: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-14: SP ECTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 70 CTL EXCL 10/360 20/2000 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-15 4010646 m, 393431 m/sec, 5184325 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-02: CTL true CTL model checker[0m
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[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-05: INITIAL true preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-12: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-13: INITIAL true preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01: DISJ 0 3 0 0 6 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-10: DISJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-14: SP ECTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 70 CTL EXCL 15/360 28/2000 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-15 5794723 m, 356815 m/sec, 7712918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-00: CTL false CTL model checker[0m
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[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 461 sec
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[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-09
[[35mlola[0m][I] result : true
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[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-08
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[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-08
[[35mlola[0m][I] result : true
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[[35mlola[0m][I] LAUNCH task # 12 (type EXCL) for 3 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01
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[[35mlola[0m][I] FINISHED task # 12 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 11
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[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 3 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01
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[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-01
[[35mlola[0m][I] result : true
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[[35mlola[0m][I] LAUNCH task # 77 (type EXCL) for 66 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-14
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[[35mlola[0m][I] FINISHED task # 77 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2023-14
[[35mlola[0m][I] result : false
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[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 3230 sec
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[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for SieveSingleMsgMbox-PT-d0m96-CTLFireability-2024-07
[[35mlola[0m][I] result : false
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d0m96"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SieveSingleMsgMbox-PT-d0m96, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r379-smll-171683811700042"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d0m96.tgz
mv SieveSingleMsgMbox-PT-d0m96 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;