About the Execution of LoLA for SieveSingleMsgMbox-PT-d0m36
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16198.632 | 580278.00 | 588110.00 | 1670.90 | FFT?FFF???F?F??F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r379-smll-171683811700028.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SieveSingleMsgMbox-PT-d0m36, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r379-smll-171683811700028
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 488K
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 78K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 19 07:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 19 19:18 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Apr 12 19:34 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 120K Apr 12 19:34 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Apr 12 19:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Apr 12 19:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 57K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-00
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-01
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-02
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-03
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-04
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-05
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-06
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-07
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-08
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-09
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-10
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-11
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-12
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-13
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-14
FORMULA_NAME SieveSingleMsgMbox-PT-d0m36-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717050807192
FORMULA SieveSingleMsgMbox-PT-d0m36-LTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m36-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m36-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m36-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m36-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m36-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m36-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m36-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SieveSingleMsgMbox-PT-d0m36-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717051387470
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,190 places removed
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 SieveSingleMsgMbox-PT-d0m36-LTLFireability-02
[[35mlola[0m][I] time limit : 102 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 76 (type CNST) for 73 SieveSingleMsgMbox-PT-d0m36-LTLFireability-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 76 (type CNST) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 85 (type EXCL) for 27 SieveSingleMsgMbox-PT-d0m36-LTLFireability-05
[[35mlola[0m][I] time limit : 144 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 86 (type EQUN) for 16 SieveSingleMsgMbox-PT-d0m36-LTLFireability-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 89 (type EQUN) for 27 SieveSingleMsgMbox-PT-d0m36-LTLFireability-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 85 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 89 (type EQUN) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-05 (obsolete)
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL) for 63 SieveSingleMsgMbox-PT-d0m36-LTLFireability-13
[[35mlola[0m][I] time limit : 150 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 96 (type FNDP) for 42 SieveSingleMsgMbox-PT-d0m36-LTLFireability-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 97 (type EQUN) for 42 SieveSingleMsgMbox-PT-d0m36-LTLFireability-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 68 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 61 (type EXCL) for 56 SieveSingleMsgMbox-PT-d0m36-LTLFireability-12
[[35mlola[0m][I] time limit : 156 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 61 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 56
[[35mlola[0m][I] fired transitions : 86
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 42 SieveSingleMsgMbox-PT-d0m36-LTLFireability-10
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 96 (type FNDP) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-10 (obsolete)
[[35mlola[0m][W] CANCELED task # 97 (type EQUN) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-10 (obsolete)
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 SieveSingleMsgMbox-PT-d0m36-LTLFireability-06
[[35mlola[0m][I] time limit : 240 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 81 (type EXCL) for 16 SieveSingleMsgMbox-PT-d0m36-LTLFireability-04
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 96 (type FNDP) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 19 (type CNST) for 16 SieveSingleMsgMbox-PT-d0m36-LTLFireability-04
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 81 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 19 (type CNST) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][W] CANCELED task # 86 (type EQUN) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-04 (obsolete)
[[35mlola[0m][I] LAUNCH task # 3 (type EXCL) for 0 SieveSingleMsgMbox-PT-d0m36-LTLFireability-00
[[35mlola[0m][I] time limit : 360 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 100 (type FNDP) for 7 SieveSingleMsgMbox-PT-d0m36-LTLFireability-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 101 (type EQUN) for 7 SieveSingleMsgMbox-PT-d0m36-LTLFireability-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 3 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 102 (type EXCL) for 7 SieveSingleMsgMbox-PT-d0m36-LTLFireability-01
[[35mlola[0m][I] time limit : 450 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 102 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 100 (type FNDP) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-01 (obsolete)
[[35mlola[0m][W] CANCELED task # 101 (type EQUN) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-01 (obsolete)
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 70 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 100 (type FNDP) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 86 (type EQUN) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-04
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 97 (type EQUN) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-10
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 89 (type EQUN) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 101 (type EQUN) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 5/514 7/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 987884 m, 197576 m/sec, 2156028 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 10/514 14/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 1931320 m, 188687 m/sec, 4371888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 15/514 20/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 2873279 m, 188391 m/sec, 6540736 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 20/514 27/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 3808180 m, 186980 m/sec, 8687479 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 27
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 25/514 33/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 4715797 m, 181523 m/sec, 10851126 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 30/514 39/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 5607715 m, 178383 m/sec, 12961139 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 35/514 45/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 6519182 m, 182293 m/sec, 15085525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 40/514 52/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 7442714 m, 184706 m/sec, 17296812 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 45/514 58/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 8337801 m, 179017 m/sec, 19434919 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 50/514 64/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 9243600 m, 181159 m/sec, 21599546 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 55/514 70/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 10152195 m, 181719 m/sec, 23763971 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 60/514 76/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 11047742 m, 179109 m/sec, 25891719 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 65/514 83/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 11977223 m, 185896 m/sec, 28127666 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 70/514 89/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 12880494 m, 180654 m/sec, 30301333 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 89
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 75/514 95/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 13766514 m, 177204 m/sec, 32439325 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 80/514 101/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 14663034 m, 179304 m/sec, 34593401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 85/514 107/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 15561864 m, 179766 m/sec, 36756686 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 90/514 113/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 16456008 m, 178828 m/sec, 38921897 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 95/514 119/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 17340862 m, 176970 m/sec, 41051259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 100/514 125/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 18217381 m, 175303 m/sec, 43174259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 105/514 131/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 19100077 m, 176539 m/sec, 45320874 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 110/514 137/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 19985025 m, 176989 m/sec, 47472493 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 115/514 144/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 20878115 m, 178618 m/sec, 49655743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 144
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 120/514 150/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 21760395 m, 176456 m/sec, 51802420 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 150
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 125/514 156/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 22648038 m, 177528 m/sec, 53956359 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 156
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 130/514 162/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 23541597 m, 178711 m/sec, 56108710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 135/514 168/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 24425701 m, 176820 m/sec, 58246266 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 140/514 174/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 25309273 m, 176714 m/sec, 60390481 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 145/514 179/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 26142554 m, 166656 m/sec, 62449200 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 179
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 150/514 185/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 27021612 m, 175811 m/sec, 64610033 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 185
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 155/514 191/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 27897769 m, 175231 m/sec, 66750363 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 160/514 197/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 28768365 m, 174119 m/sec, 68906920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 165/514 203/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 29657965 m, 177920 m/sec, 71062531 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 170/514 209/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 30548816 m, 178170 m/sec, 73257290 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 209
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 175/514 216/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 31444879 m, 179212 m/sec, 75481180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 180/514 221/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 32300245 m, 171073 m/sec, 77648910 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 185/514 227/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 33159553 m, 171861 m/sec, 79827143 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 190/514 233/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 34033605 m, 174810 m/sec, 82028914 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 233
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 195/514 239/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 34901702 m, 173619 m/sec, 84236737 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 200/514 245/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 35771175 m, 173894 m/sec, 86428943 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 205/514 251/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 36611036 m, 167972 m/sec, 88584678 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 210/514 257/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 37459381 m, 169669 m/sec, 90737306 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 257
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 215/514 262/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 38322463 m, 172616 m/sec, 92918170 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 262
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 220/514 268/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 39174266 m, 170360 m/sec, 95088042 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 268
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 225/514 274/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 40001080 m, 165362 m/sec, 97202433 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 230/514 280/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 40848534 m, 169490 m/sec, 99344893 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 280
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 235/514 285/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 41704482 m, 171189 m/sec, 101548876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 285
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 240/514 291/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 42559804 m, 171064 m/sec, 103736355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 291
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 245/514 297/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 43454857 m, 179010 m/sec, 105975889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 250/514 303/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 44313956 m, 171819 m/sec, 108048202 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 255/514 308/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 45097070 m, 156622 m/sec, 109913776 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 308
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 260/514 314/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 45858730 m, 152332 m/sec, 111754242 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 314
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 265/514 319/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 46609174 m, 150088 m/sec, 113574927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 319
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 270/514 324/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 47359633 m, 150091 m/sec, 115404887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 324
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 275/514 329/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 48099238 m, 147921 m/sec, 117214612 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 329
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 280/514 334/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 48844192 m, 148990 m/sec, 119038556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 334
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 285/514 339/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 49587967 m, 148755 m/sec, 120861229 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 339
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 290/514 344/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 50339801 m, 150366 m/sec, 122700341 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 295/514 349/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 51084987 m, 149037 m/sec, 124526755 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 349
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 300/514 354/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 51843204 m, 151643 m/sec, 126377777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 305/514 360/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 52655909 m, 162541 m/sec, 128407171 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 360
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 310/514 365/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 53481440 m, 165106 m/sec, 130449613 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 365
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 315/514 371/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 54295285 m, 162769 m/sec, 132485809 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 371
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 320/514 376/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 55107395 m, 162422 m/sec, 134528534 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 376
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 325/514 382/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 55921131 m, 162747 m/sec, 136595350 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 382
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 330/514 387/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 56734491 m, 162672 m/sec, 138587541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 387
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 335/514 393/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 57552623 m, 163626 m/sec, 140532330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 393
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 340/514 398/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 58361597 m, 161794 m/sec, 142501927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 398
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 345/514 404/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 59167531 m, 161186 m/sec, 144396490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 350/514 409/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 59969953 m, 160484 m/sec, 146378548 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 409
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 355/514 415/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 60759532 m, 157915 m/sec, 148318328 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 415
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 360/514 420/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 61561370 m, 160367 m/sec, 150245020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 420
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 365/514 426/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 62365199 m, 160765 m/sec, 152239946 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 426
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 370/514 431/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 63154434 m, 157847 m/sec, 154197313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 431
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 375/514 437/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 63962342 m, 161581 m/sec, 156192229 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 437
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 380/514 442/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 64751941 m, 157919 m/sec, 158121990 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 442
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 385/514 447/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 65537891 m, 157190 m/sec, 160067714 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 447
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 390/514 453/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 66328111 m, 158044 m/sec, 162059683 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 453
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 395/514 458/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 67108184 m, 156014 m/sec, 164032112 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 458
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 400/514 463/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 67895668 m, 157496 m/sec, 166014918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 463
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 405/514 468/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 68673492 m, 155564 m/sec, 167985467 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 410/514 474/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 69455810 m, 156463 m/sec, 169933351 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 474
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 415/514 479/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 70237365 m, 156311 m/sec, 171888367 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 479
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 420/514 484/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 71016962 m, 155919 m/sec, 173834064 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 484
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 425/514 490/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 71788053 m, 154218 m/sec, 175869099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 490
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 430/514 495/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 72562404 m, 154870 m/sec, 177806243 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 495
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 435/514 500/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 73345352 m, 156589 m/sec, 179781713 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 500
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 440/514 505/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 74131072 m, 157144 m/sec, 181767549 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 505
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 445/514 511/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 74916990 m, 157183 m/sec, 183757223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 511
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 450/514 516/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 75697192 m, 156040 m/sec, 185725984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 516
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 455/514 521/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 76476852 m, 155932 m/sec, 187702426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 521
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 460/514 527/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 77257239 m, 156077 m/sec, 189697813 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 527
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 465/514 532/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 78049943 m, 158540 m/sec, 191714313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 532
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 470/514 537/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 78846620 m, 159335 m/sec, 193744558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 537
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 475/514 543/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 79641402 m, 158956 m/sec, 195801571 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 543
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 480/514 548/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 80421612 m, 156042 m/sec, 197857438 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 548
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 485/514 553/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 81172101 m, 150097 m/sec, 199890927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 553
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 490/514 558/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 81931328 m, 151845 m/sec, 201934376 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 558
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 495/514 563/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 82659802 m, 145694 m/sec, 203934685 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 563
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 500/514 568/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 83389272 m, 145894 m/sec, 205926618 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 568
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 505/514 574/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 84165690 m, 155283 m/sec, 207993031 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 574
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 LTL EXCL 510/514 579/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 84922650 m, 151392 m/sec, 210048868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 579
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 71 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 584
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 70 SieveSingleMsgMbox-PT-d0m36-LTLFireability-14
[[35mlola[0m][I] time limit : 3085 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] CANCELED task # 71 (type EXCL) for SieveSingleMsgMbox-PT-d0m36-LTLFireability-14 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 5/514 9/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 1259759 m, 251951 m/sec, 2724563 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 596
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 10/514 17/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 2414739 m, 230996 m/sec, 5403814 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 601
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 15/514 25/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 3537701 m, 224592 m/sec, 8117424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 609
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 20/514 33/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 4702131 m, 232886 m/sec, 10898927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 617
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 25/514 41/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 5828378 m, 225249 m/sec, 13684212 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 625
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 30/514 48/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 6946468 m, 223618 m/sec, 16463598 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 545 secs. Pages in use: 632
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 35/514 56/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 7997469 m, 210200 m/sec, 19092799 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 550 secs. Pages in use: 640
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 40/514 63/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 9035573 m, 207620 m/sec, 21692420 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 555 secs. Pages in use: 647
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 45/514 70/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 10090395 m, 210964 m/sec, 24272596 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 560 secs. Pages in use: 654
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 50/514 77/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 11142898 m, 210500 m/sec, 26903264 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 565 secs. Pages in use: 661
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 55/514 84/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 12167565 m, 204933 m/sec, 29465357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 570 secs. Pages in use: 668
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-00: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-01: AG false state space[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m36-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-04: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-05: F false state space / EG[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m36-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-11: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-13: CONJ 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m36-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 60/514 91/2000 SieveSingleMsgMbox-PT-d0m36-LTLFireability-11 13188241 m, 204135 m/sec, 32047502 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 575 secs. Pages in use: 675
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 406 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d0m36"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SieveSingleMsgMbox-PT-d0m36, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r379-smll-171683811700028"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d0m36.tgz
mv SieveSingleMsgMbox-PT-d0m36 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;