About the Execution of LoLA for SieveSingleMsgMbox-PT-d0m18
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 506662.00 | 0.00 | 0.00 | [undef] | Cannot compute |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r379-smll-171683811700020.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SieveSingleMsgMbox-PT-d0m18, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r379-smll-171683811700020
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 500K
-rw-r--r-- 1 mcc users 7.1K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 68K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.1K Apr 12 19:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 78K Apr 12 19:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 19:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 93K Apr 12 19:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 57K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-00
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-01
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-02
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-03
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-04
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-05
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-06
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-07
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-08
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-09
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-10
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-11
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-12
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-13
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-14
FORMULA_NAME SieveSingleMsgMbox-PT-d0m18-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717048623360
BK_STOP 1717049130022
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] LAUNCH task # 68 (type CNST) for 65 SieveSingleMsgMbox-PT-d0m18-LTLFireability-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 68 (type CNST) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] Rule S: 0 transitions removed,190 places removed
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 SieveSingleMsgMbox-PT-d0m18-LTLFireability-01
[[35mlola[0m][I] time limit : 180 sec
[[35mlola[0m][I] memory limit: 2000 pages
[*** LOG ERROR #0001 ***] [2024-05-30 05:57:03] [status_logger] string pointer is null
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 413
[[35mlola[0m][I] fired transitions : 730
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 57 (type EXCL) for 48 SieveSingleMsgMbox-PT-d0m18-LTLFireability-12
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 57 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 60 (type EXCL) for 59 SieveSingleMsgMbox-PT-d0m18-LTLFireability-13
[[35mlola[0m][I] time limit : 200 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 60 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 48 SieveSingleMsgMbox-PT-d0m18-LTLFireability-12
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 55 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 48 SieveSingleMsgMbox-PT-d0m18-LTLFireability-12
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 37 SieveSingleMsgMbox-PT-d0m18-LTLFireability-11
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 33 (type EXCL) for 30 SieveSingleMsgMbox-PT-d0m18-LTLFireability-10
[[35mlola[0m][I] time limit : 300 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 33 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 SieveSingleMsgMbox-PT-d0m18-LTLFireability-09
[[35mlola[0m][I] time limit : 360 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 SieveSingleMsgMbox-PT-d0m18-LTLFireability-05
[[35mlola[0m][I] time limit : 400 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 SieveSingleMsgMbox-PT-d0m18-LTLFireability-04
[[35mlola[0m][I] time limit : 450 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 SieveSingleMsgMbox-PT-d0m18-LTLFireability-02
[[35mlola[0m][I] time limit : 514 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 SieveSingleMsgMbox-PT-d0m18-LTLFireability-00
[[35mlola[0m][I] time limit : 600 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 SieveSingleMsgMbox-PT-d0m18-LTLFireability-07
[[35mlola[0m][I] time limit : 720 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 491
[[35mlola[0m][I] fired transitions : 886
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 63 (type EXCL) for 62 SieveSingleMsgMbox-PT-d0m18-LTLFireability-14
[[35mlola[0m][I] time limit : 900 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 63 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 12
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 SieveSingleMsgMbox-PT-d0m18-LTLFireability-08
[[35mlola[0m][I] time limit : 1200 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 SieveSingleMsgMbox-PT-d0m18-LTLFireability-06
[[35mlola[0m][I] time limit : 1800 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for SieveSingleMsgMbox-PT-d0m18-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 8
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 SieveSingleMsgMbox-PT-d0m18-LTLFireability-03
[[35mlola[0m][I] time limit : 3600 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m18-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m18-LTLFireability-09: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-11: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m18-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 5/3600 10/2000 SieveSingleMsgMbox-PT-d0m18-LTLFireability-03 1363644 m, 272728 m/sec, 3134868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-05: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m18-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m18-LTLFireability-09: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-11: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m18-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 10/3600 18/2000 SieveSingleMsgMbox-PT-d0m18-LTLFireability-03 2627634 m, 252798 m/sec, 6187613 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-02: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-04: LTL false LTL model checker[0m
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[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m18-LTLFireability-08: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mSieveSingleMsgMbox-PT-d0m18-LTLFireability-09: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-11: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-12: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mSieveSingleMsgMbox-PT-d0m18-LTLFireability-15: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SieveSingleMsgMbox-PT-d0m18-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 405 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d0m18"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SieveSingleMsgMbox-PT-d0m18, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r379-smll-171683811700020"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d0m18.tgz
mv SieveSingleMsgMbox-PT-d0m18 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;