Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r378-smll-171683811300332.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool itstools
Input is SmallOperatingSystem-PT-MT8192DC4096, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r378-smll-171683811300332
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 492K
-rw-r--r-- 1 mcc users 11K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 95K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Apr 23 07:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Apr 23 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 12 14:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 115K Apr 12 14:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.6K Apr 12 14:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Apr 12 14:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Apr 23 07:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 13 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 8.1K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-00
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-01
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-04
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-08
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-09
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-10
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-11
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-12
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-13
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14
FORMULA_NAME SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717026396322

Invoking MCC driver with
BK_TOOL=itstools
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT8192DC4096
BK_MEMORY_CONFINEMENT=16384
Not applying reductions.
Model is PT
LTLFireability PT
Running Version 202405141337
[2024-05-29 23:46:38] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -its, -ltsmin, -greatspnpath, /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2024-05-29 23:46:38] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-29 23:46:38] [INFO ] Load time of PNML (sax parser for PT used): 61 ms
[2024-05-29 23:46:38] [INFO ] Transformed 9 places.
[2024-05-29 23:46:38] [INFO ] Transformed 8 transitions.
[2024-05-29 23:46:38] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 272 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 27 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 5 formulas.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 8 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 46 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2024-05-29 23:46:39] [INFO ] Computed 4 invariants in 10 ms
[2024-05-29 23:46:39] [INFO ] Implicit Places using invariants in 238 ms returned []
[2024-05-29 23:46:39] [INFO ] Invariant cache hit.
[2024-05-29 23:46:39] [INFO ] Implicit Places using invariants and state equation in 47 ms returned []
Implicit Place search using SMT with State Equation took 349 ms to find 0 implicit places.
Running 7 sub problems to find dead transitions.
[2024-05-29 23:46:39] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 0 solved, 7 unsolved in 241 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 7 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 7/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 7 (OVERLAPS) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 20 constraints, problems are : Problem set: 0 solved, 7 unsolved in 186 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
After SMT, in 470ms problems are : Problem set: 0 solved, 7 unsolved
Search for dead transitions found 0 dead transitions in 487ms
Finished structural reductions in LTL mode , in 1 iterations and 924 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 8 out of 9 places after structural reductions.
[2024-05-29 23:46:40] [INFO ] Flatten gal took : 25 ms
[2024-05-29 23:46:40] [INFO ] Flatten gal took : 7 ms
[2024-05-29 23:46:40] [INFO ] Input system was already deterministic with 8 transitions.
Reduction of identical properties reduced properties to check from 8 to 7
RANDOM walk for 49172 steps (8 resets) in 333 ms. (147 steps per ms) remains 5/7 properties
BEST_FIRST walk for 719 steps (0 resets) in 19 ms. (35 steps per ms) remains 0/5 properties
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-10 FALSE TECHNIQUES REACHABILITY_KNOWLEDGE
Computed a total of 0 stabilizing places and 0 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 5 place count 6 transition count 6
Partial Post-agglomeration rule applied 1 times.
Drop transitions (Partial Post agglomeration) removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 6 place count 6 transition count 6
Applied a total of 6 rules in 39 ms. Remains 6 /9 variables (removed 3) and now considering 6/8 (removed 2) transitions.
// Phase 1: matrix 6 rows 6 cols
[2024-05-29 23:46:40] [INFO ] Computed 3 invariants in 1 ms
[2024-05-29 23:46:40] [INFO ] Implicit Places using invariants in 23 ms returned []
[2024-05-29 23:46:40] [INFO ] Invariant cache hit.
[2024-05-29 23:46:40] [INFO ] State equation strengthened by 1 read => feed constraints.
[2024-05-29 23:46:40] [INFO ] Implicit Places using invariants and state equation in 44 ms returned []
Implicit Place search using SMT with State Equation took 70 ms to find 0 implicit places.
[2024-05-29 23:46:40] [INFO ] Redundant transitions in 1 ms returned []
Running 5 sub problems to find dead transitions.
[2024-05-29 23:46:40] [INFO ] Invariant cache hit.
[2024-05-29 23:46:40] [INFO ] State equation strengthened by 1 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/5 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/5 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 2 (OVERLAPS) 1/6 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/6 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 4 (OVERLAPS) 5/11 variables, 6/9 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/11 variables, 0/9 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 6 (OVERLAPS) 1/12 variables, 1/10 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/12 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 8 (OVERLAPS) 0/12 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 5 unsolved
No progress, stopping.
After SMT solving in domain Real declared 12/12 variables, and 10 constraints, problems are : Problem set: 0 solved, 5 unsolved in 157 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 6/6 constraints, ReadFeed: 1/1 constraints, PredecessorRefiner: 5/5 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 5 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/5 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/5 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 2 (OVERLAPS) 1/6 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/6 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 4 (OVERLAPS) 5/11 variables, 6/9 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/11 variables, 5/14 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/11 variables, 0/14 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 7 (OVERLAPS) 1/12 variables, 1/15 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/12 variables, 0/15 constraints. Problems are: Problem set: 0 solved, 5 unsolved
At refinement iteration 9 (OVERLAPS) 0/12 variables, 0/15 constraints. Problems are: Problem set: 0 solved, 5 unsolved
No progress, stopping.
After SMT solving in domain Int declared 12/12 variables, and 15 constraints, problems are : Problem set: 0 solved, 5 unsolved in 119 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 6/6 constraints, ReadFeed: 1/1 constraints, PredecessorRefiner: 5/5 constraints, Known Traps: 0/0 constraints]
After SMT, in 285ms problems are : Problem set: 0 solved, 5 unsolved
Search for dead transitions found 0 dead transitions in 287ms
Starting structural reductions in SI_LTL mode, iteration 1 : 6/9 places, 6/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 403 ms. Remains : 6/9 places, 6/8 transitions.
Stuttering acceptance computed with spot in 271 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02
Stuttering criterion allowed to conclude after 2 steps with 0 reset in 1 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-02 finished in 756 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(((X(p1)||F(p2))&&p0)))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 5 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2024-05-29 23:46:41] [INFO ] Computed 3 invariants in 1 ms
[2024-05-29 23:46:41] [INFO ] Implicit Places using invariants in 37 ms returned []
[2024-05-29 23:46:41] [INFO ] Invariant cache hit.
[2024-05-29 23:46:41] [INFO ] Implicit Places using invariants and state equation in 41 ms returned []
Implicit Place search using SMT with State Equation took 80 ms to find 0 implicit places.
Running 7 sub problems to find dead transitions.
[2024-05-29 23:46:41] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/7 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/8 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/16 variables, 8/11 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/16 variables, 0/11 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (OVERLAPS) 0/16 variables, 0/11 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Real declared 16/16 variables, and 11 constraints, problems are : Problem set: 0 solved, 7 unsolved in 168 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 8/8 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 7 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/7 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/8 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/16 variables, 8/11 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/16 variables, 7/18 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/16 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 7 (OVERLAPS) 0/16 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Int declared 16/16 variables, and 18 constraints, problems are : Problem set: 0 solved, 7 unsolved in 107 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 8/8 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
After SMT, in 285ms problems are : Problem set: 0 solved, 7 unsolved
Search for dead transitions found 0 dead transitions in 286ms
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 371 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 191 ms :[(OR (AND (NOT p0) (NOT p2)) (AND (NOT p1) (NOT p2))), (OR (NOT p0) (AND (NOT p1) (NOT p2))), (AND (NOT p1) (NOT p2))]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03
Product exploration explored 100000 steps with 11542 reset in 492 ms.
Stack based approach found an accepted trace after 75 steps with 11 reset with depth 6 and stack size 6 in 12 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-03 finished in 1097 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((!p0 U p1))'
Support contains 5 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 3 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2024-05-29 23:46:42] [INFO ] Computed 4 invariants in 0 ms
[2024-05-29 23:46:42] [INFO ] Implicit Places using invariants in 24 ms returned []
[2024-05-29 23:46:42] [INFO ] Invariant cache hit.
[2024-05-29 23:46:42] [INFO ] Implicit Places using invariants and state equation in 29 ms returned []
Implicit Place search using SMT with State Equation took 57 ms to find 0 implicit places.
[2024-05-29 23:46:42] [INFO ] Redundant transitions in 0 ms returned []
Running 6 sub problems to find dead transitions.
[2024-05-29 23:46:42] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/8 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/8 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/15 variables, 8/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/15 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/15 variables, 0/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 15/15 variables, and 12 constraints, problems are : Problem set: 0 solved, 6 unsolved in 92 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 8/8 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/7 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/8 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/8 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/15 variables, 8/12 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/15 variables, 6/18 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/15 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/15 variables, 0/18 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 15/15 variables, and 18 constraints, problems are : Problem set: 0 solved, 6 unsolved in 81 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 8/8 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
After SMT, in 180ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 181ms
Starting structural reductions in SI_LTL mode, iteration 1 : 8/9 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 247 ms. Remains : 8/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 51 ms :[true, (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05
Product exploration explored 100000 steps with 7896 reset in 154 ms.
Stack based approach found an accepted trace after 2 steps with 0 reset with depth 3 and stack size 3 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-05 finished in 468 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F((F(!(p0 U p1))&&F(X(G(F(p0))))))))'
Support contains 2 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2024-05-29 23:46:43] [INFO ] Computed 3 invariants in 1 ms
[2024-05-29 23:46:43] [INFO ] Implicit Places using invariants in 35 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 40 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 8/8 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 42 ms. Remains : 7/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 239 ms :[(OR (NOT p0) p1), (OR (NOT p0) p1), p1, (NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06
Product exploration explored 100000 steps with 6 reset in 118 ms.
Stack based approach found an accepted trace after 84 steps with 2 reset with depth 79 and stack size 73 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-06 finished in 421 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0)&&F(!p1))))'
Support contains 4 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 2 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2024-05-29 23:46:43] [INFO ] Computed 4 invariants in 1 ms
[2024-05-29 23:46:43] [INFO ] Implicit Places using invariants in 29 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 31 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Partial Post-agglomeration rule applied 1 times.
Drop transitions (Partial Post agglomeration) removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 7 transition count 7
Applied a total of 1 rules in 3 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
// Phase 1: matrix 7 rows 7 cols
[2024-05-29 23:46:43] [INFO ] Computed 3 invariants in 0 ms
[2024-05-29 23:46:43] [INFO ] Implicit Places using invariants in 22 ms returned []
[2024-05-29 23:46:43] [INFO ] Invariant cache hit.
[2024-05-29 23:46:43] [INFO ] Implicit Places using invariants and state equation in 27 ms returned []
Implicit Place search using SMT with State Equation took 56 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 7/9 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 93 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 120 ms :[(OR (NOT p0) p1), (NOT p0), p1]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07
Product exploration explored 100000 steps with 10237 reset in 153 ms.
Stack based approach found an accepted trace after 33 steps with 2 reset with depth 13 and stack size 11 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-07 finished in 386 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(F(p0)))'
Support contains 1 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 8 cols
[2024-05-29 23:46:43] [INFO ] Computed 3 invariants in 1 ms
[2024-05-29 23:46:43] [INFO ] Implicit Places using invariants in 29 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 31 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 7 /7 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 32 ms. Remains : 7/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 173 ms :[(NOT p0), (NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-08
Product exploration explored 100000 steps with 4924 reset in 213 ms.
Stack based approach found an accepted trace after 3 steps with 0 reset with depth 4 and stack size 4 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-08 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-08 finished in 431 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(X((!X(p0) U (p1 U p1)))))'
Support contains 1 out of 9 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2024-05-29 23:46:44] [INFO ] Computed 3 invariants in 0 ms
[2024-05-29 23:46:44] [INFO ] Implicit Places using invariants in 30 ms returned []
[2024-05-29 23:46:44] [INFO ] Invariant cache hit.
[2024-05-29 23:46:44] [INFO ] Implicit Places using invariants and state equation in 36 ms returned []
Implicit Place search using SMT with State Equation took 68 ms to find 0 implicit places.
Running 6 sub problems to find dead transitions.
[2024-05-29 23:46:44] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 14/14 variables, and 10 constraints, problems are : Problem set: 0 solved, 6 unsolved in 110 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 6/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 14/14 variables, and 16 constraints, problems are : Problem set: 0 solved, 6 unsolved in 126 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
After SMT, in 240ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 241ms
Starting structural reductions in LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 310 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 98 ms :[(NOT p1), (NOT p1)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-12
Product exploration explored 100000 steps with 24979 reset in 56 ms.
Product exploration explored 100000 steps with 24944 reset in 72 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1))]
Knowledge sufficient to adopt a stutter insensitive property.
Knowledge based reduction with 2 factoid took 158 ms. Reduced automaton from 2 states, 2 edges and 1 AP (stutter sensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 88 ms :[(NOT p1), (NOT p1)]
RANDOM walk for 49172 steps (8 resets) in 25 ms. (1891 steps per ms) remains 1/1 properties
BEST_FIRST walk for 16 steps (0 resets) in 5 ms. (2 steps per ms) remains 0/1 properties
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1)), (F p1)]
Knowledge based reduction with 2 factoid took 166 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 77 ms :[(NOT p1), (NOT p1)]
Stuttering acceptance computed with spot in 83 ms :[(NOT p1), (NOT p1)]
[2024-05-29 23:46:45] [INFO ] Invariant cache hit.
[2024-05-29 23:46:45] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2024-05-29 23:46:45] [INFO ] [Real]Absence check using state equation in 8 ms returned sat
[2024-05-29 23:46:45] [INFO ] Computed and/alt/rep : 6/8/6 causal constraints (skipped 0 transitions) in 3 ms.
[2024-05-29 23:46:45] [INFO ] Added : 0 causal constraints over 0 iterations in 9 ms. Result :sat
Could not prove EG (NOT p1)
Support contains 1 out of 7 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in SI_LTL mode, iteration 0 : 7/7 places, 7/7 transitions.
Applied a total of 0 rules in 1 ms. Remains 7 /7 variables (removed 0) and now considering 7/7 (removed 0) transitions.
[2024-05-29 23:46:45] [INFO ] Invariant cache hit.
[2024-05-29 23:46:45] [INFO ] Implicit Places using invariants in 22 ms returned []
[2024-05-29 23:46:45] [INFO ] Invariant cache hit.
[2024-05-29 23:46:45] [INFO ] Implicit Places using invariants and state equation in 30 ms returned []
Implicit Place search using SMT with State Equation took 54 ms to find 0 implicit places.
[2024-05-29 23:46:45] [INFO ] Redundant transitions in 0 ms returned []
Running 6 sub problems to find dead transitions.
[2024-05-29 23:46:45] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 14/14 variables, and 10 constraints, problems are : Problem set: 0 solved, 6 unsolved in 73 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 6/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 14/14 variables, and 16 constraints, problems are : Problem set: 0 solved, 6 unsolved in 73 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
After SMT, in 151ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 151ms
Finished structural reductions in SI_LTL mode , in 1 iterations and 211 ms. Remains : 7/7 places, 7/7 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1))]
Knowledge based reduction with 2 factoid took 116 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 67 ms :[(NOT p1), (NOT p1)]
RANDOM walk for 49172 steps (8 resets) in 60 ms. (806 steps per ms) remains 1/1 properties
BEST_FIRST walk for 16 steps (0 resets) in 5 ms. (2 steps per ms) remains 0/1 properties
Knowledge obtained : [(NOT p1), (X (NOT p1))]
False Knowledge obtained : [(X (X (NOT p1))), (X (X p1)), (F p1)]
Knowledge based reduction with 2 factoid took 148 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 71 ms :[(NOT p1), (NOT p1)]
Stuttering acceptance computed with spot in 86 ms :[(NOT p1), (NOT p1)]
[2024-05-29 23:46:46] [INFO ] Invariant cache hit.
[2024-05-29 23:46:46] [INFO ] [Real]Absence check using 3 positive place invariants in 1 ms returned sat
[2024-05-29 23:46:46] [INFO ] [Real]Absence check using state equation in 6 ms returned sat
[2024-05-29 23:46:46] [INFO ] Computed and/alt/rep : 6/8/6 causal constraints (skipped 0 transitions) in 2 ms.
[2024-05-29 23:46:46] [INFO ] Added : 0 causal constraints over 0 iterations in 6 ms. Result :sat
Could not prove EG (NOT p1)
Stuttering acceptance computed with spot in 87 ms :[(NOT p1), (NOT p1)]
Product exploration explored 100000 steps with 24945 reset in 134 ms.
Product exploration explored 100000 steps with 24999 reset in 104 ms.
Built C files in :
/tmp/ltsmin15091124084255261644
[2024-05-29 23:46:46] [INFO ] Computing symmetric may disable matrix : 7 transitions.
[2024-05-29 23:46:46] [INFO ] Computation of Complete disable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2024-05-29 23:46:46] [INFO ] Computing symmetric may enable matrix : 7 transitions.
[2024-05-29 23:46:46] [INFO ] Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2024-05-29 23:46:46] [INFO ] Computing Do-Not-Accords matrix : 7 transitions.
[2024-05-29 23:46:46] [INFO ] Computation of Completed DNA matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2024-05-29 23:46:46] [INFO ] Built C files in 25ms conformant to PINS (ltsmin variant)in folder :/tmp/ltsmin15091124084255261644
Running compilation step : cd /tmp/ltsmin15091124084255261644;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202405141337/bin/limit_time.pl' '3' 'gcc' '-c' '-I/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202405141337/bin/include/' '-I.' '-std=c99' '-fPIC' '-O0' 'model.c'
Compilation finished in 310 ms.
Running link step : cd /tmp/ltsmin15091124084255261644;'gcc' '-shared' '-o' 'gal.so' 'model.o'
Link finished in 74 ms.
Running LTSmin : cd /tmp/ltsmin15091124084255261644;'/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.move.gal.ltsmin.binaries_1.0.0.202405141337/bin/pins2lts-mc-linux64' './gal.so' '--threads=8' '-p' '--pins-guards' '--when' '--hoa' '/tmp/stateBased7340536228461360690.hoa' '--buchi-type=spotba'
LTSmin run took 561 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-12 finished in 3399 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 2 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 8 cols
[2024-05-29 23:46:47] [INFO ] Computed 4 invariants in 1 ms
[2024-05-29 23:46:47] [INFO ] Implicit Places using invariants in 44 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 46 ms to find 1 implicit places.
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 6 transition count 6
Applied a total of 2 rules in 2 ms. Remains 6 /7 variables (removed 1) and now considering 6/7 (removed 1) transitions.
// Phase 1: matrix 6 rows 6 cols
[2024-05-29 23:46:47] [INFO ] Computed 3 invariants in 0 ms
[2024-05-29 23:46:47] [INFO ] Implicit Places using invariants in 29 ms returned []
[2024-05-29 23:46:47] [INFO ] Invariant cache hit.
[2024-05-29 23:46:47] [INFO ] Implicit Places using invariants and state equation in 27 ms returned []
Implicit Place search using SMT with State Equation took 58 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 6/9 places, 6/8 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 109 ms. Remains : 6/9 places, 6/8 transitions.
Stuttering acceptance computed with spot in 41 ms :[(NOT p0)]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-13
Product exploration explored 100000 steps with 0 reset in 164 ms.
Stack based approach found an accepted trace after 1 steps with 0 reset with depth 2 and stack size 2 in 0 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-13 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-13 finished in 338 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((G(p0)||G(p1))))'
Support contains 3 out of 9 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 3 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
// Phase 1: matrix 7 rows 7 cols
[2024-05-29 23:46:47] [INFO ] Computed 3 invariants in 1 ms
[2024-05-29 23:46:48] [INFO ] Implicit Places using invariants in 24 ms returned []
[2024-05-29 23:46:48] [INFO ] Invariant cache hit.
[2024-05-29 23:46:48] [INFO ] Implicit Places using invariants and state equation in 30 ms returned []
Implicit Place search using SMT with State Equation took 55 ms to find 0 implicit places.
[2024-05-29 23:46:48] [INFO ] Redundant transitions in 0 ms returned []
Running 6 sub problems to find dead transitions.
[2024-05-29 23:46:48] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (OVERLAPS) 0/14 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Real declared 14/14 variables, and 10 constraints, problems are : Problem set: 0 solved, 6 unsolved in 132 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 6 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/6 variables, 2/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/6 variables, 0/2 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 2 (OVERLAPS) 1/7 variables, 1/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/7 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 4 (OVERLAPS) 7/14 variables, 7/10 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/14 variables, 6/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
At refinement iteration 7 (OVERLAPS) 0/14 variables, 0/16 constraints. Problems are: Problem set: 0 solved, 6 unsolved
No progress, stopping.
After SMT solving in domain Int declared 14/14 variables, and 16 constraints, problems are : Problem set: 0 solved, 6 unsolved in 98 ms.
Refiners :[Positive P Invariants (semi-flows): 3/3 constraints, State Equation: 7/7 constraints, PredecessorRefiner: 6/6 constraints, Known Traps: 0/0 constraints]
After SMT, in 237ms problems are : Problem set: 0 solved, 6 unsolved
Search for dead transitions found 0 dead transitions in 238ms
Starting structural reductions in SI_LTL mode, iteration 1 : 7/9 places, 7/8 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 307 ms. Remains : 7/9 places, 7/8 transitions.
Stuttering acceptance computed with spot in 52 ms :[(AND (NOT p0) (NOT p1))]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14
Product exploration explored 100000 steps with 0 reset in 231 ms.
Stack based approach found an accepted trace after 1217 steps with 0 reset with depth 1218 and stack size 943 in 4 ms.
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14 FALSE TECHNIQUES STACK_TEST
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-14 finished in 609 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((p0||X(X(X(G(!p1))))) U X(p2)))'
Support contains 5 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2024-05-29 23:46:48] [INFO ] Computed 4 invariants in 1 ms
[2024-05-29 23:46:48] [INFO ] Implicit Places using invariants in 34 ms returned [6]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 36 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 8/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 8 /8 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 38 ms. Remains : 8/9 places, 8/8 transitions.
Stuttering acceptance computed with spot in 353 ms :[(NOT p2), (AND (NOT p2) p1), (NOT p2), p1, p1, true]
Running random walk in product with property : SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15
Product exploration explored 100000 steps with 50000 reset in 37 ms.
Product exploration explored 100000 steps with 50000 reset in 54 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) (NOT p2) (NOT p1)), (X (NOT (AND (NOT p0) (NOT p2)))), (X p2), (X (NOT p0)), (X (X (NOT p0)))]
False Knowledge obtained : [(X (X (AND (NOT p0) (NOT p2)))), (X (X (NOT (AND (NOT p0) (NOT p2))))), (X (X (NOT p2))), (X (X p2))]
Property proved to be true thanks to knowledge (Minato strategy)
Knowledge based reduction with 5 factoid took 19 ms. Reduced automaton from 6 states, 9 edges and 3 AP (stutter sensitive) to 1 states, 0 edges and 0 AP (stutter insensitive).
FORMULA SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15 TRUE TECHNIQUES KNOWLEDGE
Treatment of property SmallOperatingSystem-PT-MT8192DC4096-LTLFireability-15 finished in 531 ms.
All properties solved by simple procedures.
Total runtime 10890 ms.

BK_STOP 1717026409173

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
+ BINDIR=/home/mcc/BenchKit/bin//../itstools/bin//../
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit/bin//../itstools/bin//..//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../itstools/bin//..//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -its -ltsmin -greatspnpath /home/mcc/BenchKit/bin//../itstools/bin//..//greatspn/ -order META -manyOrder -smt -timeout 3600

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT8192DC4096"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool itstools"
echo " Input is SmallOperatingSystem-PT-MT8192DC4096, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r378-smll-171683811300332"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT8192DC4096.tgz
mv SmallOperatingSystem-PT-MT8192DC4096 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;