Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r377-smll-171683809900209.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is SmallOperatingSystem-PT-MT0064DC0016, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r377-smll-171683809900209
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 508K
-rw-r--r-- 1 mcc users 8.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 37K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.7K Apr 23 07:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 23 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 23 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 12 14:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 122K Apr 12 14:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Apr 12 14:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 109K Apr 12 14:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Apr 23 07:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 13 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 8.2K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-00
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-01
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-02
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-03
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-04
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-05
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-06
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-07
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-08
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-09
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-10
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-11
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2023-12
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2023-13
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2023-14
FORMULA_NAME SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2023-15

=== Now, execution of the tool begins

BK_START 1716948411361

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT0064DC0016
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-29 02:06:53] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2024-05-29 02:06:53] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-29 02:06:53] [INFO ] Load time of PNML (sax parser for PT used): 131 ms
[2024-05-29 02:06:53] [INFO ] Transformed 9 places.
[2024-05-29 02:06:53] [INFO ] Transformed 8 transitions.
[2024-05-29 02:06:53] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 410 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 32 ms.
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 14 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2024-05-29 02:06:53] [INFO ] Computed 4 invariants in 4 ms
[2024-05-29 02:06:54] [INFO ] Implicit Places using invariants in 199 ms returned []
[2024-05-29 02:06:54] [INFO ] Invariant cache hit.
[2024-05-29 02:06:54] [INFO ] Implicit Places using invariants and state equation in 49 ms returned []
Implicit Place search using SMT with State Equation took 307 ms to find 0 implicit places.
Running 7 sub problems to find dead transitions.
[2024-05-29 02:06:54] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 0 solved, 7 unsolved in 189 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 7 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 7/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 7 (OVERLAPS) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 20 constraints, problems are : Problem set: 0 solved, 7 unsolved in 127 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
After SMT, in 346ms problems are : Problem set: 0 solved, 7 unsolved
Search for dead transitions found 0 dead transitions in 360ms
Finished structural reductions in LTL mode , in 1 iterations and 711 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2024-05-29 02:06:54] [INFO ] Flatten gal took : 20 ms
[2024-05-29 02:06:54] [INFO ] Flatten gal took : 7 ms
[2024-05-29 02:06:54] [INFO ] Input system was already deterministic with 8 transitions.
RANDOM walk for 40023 steps (8 resets) in 871 ms. (45 steps per ms) remains 29/71 properties
BEST_FIRST walk for 4003 steps (8 resets) in 154 ms. (25 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4001 steps (8 resets) in 82 ms. (48 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 152 ms. (26 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 94 ms. (42 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 138 ms. (28 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 121 ms. (32 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 92 ms. (43 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 123 ms. (32 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 71 ms. (55 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4002 steps (8 resets) in 42 ms. (93 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 33 ms. (117 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 34 ms. (114 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 59 ms. (66 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 27 ms. (143 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 32 ms. (121 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4002 steps (8 resets) in 40 ms. (97 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 37 ms. (105 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 51 ms. (76 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 32 ms. (121 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 28 ms. (138 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4001 steps (8 resets) in 28 ms. (137 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4002 steps (8 resets) in 46 ms. (85 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 24 ms. (160 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 21 ms. (182 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4002 steps (8 resets) in 34 ms. (114 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4004 steps (8 resets) in 24 ms. (160 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 28 ms. (138 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 26 ms. (148 steps per ms) remains 29/29 properties
BEST_FIRST walk for 4003 steps (8 resets) in 17 ms. (222 steps per ms) remains 29/29 properties
[2024-05-29 02:06:55] [INFO ] Invariant cache hit.
Problem AtomicPropp8 is UNSAT
Problem AtomicPropp17 is UNSAT
Problem AtomicPropp0 is UNSAT
Problem AtomicPropp1 is UNSAT
Problem AtomicPropp4 is UNSAT
Problem AtomicPropp7 is UNSAT
Problem AtomicPropp9 is UNSAT
Problem AtomicPropp14 is UNSAT
Problem AtomicPropp18 is UNSAT
Problem AtomicPropp20 is UNSAT
Problem AtomicPropp23 is UNSAT
Problem AtomicPropp24 is UNSAT
Problem AtomicPropp30 is UNSAT
Problem AtomicPropp31 is UNSAT
Problem AtomicPropp32 is UNSAT
Problem AtomicPropp35 is UNSAT
Problem AtomicPropp39 is UNSAT
Problem AtomicPropp42 is UNSAT
Problem AtomicPropp46 is UNSAT
Problem AtomicPropp47 is UNSAT
Problem AtomicPropp48 is UNSAT
Problem AtomicPropp49 is UNSAT
Problem AtomicPropp52 is UNSAT
Problem AtomicPropp63 is UNSAT
Problem AtomicPropp65 is UNSAT
Problem AtomicPropp66 is UNSAT
Problem AtomicPropp69 is UNSAT
Problem AtomicPropp70 is UNSAT
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/9 variables, 4/4 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 2 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 4 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 28 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 28 solved, 1 unsolved in 78 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 29/29 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 28 solved, 1 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/1 variables, 0/0 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 1 (OVERLAPS) 5/6 variables, 1/1 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/6 variables, 0/1 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 3 (OVERLAPS) 3/9 variables, 3/4 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 5 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/17 variables, 1/14 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/17 variables, 0/14 constraints. Problems are: Problem set: 28 solved, 1 unsolved
At refinement iteration 8 (OVERLAPS) 0/17 variables, 0/14 constraints. Problems are: Problem set: 28 solved, 1 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 14 constraints, problems are : Problem set: 28 solved, 1 unsolved in 47 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 1/29 constraints, Known Traps: 0/0 constraints]
After SMT, in 163ms problems are : Problem set: 28 solved, 1 unsolved
Finished Parikh walk after 127 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=127 )
Parikh walk visited 1 properties in 14 ms.
Successfully simplified 28 atomic propositions for a total of 16 simplifications.
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2023-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2023-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-29 02:06:55] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-05-29 02:06:55] [INFO ] Flatten gal took : 6 ms
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 4 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 8 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 26 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 8/9 places, 7/8 transitions.
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 3 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 2 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 6 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 7/9 places, 7/8 transitions.
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 2 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 2 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 25 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 4/9 places, 5/8 transitions.
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 7/9 places, 7/8 transitions.
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 5 place count 5 transition count 6
Applied a total of 5 rules in 6 ms. Remains 5 /9 variables (removed 4) and now considering 6/8 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 5/9 places, 6/8 transitions.
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 6 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 7/9 places, 7/8 transitions.
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 2 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 2 place count 7 transition count 7
Iterating global reduction 1 with 1 rules applied. Total rules applied 3 place count 7 transition count 7
Applied a total of 3 rules in 1 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 7/9 places, 7/8 transitions.
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 7
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 3 place count 7 transition count 6
Reduce places removed 2 places and 0 transitions.
Graph (trivial) has 2 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Iterating post reduction 2 with 3 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 3 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 4 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 4/9 places, 5/8 transitions.
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 11 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 5 transitions.
RANDOM walk for 269 steps (0 resets) in 6 ms. (38 steps per ms) remains 0/1 properties
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 7/9 places, 7/8 transitions.
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 2 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Input system was already deterministic with 7 transitions.
RANDOM walk for 648 steps (0 resets) in 7 ms. (81 steps per ms) remains 0/1 properties
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2023-13 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 1 ms
[2024-05-29 02:06:56] [INFO ] Flatten gal took : 2 ms
[2024-05-29 02:06:56] [INFO ] Export to MCC of 8 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2024-05-29 02:06:56] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 8 transitions and 27 arcs took 6 ms.
Total runtime 3050 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running SmallOperatingSystem-PT-MT0064DC0016

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/414/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 9
TRANSITIONS: 8
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.000s, Sys 0.001s]


SAVING FILE /home/mcc/execution/414/model (.net / .def) ...
EXPORT TIME: [User 0.000s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 543
MODEL NAME: /home/mcc/execution/414/model
9 places, 8 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-08 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-09 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-07 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2024-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0064DC0016-CTLCardinality-2023-12 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1716948417937

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT0064DC0016"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is SmallOperatingSystem-PT-MT0064DC0016, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r377-smll-171683809900209"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT0064DC0016.tgz
mv SmallOperatingSystem-PT-MT0064DC0016 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;