Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r377-smll-171683809900185.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is SmallOperatingSystem-PT-MT0016DC0008, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r377-smll-171683809900185
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 456K
-rw-r--r-- 1 mcc users 7.7K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 68K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 38K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Apr 23 07:57 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 07:57 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Apr 23 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 12 14:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 89K Apr 12 14:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 12 14:12 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 100K Apr 12 14:12 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 23 07:57 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:57 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 13 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 8.2K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-00
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-01
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-02
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-03
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-04
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-05
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-06
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-07
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-08
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-09
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-10
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-11
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2023-12
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2023-13
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2023-14
FORMULA_NAME SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2023-15

=== Now, execution of the tool begins

BK_START 1716947965144

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SmallOperatingSystem-PT-MT0016DC0008
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-29 01:59:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2024-05-29 01:59:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-29 01:59:27] [INFO ] Load time of PNML (sax parser for PT used): 54 ms
[2024-05-29 01:59:27] [INFO ] Transformed 9 places.
[2024-05-29 01:59:27] [INFO ] Transformed 8 transitions.
[2024-05-29 01:59:27] [INFO ] Parsed PT model containing 9 places and 8 transitions and 27 arcs in 244 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 31 ms.
Initial state reduction rules removed 1 formulas.
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2023-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 9 out of 9 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 12 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
// Phase 1: matrix 8 rows 9 cols
[2024-05-29 01:59:27] [INFO ] Computed 4 invariants in 5 ms
[2024-05-29 01:59:27] [INFO ] Implicit Places using invariants in 206 ms returned []
[2024-05-29 01:59:27] [INFO ] Invariant cache hit.
[2024-05-29 01:59:27] [INFO ] Implicit Places using invariants and state equation in 59 ms returned []
Implicit Place search using SMT with State Equation took 332 ms to find 0 implicit places.
Running 7 sub problems to find dead transitions.
[2024-05-29 01:59:27] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (OVERLAPS) 0/17 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Real declared 17/17 variables, and 13 constraints, problems are : Problem set: 0 solved, 7 unsolved in 187 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 7 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 3/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/3 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 2 (OVERLAPS) 1/9 variables, 1/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/9 variables, 0/4 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 4 (OVERLAPS) 8/17 variables, 9/13 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/17 variables, 7/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
At refinement iteration 7 (OVERLAPS) 0/17 variables, 0/20 constraints. Problems are: Problem set: 0 solved, 7 unsolved
No progress, stopping.
After SMT solving in domain Int declared 17/17 variables, and 20 constraints, problems are : Problem set: 0 solved, 7 unsolved in 135 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 9/9 constraints, PredecessorRefiner: 7/7 constraints, Known Traps: 0/0 constraints]
After SMT, in 357ms problems are : Problem set: 0 solved, 7 unsolved
Search for dead transitions found 0 dead transitions in 373ms
Finished structural reductions in LTL mode , in 1 iterations and 747 ms. Remains : 9/9 places, 8/8 transitions.
Support contains 9 out of 9 places after structural reductions.
[2024-05-29 01:59:28] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-05-29 01:59:28] [INFO ] Flatten gal took : 22 ms
[2024-05-29 01:59:28] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-29 01:59:28] [INFO ] Flatten gal took : 6 ms
[2024-05-29 01:59:28] [INFO ] Input system was already deterministic with 8 transitions.
RANDOM walk for 40028 steps (8 resets) in 891 ms. (44 steps per ms) remains 15/52 properties
BEST_FIRST walk for 4004 steps (8 resets) in 173 ms. (23 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 158 ms. (25 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4001 steps (8 resets) in 159 ms. (25 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 100 ms. (39 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 155 ms. (25 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 131 ms. (30 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4001 steps (8 resets) in 82 ms. (48 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 48 ms. (81 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 136 ms. (29 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 135 ms. (29 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 170 ms. (23 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 112 ms. (35 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4004 steps (8 resets) in 121 ms. (32 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 118 ms. (33 steps per ms) remains 15/15 properties
BEST_FIRST walk for 4003 steps (8 resets) in 78 ms. (50 steps per ms) remains 15/15 properties
[2024-05-29 01:59:29] [INFO ] Invariant cache hit.
Problem AtomicPropp1 is UNSAT
Problem AtomicPropp2 is UNSAT
Problem AtomicPropp3 is UNSAT
Problem AtomicPropp7 is UNSAT
Problem AtomicPropp14 is UNSAT
Problem AtomicPropp21 is UNSAT
Problem AtomicPropp26 is UNSAT
Problem AtomicPropp32 is UNSAT
Problem AtomicPropp35 is UNSAT
Problem AtomicPropp41 is UNSAT
Problem AtomicPropp44 is UNSAT
Problem AtomicPropp47 is UNSAT
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/8 variables, 2/2 constraints. Problems are: Problem set: 12 solved, 3 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/8 variables, 0/2 constraints. Problems are: Problem set: 12 solved, 3 unsolved
Problem AtomicPropp5 is UNSAT
Problem AtomicPropp15 is UNSAT
Problem AtomicPropp48 is UNSAT
After SMT solving in domain Real declared 9/17 variables, and 4 constraints, problems are : Problem set: 15 solved, 0 unsolved in 56 ms.
Refiners :[Positive P Invariants (semi-flows): 4/4 constraints, State Equation: 0/9 constraints, PredecessorRefiner: 15/15 constraints, Known Traps: 0/0 constraints]
After SMT, in 70ms problems are : Problem set: 15 solved, 0 unsolved
Skipping Parikh replay, no witness traces provided.
Successfully simplified 15 atomic propositions for a total of 13 simplifications.
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2023-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-29 01:59:29] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 4 ms
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 3 ms
[2024-05-29 01:59:29] [INFO ] Input system was already deterministic with 8 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 10 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 8/9 places, 8/8 transitions.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 1 ms
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Applied a total of 0 rules in 0 ms. Remains 9 /9 variables (removed 0) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 9/9 places, 8/8 transitions.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Drop transitions (Trivial Post-Agglo cleanup.) removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 8 transition count 6
Reduce places removed 3 places and 0 transitions.
Graph (trivial) has 3 edges and 5 vertex of which 2 / 5 are part of one of the 1 SCC in 2 ms
Free SCC test removed 1 places
Iterating post reduction 1 with 4 rules applied. Total rules applied 6 place count 4 transition count 6
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 7 place count 4 transition count 5
Applied a total of 7 rules in 27 ms. Remains 4 /9 variables (removed 5) and now considering 5/8 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 4/9 places, 5/8 transitions.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 1 ms
[2024-05-29 01:59:29] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 4 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 7/9 places, 7/8 transitions.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 1 ms
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 1 ms
[2024-05-29 01:59:29] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 7 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 7 transition count 7
Applied a total of 2 rules in 2 ms. Remains 7 /9 variables (removed 2) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 7/9 places, 7/8 transitions.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 1 ms
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 8 transition count 7
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 8 transition count 7
Applied a total of 2 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 7/8 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 7/8 transitions.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 1 ms
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 1 ms
[2024-05-29 01:59:29] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 9/9 places, 8/8 transitions.
Ensure Unique test removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 8 transition count 8
Applied a total of 1 rules in 1 ms. Remains 8 /9 variables (removed 1) and now considering 8/8 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 8/9 places, 8/8 transitions.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 1 ms
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Input system was already deterministic with 8 transitions.
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 3 ms
[2024-05-29 01:59:29] [INFO ] Flatten gal took : 2 ms
[2024-05-29 01:59:29] [INFO ] Export to MCC of 9 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2024-05-29 01:59:29] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 9 places, 8 transitions and 27 arcs took 5 ms.
Total runtime 2828 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running SmallOperatingSystem-PT-MT0016DC0008

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/412/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 9
TRANSITIONS: 8
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.000s, Sys 0.001s]


SAVING FILE /home/mcc/execution/412/model (.net / .def) ...
EXPORT TIME: [User 0.000s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 538
MODEL NAME: /home/mcc/execution/412/model
9 places, 8 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-06 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-07 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2023-14 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2023-13 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-05 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SmallOperatingSystem-PT-MT0016DC0008-CTLCardinality-2024-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1716947970689

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT0016DC0008"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is SmallOperatingSystem-PT-MT0016DC0008, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r377-smll-171683809900185"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT0016DC0008.tgz
mv SmallOperatingSystem-PT-MT0016DC0008 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;