Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r377-smll-171683809700100.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is SieveSingleMsgMbox-PT-d2m04, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r377-smll-171683809700100
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 23 07:56 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:56 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.8K Apr 12 19:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 73K Apr 12 19:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Apr 12 19:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 103K Apr 12 19:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 6 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 1.1M May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-00
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-01
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-02
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-03
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-04
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-05
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-06
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-07
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-08
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-09
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-10
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-11
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-12
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-13
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-14
FORMULA_NAME SieveSingleMsgMbox-PT-d2m04-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1716912821010

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SieveSingleMsgMbox-PT-d2m04
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-28 16:13:43] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-28 16:13:43] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-28 16:13:44] [INFO ] Load time of PNML (sax parser for PT used): 537 ms
[2024-05-28 16:13:44] [INFO ] Transformed 2398 places.
[2024-05-28 16:13:44] [INFO ] Transformed 1954 transitions.
[2024-05-28 16:13:44] [INFO ] Parsed PT model containing 2398 places and 1954 transitions and 7816 arcs in 791 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 29 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 3 formulas.
Deduced a syphon composed of 1984 places in 35 ms
Reduce places removed 1984 places and 0 transitions.
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 24 out of 414 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 414/414 places, 1954/1954 transitions.
Reduce places removed 25 places and 0 transitions.
Ensure Unique test removed 828 transitions
Reduce isomorphic transitions removed 828 transitions.
Iterating post reduction 0 with 853 rules applied. Total rules applied 853 place count 389 transition count 1126
Discarding 103 places :
Symmetric choice reduction at 1 with 103 rule applications. Total rules 956 place count 286 transition count 604
Iterating global reduction 1 with 103 rules applied. Total rules applied 1059 place count 286 transition count 604
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 1 with 11 rules applied. Total rules applied 1070 place count 286 transition count 593
Discarding 77 places :
Symmetric choice reduction at 2 with 77 rule applications. Total rules 1147 place count 209 transition count 516
Iterating global reduction 2 with 77 rules applied. Total rules applied 1224 place count 209 transition count 516
Ensure Unique test removed 31 transitions
Reduce isomorphic transitions removed 31 transitions.
Iterating post reduction 2 with 31 rules applied. Total rules applied 1255 place count 209 transition count 485
Discarding 26 places :
Symmetric choice reduction at 3 with 26 rule applications. Total rules 1281 place count 183 transition count 454
Iterating global reduction 3 with 26 rules applied. Total rules applied 1307 place count 183 transition count 454
Ensure Unique test removed 52 transitions
Reduce isomorphic transitions removed 52 transitions.
Iterating post reduction 3 with 52 rules applied. Total rules applied 1359 place count 183 transition count 402
Discarding 6 places :
Symmetric choice reduction at 4 with 6 rule applications. Total rules 1365 place count 177 transition count 392
Iterating global reduction 4 with 6 rules applied. Total rules applied 1371 place count 177 transition count 392
Discarding 5 places :
Symmetric choice reduction at 4 with 5 rule applications. Total rules 1376 place count 172 transition count 387
Iterating global reduction 4 with 5 rules applied. Total rules applied 1381 place count 172 transition count 387
Discarding 2 places :
Symmetric choice reduction at 4 with 2 rule applications. Total rules 1383 place count 170 transition count 384
Iterating global reduction 4 with 2 rules applied. Total rules applied 1385 place count 170 transition count 384
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 1386 place count 169 transition count 383
Iterating global reduction 4 with 1 rules applied. Total rules applied 1387 place count 169 transition count 383
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 1388 place count 168 transition count 382
Iterating global reduction 4 with 1 rules applied. Total rules applied 1389 place count 168 transition count 382
Discarding 1 places :
Symmetric choice reduction at 4 with 1 rule applications. Total rules 1390 place count 167 transition count 381
Iterating global reduction 4 with 1 rules applied. Total rules applied 1391 place count 167 transition count 381
Applied a total of 1391 rules in 183 ms. Remains 167 /414 variables (removed 247) and now considering 381/1954 (removed 1573) transitions.
// Phase 1: matrix 381 rows 167 cols
[2024-05-28 16:13:44] [INFO ] Computed 5 invariants in 31 ms
[2024-05-28 16:13:45] [INFO ] Implicit Places using invariants in 525 ms returned []
[2024-05-28 16:13:45] [INFO ] Invariant cache hit.
[2024-05-28 16:13:45] [INFO ] State equation strengthened by 251 read => feed constraints.
[2024-05-28 16:13:46] [INFO ] Implicit Places using invariants and state equation in 1305 ms returned []
Implicit Place search using SMT with State Equation took 1878 ms to find 0 implicit places.
Running 380 sub problems to find dead transitions.
[2024-05-28 16:13:46] [INFO ] Invariant cache hit.
[2024-05-28 16:13:46] [INFO ] State equation strengthened by 251 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/166 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 380 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/166 variables, 3/4 constraints. Problems are: Problem set: 0 solved, 380 unsolved
[2024-05-28 16:13:53] [INFO ] Deduced a trap composed of 36 places in 118 ms of which 22 ms to minimize.
[2024-05-28 16:13:53] [INFO ] Deduced a trap composed of 20 places in 148 ms of which 5 ms to minimize.
[2024-05-28 16:13:53] [INFO ] Deduced a trap composed of 20 places in 113 ms of which 3 ms to minimize.
At refinement iteration 2 (INCLUDED_ONLY) 0/166 variables, 3/7 constraints. Problems are: Problem set: 0 solved, 380 unsolved
[2024-05-28 16:13:55] [INFO ] Deduced a trap composed of 20 places in 111 ms of which 3 ms to minimize.
At refinement iteration 3 (INCLUDED_ONLY) 0/166 variables, 1/8 constraints. Problems are: Problem set: 0 solved, 380 unsolved
[2024-05-28 16:14:00] [INFO ] Deduced a trap composed of 20 places in 125 ms of which 3 ms to minimize.
[2024-05-28 16:14:01] [INFO ] Deduced a trap composed of 20 places in 124 ms of which 3 ms to minimize.
At refinement iteration 4 (INCLUDED_ONLY) 0/166 variables, 2/10 constraints. Problems are: Problem set: 0 solved, 380 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/166 variables, 0/10 constraints. Problems are: Problem set: 0 solved, 380 unsolved
At refinement iteration 6 (OVERLAPS) 1/167 variables, 1/11 constraints. Problems are: Problem set: 0 solved, 380 unsolved
[2024-05-28 16:14:08] [INFO ] Deduced a trap composed of 20 places in 155 ms of which 4 ms to minimize.
[2024-05-28 16:14:09] [INFO ] Deduced a trap composed of 53 places in 128 ms of which 4 ms to minimize.
[2024-05-28 16:14:09] [INFO ] Deduced a trap composed of 53 places in 110 ms of which 5 ms to minimize.
[2024-05-28 16:14:09] [INFO ] Deduced a trap composed of 53 places in 111 ms of which 2 ms to minimize.
[2024-05-28 16:14:09] [INFO ] Deduced a trap composed of 53 places in 138 ms of which 3 ms to minimize.
[2024-05-28 16:14:09] [INFO ] Deduced a trap composed of 53 places in 129 ms of which 3 ms to minimize.
At refinement iteration 7 (INCLUDED_ONLY) 0/167 variables, 6/17 constraints. Problems are: Problem set: 0 solved, 380 unsolved
[2024-05-28 16:14:12] [INFO ] Deduced a trap composed of 53 places in 125 ms of which 3 ms to minimize.
[2024-05-28 16:14:12] [INFO ] Deduced a trap composed of 53 places in 138 ms of which 2 ms to minimize.
At refinement iteration 8 (INCLUDED_ONLY) 0/167 variables, 2/19 constraints. Problems are: Problem set: 0 solved, 380 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/167 variables, 0/19 constraints. Problems are: Problem set: 0 solved, 380 unsolved
At refinement iteration 10 (OVERLAPS) 381/548 variables, 167/186 constraints. Problems are: Problem set: 0 solved, 380 unsolved
SMT process timed out in 31600ms, After SMT, problems are : Problem set: 0 solved, 380 unsolved
Search for dead transitions found 0 dead transitions in 31641ms
Starting structural reductions in LTL mode, iteration 1 : 167/414 places, 381/1954 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33738 ms. Remains : 167/414 places, 381/1954 transitions.
Support contains 24 out of 167 places after structural reductions.
[2024-05-28 16:14:18] [INFO ] Flatten gal took : 125 ms
[2024-05-28 16:14:18] [INFO ] Flatten gal took : 61 ms
[2024-05-28 16:14:19] [INFO ] Input system was already deterministic with 381 transitions.
Support contains 23 out of 167 places (down from 24) after GAL structural reductions.
Reduction of identical properties reduced properties to check from 24 to 22
RANDOM walk for 40000 steps (8970 resets) in 2756 ms. (14 steps per ms) remains 20/22 properties
BEST_FIRST walk for 4002 steps (173 resets) in 36 ms. (108 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4001 steps (191 resets) in 53 ms. (74 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4001 steps (439 resets) in 55 ms. (71 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4001 steps (175 resets) in 47 ms. (83 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (175 resets) in 26 ms. (148 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (166 resets) in 17 ms. (222 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4002 steps (206 resets) in 17 ms. (222 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (203 resets) in 27 ms. (142 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (176 resets) in 23 ms. (166 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (181 resets) in 15 ms. (250 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (195 resets) in 14 ms. (266 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4004 steps (177 resets) in 24 ms. (160 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (175 resets) in 21 ms. (181 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4002 steps (181 resets) in 14 ms. (266 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (185 resets) in 16 ms. (235 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4003 steps (187 resets) in 27 ms. (142 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4002 steps (191 resets) in 22 ms. (174 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4002 steps (200 resets) in 21 ms. (181 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4002 steps (180 resets) in 23 ms. (166 steps per ms) remains 20/20 properties
BEST_FIRST walk for 4002 steps (140 resets) in 20 ms. (190 steps per ms) remains 20/20 properties
Probably explored full state space saw : 924 states, properties seen :1
Probabilistic random walk after 2134 steps, saw 924 distinct states, run finished after 65 ms. (steps per millisecond=32 ) properties seen :1
Explored full state space saw : 924 states, properties seen :0
Exhaustive walk after 2134 steps, saw 924 distinct states, run finished after 48 ms. (steps per millisecond=44 ) properties seen :0
Successfully simplified 21 atomic propositions for a total of 13 simplifications.
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-10 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Computed a total of 35 stabilizing places and 55 stable transitions
Graph (complete) has 706 edges and 167 vertex of which 166 are kept as prefixes of interest. Removing 1 places using SCC suffix rule.11 ms
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202405141337/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((F(p0)&&F(G(!p0)))))'
Support contains 0 out of 167 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in SI_LTL mode, iteration 0 : 167/167 places, 381/381 transitions.
Discarding 18 places :
Symmetric choice reduction at 0 with 18 rule applications. Total rules 18 place count 149 transition count 192
Iterating global reduction 0 with 18 rules applied. Total rules applied 36 place count 149 transition count 192
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 37 place count 149 transition count 191
Discarding 16 places :
Symmetric choice reduction at 1 with 16 rule applications. Total rules 53 place count 133 transition count 175
Iterating global reduction 1 with 16 rules applied. Total rules applied 69 place count 133 transition count 175
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 1 with 9 rules applied. Total rules applied 78 place count 133 transition count 166
Discarding 12 places :
Symmetric choice reduction at 2 with 12 rule applications. Total rules 90 place count 121 transition count 144
Iterating global reduction 2 with 12 rules applied. Total rules applied 102 place count 121 transition count 144
Ensure Unique test removed 10 transitions
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 2 with 10 rules applied. Total rules applied 112 place count 121 transition count 134
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 117 place count 116 transition count 129
Iterating global reduction 3 with 5 rules applied. Total rules applied 122 place count 116 transition count 129
Discarding 5 places :
Symmetric choice reduction at 3 with 5 rule applications. Total rules 127 place count 111 transition count 124
Iterating global reduction 3 with 5 rules applied. Total rules applied 132 place count 111 transition count 124
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 135 place count 108 transition count 121
Iterating global reduction 3 with 3 rules applied. Total rules applied 138 place count 108 transition count 121
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 140 place count 108 transition count 119
Discarding 3 places :
Symmetric choice reduction at 4 with 3 rule applications. Total rules 143 place count 105 transition count 116
Iterating global reduction 4 with 3 rules applied. Total rules applied 146 place count 105 transition count 116
Applied a total of 146 rules in 71 ms. Remains 105 /167 variables (removed 62) and now considering 116/381 (removed 265) transitions.
// Phase 1: matrix 116 rows 105 cols
[2024-05-28 16:14:20] [INFO ] Computed 5 invariants in 3 ms
[2024-05-28 16:14:20] [INFO ] Implicit Places using invariants in 137 ms returned []
[2024-05-28 16:14:20] [INFO ] Invariant cache hit.
[2024-05-28 16:14:20] [INFO ] State equation strengthened by 43 read => feed constraints.
[2024-05-28 16:14:20] [INFO ] Implicit Places using invariants and state equation in 322 ms returned []
Implicit Place search using SMT with State Equation took 466 ms to find 0 implicit places.
[2024-05-28 16:14:20] [INFO ] Redundant transitions in 5 ms returned []
Running 115 sub problems to find dead transitions.
[2024-05-28 16:14:20] [INFO ] Invariant cache hit.
[2024-05-28 16:14:20] [INFO ] State equation strengthened by 43 read => feed constraints.
At refinement iteration 0 (INCLUDED_ONLY) 0/104 variables, 1/1 constraints. Problems are: Problem set: 0 solved, 115 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/104 variables, 3/4 constraints. Problems are: Problem set: 0 solved, 115 unsolved
[2024-05-28 16:14:22] [INFO ] Deduced a trap composed of 14 places in 63 ms of which 1 ms to minimize.
At refinement iteration 2 (INCLUDED_ONLY) 0/104 variables, 1/5 constraints. Problems are: Problem set: 0 solved, 115 unsolved
[2024-05-28 16:14:22] [INFO ] Deduced a trap composed of 14 places in 48 ms of which 1 ms to minimize.
[2024-05-28 16:14:22] [INFO ] Deduced a trap composed of 15 places in 45 ms of which 1 ms to minimize.
[2024-05-28 16:14:22] [INFO ] Deduced a trap composed of 14 places in 44 ms of which 1 ms to minimize.
At refinement iteration 3 (INCLUDED_ONLY) 0/104 variables, 3/8 constraints. Problems are: Problem set: 0 solved, 115 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/104 variables, 0/8 constraints. Problems are: Problem set: 0 solved, 115 unsolved
At refinement iteration 5 (OVERLAPS) 1/105 variables, 1/9 constraints. Problems are: Problem set: 0 solved, 115 unsolved
[2024-05-28 16:14:24] [INFO ] Deduced a trap composed of 14 places in 51 ms of which 2 ms to minimize.
[2024-05-28 16:14:24] [INFO ] Deduced a trap composed of 31 places in 48 ms of which 1 ms to minimize.
[2024-05-28 16:14:24] [INFO ] Deduced a trap composed of 31 places in 47 ms of which 1 ms to minimize.
[2024-05-28 16:14:24] [INFO ] Deduced a trap composed of 32 places in 48 ms of which 2 ms to minimize.
At refinement iteration 6 (INCLUDED_ONLY) 0/105 variables, 4/13 constraints. Problems are: Problem set: 0 solved, 115 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/105 variables, 0/13 constraints. Problems are: Problem set: 0 solved, 115 unsolved
Problem TDEAD86 is UNSAT
Problem TDEAD87 is UNSAT
Problem TDEAD100 is UNSAT
Problem TDEAD104 is UNSAT
Problem TDEAD106 is UNSAT
Problem TDEAD109 is UNSAT
Problem TDEAD110 is UNSAT
Problem TDEAD112 is UNSAT
Problem TDEAD113 is UNSAT
Problem TDEAD114 is UNSAT
Problem TDEAD115 is UNSAT
At refinement iteration 8 (OVERLAPS) 116/221 variables, 105/118 constraints. Problems are: Problem set: 11 solved, 104 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/221 variables, 43/161 constraints. Problems are: Problem set: 11 solved, 104 unsolved
[2024-05-28 16:14:26] [INFO ] Deduced a trap composed of 31 places in 82 ms of which 3 ms to minimize.
At refinement iteration 10 (INCLUDED_ONLY) 0/221 variables, 1/162 constraints. Problems are: Problem set: 11 solved, 104 unsolved
[2024-05-28 16:14:27] [INFO ] Deduced a trap composed of 23 places in 60 ms of which 2 ms to minimize.
Problem TDEAD43 is UNSAT
Problem TDEAD47 is UNSAT
Problem TDEAD101 is UNSAT
At refinement iteration 11 (INCLUDED_ONLY) 0/221 variables, 1/163 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/221 variables, 0/163 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 13 (OVERLAPS) 0/221 variables, 0/163 constraints. Problems are: Problem set: 14 solved, 101 unsolved
No progress, stopping.
After SMT solving in domain Real declared 221/221 variables, and 163 constraints, problems are : Problem set: 14 solved, 101 unsolved in 11578 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, Generalized P Invariants (flows): 3/3 constraints, State Equation: 105/105 constraints, ReadFeed: 43/43 constraints, PredecessorRefiner: 115/115 constraints, Known Traps: 10/10 constraints]
Escalating to Integer solving :Problem set: 14 solved, 101 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/86 variables, 0/0 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 1 (OVERLAPS) 7/93 variables, 2/2 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 2 (INCLUDED_ONLY) 0/93 variables, 2/4 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/93 variables, 5/9 constraints. Problems are: Problem set: 14 solved, 101 unsolved
[2024-05-28 16:14:33] [INFO ] Deduced a trap composed of 29 places in 43 ms of which 1 ms to minimize.
At refinement iteration 4 (INCLUDED_ONLY) 0/93 variables, 1/10 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 5 (INCLUDED_ONLY) 0/93 variables, 0/10 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 6 (OVERLAPS) 7/100 variables, 1/11 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/100 variables, 4/15 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 8 (INCLUDED_ONLY) 0/100 variables, 0/15 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 9 (OVERLAPS) 115/215 variables, 100/115 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/215 variables, 42/157 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 11 (INCLUDED_ONLY) 0/215 variables, 14/171 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 12 (INCLUDED_ONLY) 0/215 variables, 0/171 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 13 (OVERLAPS) 6/221 variables, 5/176 constraints. Problems are: Problem set: 14 solved, 101 unsolved
At refinement iteration 14 (INCLUDED_ONLY) 0/221 variables, 1/177 constraints. Problems are: Problem set: 14 solved, 101 unsolved
Problem TDEAD107 is UNSAT
Problem TDEAD108 is UNSAT
Problem TDEAD111 is UNSAT
At refinement iteration 15 (INCLUDED_ONLY) 0/221 variables, 87/264 constraints. Problems are: Problem set: 17 solved, 98 unsolved
At refinement iteration 16 (INCLUDED_ONLY) 0/221 variables, 1/265 constraints. Problems are: Problem set: 17 solved, 98 unsolved
[2024-05-28 16:14:41] [INFO ] Deduced a trap composed of 40 places in 32 ms of which 1 ms to minimize.
[2024-05-28 16:14:41] [INFO ] Deduced a trap composed of 50 places in 61 ms of which 2 ms to minimize.
At refinement iteration 17 (INCLUDED_ONLY) 0/221 variables, 2/267 constraints. Problems are: Problem set: 17 solved, 98 unsolved
At refinement iteration 18 (INCLUDED_ONLY) 0/221 variables, 0/267 constraints. Problems are: Problem set: 17 solved, 98 unsolved
At refinement iteration 19 (OVERLAPS) 0/221 variables, 0/267 constraints. Problems are: Problem set: 17 solved, 98 unsolved
No progress, stopping.
After SMT solving in domain Int declared 221/221 variables, and 267 constraints, problems are : Problem set: 17 solved, 98 unsolved in 18874 ms.
Refiners :[Positive P Invariants (semi-flows): 2/2 constraints, Generalized P Invariants (flows): 3/3 constraints, State Equation: 105/105 constraints, ReadFeed: 43/43 constraints, PredecessorRefiner: 101/115 constraints, Known Traps: 13/13 constraints]
After SMT, in 30605ms problems are : Problem set: 17 solved, 98 unsolved
Search for dead transitions found 17 dead transitions in 30608ms
Found 17 dead transitions using SMT.
Drop transitions (Dead Transitions using SMT only with invariants) removed 17 transitions
Dead transitions reduction (with SMT) removed 17 transitions
Starting structural reductions in SI_LTL mode, iteration 1 : 105/167 places, 99/381 transitions.
Graph (complete) has 280 edges and 105 vertex of which 84 are kept as prefixes of interest. Removing 21 places using SCC suffix rule.2 ms
Discarding 21 places :
Also discarding 0 output transitions
Reduce places removed 7 places and 17 transitions.
Reduce places removed 14 places and 17 transitions.
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 17 place count 63 transition count 63
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 18 place count 62 transition count 62
Iterating global reduction 1 with 1 rules applied. Total rules applied 19 place count 62 transition count 62
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 20 place count 61 transition count 61
Iterating global reduction 1 with 1 rules applied. Total rules applied 21 place count 61 transition count 61
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 22 place count 60 transition count 60
Iterating global reduction 1 with 1 rules applied. Total rules applied 23 place count 60 transition count 60
Discarding 1 places :
Symmetric choice reduction at 1 with 1 rule applications. Total rules 24 place count 59 transition count 59
Iterating global reduction 1 with 1 rules applied. Total rules applied 25 place count 59 transition count 59
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 26 place count 59 transition count 58
Applied a total of 26 rules in 20 ms. Remains 59 /105 variables (removed 46) and now considering 58/99 (removed 41) transitions.
// Phase 1: matrix 58 rows 59 cols
[2024-05-28 16:14:51] [INFO ] Computed 3 invariants in 2 ms
[2024-05-28 16:14:51] [INFO ] Implicit Places using invariants in 73 ms returned []
[2024-05-28 16:14:51] [INFO ] Invariant cache hit.
[2024-05-28 16:14:51] [INFO ] State equation strengthened by 20 read => feed constraints.
[2024-05-28 16:14:51] [INFO ] Implicit Places using invariants and state equation in 116 ms returned []
Implicit Place search using SMT with State Equation took 191 ms to find 0 implicit places.
Starting structural reductions in SI_LTL mode, iteration 2 : 59/167 places, 58/381 transitions.
Finished structural reductions in SI_LTL mode , in 2 iterations and 31371 ms. Remains : 59/167 places, 58/381 transitions.
Stuttering acceptance computed with spot in 39 ms :[true]
Running random walk in product with property : SieveSingleMsgMbox-PT-d2m04-LTLFireability-01
Entered a terminal (fully accepting) state of product in 0 steps with 0 reset in 2 ms.
FORMULA SieveSingleMsgMbox-PT-d2m04-LTLFireability-01 FALSE TECHNIQUES STUTTER_TEST
Treatment of property SieveSingleMsgMbox-PT-d2m04-LTLFireability-01 finished in 31486 ms.
All properties solved by simple procedures.
Total runtime 68417 ms.
ITS solved all properties within timeout

BK_STOP 1716912891924

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SieveSingleMsgMbox-PT-d2m04"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is SieveSingleMsgMbox-PT-d2m04, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r377-smll-171683809700100"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SieveSingleMsgMbox-PT-d2m04.tgz
mv SieveSingleMsgMbox-PT-d2m04 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;