About the Execution of LoLA for ShieldRVt-PT-040B
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16206.563 | 964160.00 | 2207684.00 | 3461.10 | ????????T??????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r357-tall-171683764701018.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ShieldRVt-PT-040B, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r357-tall-171683764701018
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 912K
-rw-r--r-- 1 mcc users 8.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 94K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 19 07:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 19 19:17 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.6K Apr 11 21:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 72K Apr 11 21:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Apr 11 21:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Apr 11 21:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 489K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-00
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-01
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-02
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-03
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-04
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-05
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-06
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-07
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-08
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-09
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-10
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2024-11
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2023-12
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2023-13
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2023-14
FORMULA_NAME ShieldRVt-PT-040B-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717205018085
FORMULA ShieldRVt-PT-040B-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717205982245
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 78 (type EXCL) for 31 ShieldRVt-PT-040B-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 122 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 76 (type FNDP) for 31 ShieldRVt-PT-040B-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 77 (type EQUN) for 31 ShieldRVt-PT-040B-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 78 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 76 (type FNDP) for ShieldRVt-PT-040B-CTLFireability-2024-09 (obsolete)
[[35mlola[0m][W] CANCELED task # 77 (type EQUN) for ShieldRVt-PT-040B-CTLFireability-2024-09 (obsolete)
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 ShieldRVt-PT-040B-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 161 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 56
[[35mlola[0m][I] fired transitions : 74
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 65 (type EXCL) for 64 ShieldRVt-PT-040B-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 169 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 76 (type FNDP) for ShieldRVt-PT-040B-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 77 (type EQUN) for ShieldRVt-PT-040B-CTLFireability-2024-09
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 4/209 5/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 991711 m, 198342 m/sec, 1693336 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 49 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 9/209 12/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 2369748 m, 275607 m/sec, 3960543 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 54 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 14/209 19/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 3850132 m, 296076 m/sec, 6159424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 59 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 19/209 26/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 5262800 m, 282533 m/sec, 8175920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 64 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 24/209 31/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 6231004 m, 193640 m/sec, 11192958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 69 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 29/209 34/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 6785292 m, 110857 m/sec, 14311863 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 74 secs. Pages in use: 34
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 34/209 37/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 7345953 m, 112132 m/sec, 17712567 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 79 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 39/209 40/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 7783591 m, 87527 m/sec, 20768271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 84 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 44/209 43/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 8267579 m, 96797 m/sec, 24212310 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 89 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 49/209 45/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 8746977 m, 95879 m/sec, 27192397 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 94 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 54/209 47/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 9051938 m, 60992 m/sec, 30478641 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 99 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 59/209 51/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 9669806 m, 123573 m/sec, 33531800 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 104 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 64/209 52/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 9878450 m, 41728 m/sec, 36632012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 109 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 69/209 55/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 10494662 m, 123242 m/sec, 39865940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 114 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 74/209 57/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 10773900 m, 55847 m/sec, 42795844 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 119 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 79/209 60/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 11305453 m, 106310 m/sec, 46112686 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 124 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 84/209 63/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 11765089 m, 91927 m/sec, 49162252 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 129 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 89/209 65/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 12200824 m, 87147 m/sec, 52545827 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 134 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 94/209 68/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 12724731 m, 104781 m/sec, 55465786 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 139 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 99/209 69/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 12958062 m, 46666 m/sec, 58598609 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 144 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 104/209 73/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 13580452 m, 124478 m/sec, 61631792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 149 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 109/209 74/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 13754756 m, 34860 m/sec, 64483526 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 154 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 114/209 76/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 14125655 m, 74179 m/sec, 67870761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 159 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 119/209 79/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 14661675 m, 107204 m/sec, 70602060 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 164 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 124/209 80/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 14746530 m, 16971 m/sec, 73417049 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 169 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 129/209 84/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 15425154 m, 135724 m/sec, 76714856 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 174 secs. Pages in use: 84
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 134/209 86/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 15742478 m, 63464 m/sec, 79694504 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 179 secs. Pages in use: 86
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 139/209 89/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 16268910 m, 105286 m/sec, 82974333 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 184 secs. Pages in use: 89
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 144/209 91/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 16700341 m, 86286 m/sec, 85820926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 189 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 149/209 93/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 17010274 m, 61986 m/sec, 88979589 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 194 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 154/209 97/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 17666173 m, 131179 m/sec, 91948105 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 199 secs. Pages in use: 97
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 159/209 98/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 17936844 m, 54134 m/sec, 95193671 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 204 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 164/209 102/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 18552518 m, 123134 m/sec, 98247293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 209 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 169/209 103/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 18727360 m, 34968 m/sec, 101150049 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 214 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 174/209 106/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 19275896 m, 109707 m/sec, 104478718 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 219 secs. Pages in use: 106
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 179/209 108/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 19715140 m, 87848 m/sec, 107304842 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 224 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 184/209 110/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 19968471 m, 50666 m/sec, 110390179 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 229 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 189/209 113/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 20554000 m, 117105 m/sec, 113291050 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 234 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 194/209 114/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 20740403 m, 37280 m/sec, 116138773 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 239 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 199/209 117/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 21224169 m, 96753 m/sec, 119447775 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 244 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 204/209 120/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 21694234 m, 94013 m/sec, 122271951 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 249 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 65 CTL EXCL 209/209 121/2000 ShieldRVt-PT-040B-CTLFireability-2023-12 21900962 m, 41345 m/sec, 125347447 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 254 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 65 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2023-12 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 259 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 70 ShieldRVt-PT-040B-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 208 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 65 (type EXCL) for 64 ShieldRVt-PT-040B-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 3341 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] CANCELED task # 65 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2023-12 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 5/208 2/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 129501 m, 25900 m/sec, 887954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 264 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 10/208 3/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 244644 m, 23028 m/sec, 1790112 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 269 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 15/208 4/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 360471 m, 23165 m/sec, 2685722 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 274 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 20/208 5/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 471007 m, 22107 m/sec, 3583500 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 279 secs. Pages in use: 137
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 25/208 6/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 572616 m, 20321 m/sec, 4484480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 284 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 30/208 6/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 674842 m, 20445 m/sec, 5383407 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 289 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 35/208 7/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 786353 m, 22302 m/sec, 6270053 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 294 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 40/208 7/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 887057 m, 20140 m/sec, 7162914 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 299 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 45/208 8/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 986142 m, 19817 m/sec, 8054142 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 304 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 50/208 8/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 1100919 m, 22955 m/sec, 8944696 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 309 secs. Pages in use: 153
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 55/208 9/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 1203968 m, 20609 m/sec, 9840696 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 314 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 60/208 9/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 1304657 m, 20137 m/sec, 10736909 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 319 secs. Pages in use: 158
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 65/208 10/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 1420356 m, 23139 m/sec, 11626333 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 324 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 70/208 10/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 1525978 m, 21124 m/sec, 12514259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 329 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 75/208 11/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 1624579 m, 19720 m/sec, 13391831 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 334 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 80/208 11/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 1726515 m, 20387 m/sec, 14274970 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 339 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 85/208 12/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 1823614 m, 19419 m/sec, 15163315 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 344 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 90/208 12/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 1913252 m, 17927 m/sec, 16055884 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 349 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 95/208 13/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2002046 m, 17758 m/sec, 16945046 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 354 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 100/208 13/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2102671 m, 20125 m/sec, 17839578 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 359 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 105/208 13/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2199152 m, 19296 m/sec, 18747497 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 364 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 110/208 14/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2289378 m, 18045 m/sec, 19638541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 369 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 115/208 14/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2385888 m, 19302 m/sec, 20537587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 374 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 120/208 15/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2486476 m, 20117 m/sec, 21449593 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 379 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 125/208 15/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2578369 m, 18378 m/sec, 22363549 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 384 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 130/208 16/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2669060 m, 18138 m/sec, 23265918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 389 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 135/208 16/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2779110 m, 22010 m/sec, 24148879 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 394 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 140/208 17/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2883942 m, 20966 m/sec, 25031034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 399 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 145/208 17/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 2982634 m, 19738 m/sec, 25909363 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 404 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 150/208 17/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 3085106 m, 20494 m/sec, 26797687 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 409 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 155/208 18/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 3183169 m, 19612 m/sec, 27695650 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 414 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 160/208 18/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 3272446 m, 17855 m/sec, 28584223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 419 secs. Pages in use: 209
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 165/208 19/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 3362318 m, 17974 m/sec, 29485891 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 424 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 170/208 19/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 3463189 m, 20174 m/sec, 30383890 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 429 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 175/208 20/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 3558792 m, 19120 m/sec, 31282993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 434 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 180/208 20/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 3649677 m, 18177 m/sec, 32179761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 439 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 185/208 21/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 3746718 m, 19408 m/sec, 33077396 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 444 secs. Pages in use: 241
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 190/208 21/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 3845754 m, 19807 m/sec, 33978474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 449 secs. Pages in use: 246
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 195/208 21/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 3936502 m, 18149 m/sec, 34881470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 454 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 200/208 22/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 4026600 m, 18019 m/sec, 35779888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 459 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 71 CTL EXCL 205/208 22/2000 ShieldRVt-PT-040B-CTLFireability-2023-14 4141643 m, 23008 m/sec, 36680618 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 464 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 71 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2023-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 469 secs. Pages in use: 268
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL) for 67 ShieldRVt-PT-040B-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 208 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 71 (type EXCL) for 70 ShieldRVt-PT-040B-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 3131 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 5/208 3/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 203075 m, 40615 m/sec, 875850 t fired, .
[[35mlola[0m][.] 71 CTL EXCL 5/3131 2/5 ShieldRVt-PT-040B-CTLFireability-2023-14 103564 m, -807615 m/sec, 705780 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 474 secs. Pages in use: 278
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 10/208 4/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 376489 m, 34682 m/sec, 1685979 t fired, .
[[35mlola[0m][.] 71 CTL EXCL 10/195 3/5 ShieldRVt-PT-040B-CTLFireability-2023-14 215221 m, 22331 m/sec, 1573466 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 479 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 15/208 5/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 534915 m, 31685 m/sec, 2570812 t fired, .
[[35mlola[0m][.] 71 CTL EXCL 15/195 4/5 ShieldRVt-PT-040B-CTLFireability-2023-14 325315 m, 22018 m/sec, 2444907 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 484 secs. Pages in use: 291
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 20/208 6/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 696142 m, 32245 m/sec, 3454165 t fired, .
[[35mlola[0m][.] 71 CTL EXCL 20/195 5/5 ShieldRVt-PT-040B-CTLFireability-2023-14 437294 m, 22395 m/sec, 3311065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 489 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 25/208 7/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 855211 m, 31813 m/sec, 4325159 t fired, .
[[35mlola[0m][.] 71 CTL EXCL 25/195 5/5 ShieldRVt-PT-040B-CTLFireability-2023-14 536983 m, 19937 m/sec, 4188411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 494 secs. Pages in use: 304
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 71 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2023-14 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 30/208 8/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 1010328 m, 31023 m/sec, 5204201 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 499 secs. Pages in use: 305
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 35/208 9/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 1178884 m, 33711 m/sec, 6075700 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 504 secs. Pages in use: 310
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 40/208 9/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 1325097 m, 29242 m/sec, 6957713 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 509 secs. Pages in use: 314
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 45/208 10/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 1498237 m, 34628 m/sec, 7783451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 514 secs. Pages in use: 320
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 50/208 11/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 1635688 m, 27490 m/sec, 8604915 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 519 secs. Pages in use: 325
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 55/208 12/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 1777965 m, 28455 m/sec, 9435004 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 524 secs. Pages in use: 331
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 60/208 12/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 1904955 m, 25398 m/sec, 10282848 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 529 secs. Pages in use: 335
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 65/208 13/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 2031951 m, 25399 m/sec, 11129011 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 534 secs. Pages in use: 340
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 70/208 13/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 2169408 m, 27491 m/sec, 11962405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 539 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 75/208 14/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 2291052 m, 24328 m/sec, 12805442 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 544 secs. Pages in use: 350
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 80/208 14/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 2427388 m, 27267 m/sec, 13647645 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 549 secs. Pages in use: 353
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 85/208 15/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 2554211 m, 25364 m/sec, 14490647 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 554 secs. Pages in use: 358
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 90/208 16/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 2676575 m, 24472 m/sec, 15336059 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 559 secs. Pages in use: 363
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 95/208 16/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 2838568 m, 32398 m/sec, 16141879 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 564 secs. Pages in use: 366
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 100/208 17/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 2977448 m, 27776 m/sec, 16956514 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 569 secs. Pages in use: 371
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 105/208 18/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 3118631 m, 28236 m/sec, 17778639 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 574 secs. Pages in use: 376
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 110/208 18/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 3245357 m, 25345 m/sec, 18623165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 579 secs. Pages in use: 379
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 115/208 19/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 3367068 m, 24342 m/sec, 19464245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 584 secs. Pages in use: 384
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 120/208 19/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 3508428 m, 28272 m/sec, 20293432 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 589 secs. Pages in use: 387
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 125/208 20/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 3630119 m, 24338 m/sec, 21128411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 594 secs. Pages in use: 392
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 130/208 21/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 3762882 m, 26552 m/sec, 21962619 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 599 secs. Pages in use: 397
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 135/208 21/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 3892603 m, 25944 m/sec, 22796576 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 604 secs. Pages in use: 399
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 140/208 22/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 4012090 m, 23897 m/sec, 23636233 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 609 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 145/208 23/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 4172870 m, 32156 m/sec, 24453749 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 614 secs. Pages in use: 408
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 150/208 23/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 4320981 m, 29622 m/sec, 25299607 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 619 secs. Pages in use: 411
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 155/208 24/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 4470418 m, 29887 m/sec, 26167203 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 624 secs. Pages in use: 416
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 160/208 25/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 4601792 m, 26274 m/sec, 27043334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 629 secs. Pages in use: 420
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 165/208 26/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 4728620 m, 25365 m/sec, 27914433 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 634 secs. Pages in use: 425
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 170/208 26/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 4874860 m, 29248 m/sec, 28777650 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 639 secs. Pages in use: 427
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 175/208 27/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 5000583 m, 25144 m/sec, 29647767 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 644 secs. Pages in use: 431
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 180/208 28/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 5139383 m, 27760 m/sec, 30508449 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 649 secs. Pages in use: 436
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 185/208 28/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 5260144 m, 24152 m/sec, 31299556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 654 secs. Pages in use: 438
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 190/208 29/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 5372915 m, 22554 m/sec, 32087007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 659 secs. Pages in use: 443
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 195/208 29/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 5512793 m, 27975 m/sec, 32902834 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 664 secs. Pages in use: 445
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 200/208 30/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 5636158 m, 24673 m/sec, 33729398 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 669 secs. Pages in use: 449
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 205/208 30/2000 ShieldRVt-PT-040B-CTLFireability-2023-13 5749306 m, 22629 m/sec, 34508728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 674 secs. Pages in use: 452
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 68 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2023-13 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 679 secs. Pages in use: 455
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 62 (type EXCL) for 61 ShieldRVt-PT-040B-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 208 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 68 (type EXCL) for 67 ShieldRVt-PT-040B-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 2921 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 62 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 609
[[35mlola[0m][I] fired transitions : 610
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 5/208 3/5 ShieldRVt-PT-040B-CTLFireability-2023-13 201864 m, -1109488 m/sec, 869456 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 684 secs. Pages in use: 461
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 10/208 4/5 ShieldRVt-PT-040B-CTLFireability-2023-13 385311 m, 36689 m/sec, 1729357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 689 secs. Pages in use: 465
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 68 CTL EXCL 15/208 5/5 ShieldRVt-PT-040B-CTLFireability-2023-13 525467 m, 28031 m/sec, 2514395 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 694 secs. Pages in use: 469
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 68 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2023-13 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 2 0 0 10 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 699 secs. Pages in use: 470
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 58 ShieldRVt-PT-040B-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 223 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 59 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 294
[[35mlola[0m][I] fired transitions : 589
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 31 ShieldRVt-PT-040B-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 241 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for ShieldRVt-PT-040B-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 653
[[35mlola[0m][I] fired transitions : 653
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 31 ShieldRVt-PT-040B-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 263 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 5/263 3/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 163050 m, 32610 m/sec, 822876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 704 secs. Pages in use: 472
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 10/263 4/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 284707 m, 24331 m/sec, 1554807 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 709 secs. Pages in use: 476
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 15/263 5/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 438308 m, 30720 m/sec, 2447357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 714 secs. Pages in use: 480
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 20/263 6/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 572604 m, 26859 m/sec, 3345443 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 719 secs. Pages in use: 484
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 25/263 6/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 713158 m, 28110 m/sec, 4251001 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 724 secs. Pages in use: 486
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 30/263 7/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 850109 m, 27390 m/sec, 5139102 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 729 secs. Pages in use: 490
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 35/263 8/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 975072 m, 24992 m/sec, 6014305 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 734 secs. Pages in use: 493
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 40/263 8/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 1126776 m, 30340 m/sec, 6904975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 739 secs. Pages in use: 496
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 45/263 9/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 1258802 m, 26405 m/sec, 7803420 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 744 secs. Pages in use: 499
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 50/263 10/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 1403460 m, 28931 m/sec, 8692932 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 749 secs. Pages in use: 503
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 55/263 10/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 1540052 m, 27318 m/sec, 9581496 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 754 secs. Pages in use: 505
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 60/263 11/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 1661706 m, 24330 m/sec, 10433295 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 759 secs. Pages in use: 509
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 65/263 12/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 1794094 m, 26477 m/sec, 11325069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 764 secs. Pages in use: 512
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 70/263 12/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 1910689 m, 23319 m/sec, 12228556 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 769 secs. Pages in use: 514
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 75/263 13/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 2027208 m, 23303 m/sec, 13132617 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 774 secs. Pages in use: 518
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 80/263 13/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 2153471 m, 25252 m/sec, 14011040 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 779 secs. Pages in use: 520
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 85/263 14/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 2267992 m, 22904 m/sec, 14911783 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 784 secs. Pages in use: 523
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 90/263 14/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 2387102 m, 23822 m/sec, 15793223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 789 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 95/263 15/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 2510503 m, 24680 m/sec, 16679492 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 794 secs. Pages in use: 527
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 100/263 15/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 2619334 m, 21766 m/sec, 17539602 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 799 secs. Pages in use: 530
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 105/263 16/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 2742227 m, 24578 m/sec, 18387709 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 804 secs. Pages in use: 533
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 110/263 17/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 2874596 m, 26473 m/sec, 19221974 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 809 secs. Pages in use: 536
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 115/263 17/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 2994085 m, 23897 m/sec, 20058753 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 814 secs. Pages in use: 538
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 120/263 18/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 3119560 m, 25095 m/sec, 20904969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 819 secs. Pages in use: 540
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 125/263 18/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 3232511 m, 22590 m/sec, 21761994 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 824 secs. Pages in use: 542
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 130/263 19/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 3340569 m, 21611 m/sec, 22621292 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 829 secs. Pages in use: 544
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 135/263 19/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 3461886 m, 24263 m/sec, 23476727 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 834 secs. Pages in use: 546
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 140/263 20/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 3573502 m, 22323 m/sec, 24330539 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 839 secs. Pages in use: 547
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 145/263 20/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 3681538 m, 21607 m/sec, 25186394 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 844 secs. Pages in use: 548
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 150/263 21/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 3805484 m, 24789 m/sec, 26039728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 849 secs. Pages in use: 550
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 155/263 21/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 3916865 m, 22276 m/sec, 26895910 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 854 secs. Pages in use: 551
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 160/263 22/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 4025187 m, 21664 m/sec, 27753357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 859 secs. Pages in use: 554
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 165/263 23/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 4168362 m, 28635 m/sec, 28600881 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 864 secs. Pages in use: 555
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 170/263 23/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 4297134 m, 25754 m/sec, 29460517 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 869 secs. Pages in use: 556
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 175/263 24/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 4425515 m, 25676 m/sec, 30324511 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 874 secs. Pages in use: 558
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 180/263 25/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 4549220 m, 24741 m/sec, 31209573 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 879 secs. Pages in use: 560
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 185/263 25/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 4660552 m, 22266 m/sec, 32090182 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 884 secs. Pages in use: 561
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 190/263 26/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 4779877 m, 23865 m/sec, 32969679 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 889 secs. Pages in use: 563
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 195/263 26/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 4900076 m, 24039 m/sec, 33852541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 894 secs. Pages in use: 564
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 200/263 27/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 5011764 m, 22337 m/sec, 34740486 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 899 secs. Pages in use: 566
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 205/263 28/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 5136291 m, 24905 m/sec, 35624543 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 904 secs. Pages in use: 568
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 210/263 28/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 5255681 m, 23878 m/sec, 36519903 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 909 secs. Pages in use: 568
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 215/263 29/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 5367282 m, 22320 m/sec, 37415414 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 914 secs. Pages in use: 571
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 220/263 29/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 5497128 m, 25969 m/sec, 38298112 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 919 secs. Pages in use: 571
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 225/263 30/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 5613268 m, 23228 m/sec, 39181880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 924 secs. Pages in use: 574
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 230/263 30/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 5724628 m, 22272 m/sec, 40066845 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 929 secs. Pages in use: 575
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 235/263 31/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 5839712 m, 23016 m/sec, 40956194 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 934 secs. Pages in use: 577
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 240/263 31/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 5944065 m, 20870 m/sec, 41846397 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 939 secs. Pages in use: 578
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 245/263 32/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 6039833 m, 19153 m/sec, 42698178 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 944 secs. Pages in use: 580
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 250/263 32/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 6146707 m, 21374 m/sec, 43565387 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 949 secs. Pages in use: 581
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 255/263 33/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 6248608 m, 20380 m/sec, 44413714 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 954 secs. Pages in use: 583
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-040B-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-040B-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-07: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2024-09: CONJ 0 0 1 0 11 0 0 10
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-12: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-13: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-14: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-040B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 34 CTL EXCL 260/263 33/2000 ShieldRVt-PT-040B-CTLFireability-2024-09 6312772 m, 12832 m/sec, 44995146 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 959 secs. Pages in use: 584
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 403 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-040B"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ShieldRVt-PT-040B, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r357-tall-171683764701018"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-040B.tgz
mv ShieldRVt-PT-040B execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;