About the Execution of LoLA for ShieldRVt-PT-005B
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 1075012.00 | 0.00 | 0.00 | ?FF???TFFF?FF?F? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r357-tall-171683764600956.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ShieldRVt-PT-005B, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r357-tall-171683764600956
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 6.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K May 19 07:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K May 19 16:39 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 19 07:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 19 19:16 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.7K Apr 11 21:13 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 63K Apr 11 21:13 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.1K Apr 11 21:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 81K Apr 11 21:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:55 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:55 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 60K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-00
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-01
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-02
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-03
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-04
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-05
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-06
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-07
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-08
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-09
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-10
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-11
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-12
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-13
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-14
FORMULA_NAME ShieldRVt-PT-005B-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717199333161
FORMULA ShieldRVt-PT-005B-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005B-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005B-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005B-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005B-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005B-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005B-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005B-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-005B-LTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717200408173
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 21 (type CNST) for 18 ShieldRVt-PT-005B-LTLFireability-02
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 21 (type CNST) for ShieldRVt-PT-005B-LTLFireability-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 65 (type CNST) for 62 ShieldRVt-PT-005B-LTLFireability-14
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 65 (type CNST) for ShieldRVt-PT-005B-LTLFireability-14
[[35mlola[0m][I] result : false
[*** LOG ERROR #0001 ***] [2024-05-31 23:48:53] [status_logger] string pointer is null
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 7 ShieldRVt-PT-005B-LTLFireability-01
[[35mlola[0m][I] time limit : 200 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 73 (type FNDP) for 7 ShieldRVt-PT-005B-LTLFireability-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 74 (type EQUN) for 7 ShieldRVt-PT-005B-LTLFireability-01
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 80 (type EQUN) for 50 ShieldRVt-PT-005B-LTLFireability-10
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 939
[[35mlola[0m][I] fired transitions : 1247
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 73 (type FNDP) for ShieldRVt-PT-005B-LTLFireability-01 (obsolete)
[[35mlola[0m][W] CANCELED task # 74 (type EQUN) for ShieldRVt-PT-005B-LTLFireability-01 (obsolete)
[[35mlola[0m][I] LAUNCH task # 57 (type EXCL) for 56 ShieldRVt-PT-005B-LTLFireability-12
[[35mlola[0m][I] time limit : 240 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 57 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 95
[[35mlola[0m][I] fired transitions : 96
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 ShieldRVt-PT-005B-LTLFireability-11
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 153
[[35mlola[0m][I] fired transitions : 153
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 43 ShieldRVt-PT-005B-LTLFireability-09
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 94
[[35mlola[0m][I] fired transitions : 94
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 ShieldRVt-PT-005B-LTLFireability-08
[[35mlola[0m][I] time limit : 327 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 94
[[35mlola[0m][I] fired transitions : 94
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 ShieldRVt-PT-005B-LTLFireability-07
[[35mlola[0m][I] time limit : 360 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 118
[[35mlola[0m][I] fired transitions : 118
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 ShieldRVt-PT-005B-LTLFireability-06
[[35mlola[0m][I] time limit : 400 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 ShieldRVt-PT-005B-LTLFireability-05
[[35mlola[0m][I] time limit : 450 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 73 (type FNDP) for ShieldRVt-PT-005B-LTLFireability-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] FINISHED task # 74 (type EQUN) for ShieldRVt-PT-005B-LTLFireability-01
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 80 (type EQUN) for ShieldRVt-PT-005B-LTLFireability-10
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 5/450 6/2000 ShieldRVt-PT-005B-LTLFireability-05 740502 m, 148100 m/sec, 3797643 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 10/450 11/2000 ShieldRVt-PT-005B-LTLFireability-05 1437505 m, 139400 m/sec, 7795942 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 15/450 16/2000 ShieldRVt-PT-005B-LTLFireability-05 2158443 m, 144187 m/sec, 11870778 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 20/450 22/2000 ShieldRVt-PT-005B-LTLFireability-05 2874952 m, 143301 m/sec, 15864710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 25/450 26/2000 ShieldRVt-PT-005B-LTLFireability-05 3511300 m, 127269 m/sec, 19898142 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 30/450 31/2000 ShieldRVt-PT-005B-LTLFireability-05 4153914 m, 128522 m/sec, 24001059 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 35/450 36/2000 ShieldRVt-PT-005B-LTLFireability-05 4853263 m, 139869 m/sec, 28105003 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 40/450 41/2000 ShieldRVt-PT-005B-LTLFireability-05 5503797 m, 130106 m/sec, 32120100 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 45/450 46/2000 ShieldRVt-PT-005B-LTLFireability-05 6150781 m, 129396 m/sec, 36225672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 50/450 51/2000 ShieldRVt-PT-005B-LTLFireability-05 6827305 m, 135304 m/sec, 40410170 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 55/450 55/2000 ShieldRVt-PT-005B-LTLFireability-05 7506851 m, 135909 m/sec, 44329435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 60/450 60/2000 ShieldRVt-PT-005B-LTLFireability-05 8129320 m, 124493 m/sec, 48312925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 65/450 65/2000 ShieldRVt-PT-005B-LTLFireability-05 8763243 m, 126784 m/sec, 52368967 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 70/450 70/2000 ShieldRVt-PT-005B-LTLFireability-05 9423435 m, 132038 m/sec, 56418159 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 75/450 74/2000 ShieldRVt-PT-005B-LTLFireability-05 10008596 m, 117032 m/sec, 60425012 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 80/450 78/2000 ShieldRVt-PT-005B-LTLFireability-05 10586090 m, 115498 m/sec, 64492453 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 85/450 82/2000 ShieldRVt-PT-005B-LTLFireability-05 11171978 m, 117177 m/sec, 68634839 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 90/450 87/2000 ShieldRVt-PT-005B-LTLFireability-05 11816945 m, 128993 m/sec, 72706322 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 95/450 91/2000 ShieldRVt-PT-005B-LTLFireability-05 12396805 m, 115972 m/sec, 76763410 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 100/450 96/2000 ShieldRVt-PT-005B-LTLFireability-05 12986657 m, 117970 m/sec, 80869733 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 105/450 100/2000 ShieldRVt-PT-005B-LTLFireability-05 13588596 m, 120387 m/sec, 85060176 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 100
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 110/450 105/2000 ShieldRVt-PT-005B-LTLFireability-05 14274322 m, 137145 m/sec, 88985322 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 115/450 110/2000 ShieldRVt-PT-005B-LTLFireability-05 14895920 m, 124319 m/sec, 92946136 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 120/450 114/2000 ShieldRVt-PT-005B-LTLFireability-05 15527431 m, 126302 m/sec, 96974181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 125/450 119/2000 ShieldRVt-PT-005B-LTLFireability-05 16184980 m, 131509 m/sec, 101014704 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 130/450 123/2000 ShieldRVt-PT-005B-LTLFireability-05 16771213 m, 117246 m/sec, 104993733 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 135/450 128/2000 ShieldRVt-PT-005B-LTLFireability-05 17343626 m, 114482 m/sec, 109028585 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 140/450 132/2000 ShieldRVt-PT-005B-LTLFireability-05 17925480 m, 116370 m/sec, 113125574 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 145/450 136/2000 ShieldRVt-PT-005B-LTLFireability-05 18559842 m, 126872 m/sec, 117193860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 150/450 141/2000 ShieldRVt-PT-005B-LTLFireability-05 19144115 m, 116854 m/sec, 121210595 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 155/450 145/2000 ShieldRVt-PT-005B-LTLFireability-05 19722013 m, 115579 m/sec, 125291718 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 160/450 149/2000 ShieldRVt-PT-005B-LTLFireability-05 20315115 m, 118620 m/sec, 129426061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 165/450 154/2000 ShieldRVt-PT-005B-LTLFireability-05 20983524 m, 133681 m/sec, 133302107 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 170/450 158/2000 ShieldRVt-PT-005B-LTLFireability-05 21587844 m, 120864 m/sec, 137108224 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 158
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 175/450 162/2000 ShieldRVt-PT-005B-LTLFireability-05 22198382 m, 122107 m/sec, 140980010 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 180/450 167/2000 ShieldRVt-PT-005B-LTLFireability-05 22837155 m, 127754 m/sec, 144914326 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 185/450 171/2000 ShieldRVt-PT-005B-LTLFireability-05 23418834 m, 116335 m/sec, 148729530 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 171
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 190/450 174/2000 ShieldRVt-PT-005B-LTLFireability-05 23966509 m, 109535 m/sec, 152586611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 174
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 195/450 178/2000 ShieldRVt-PT-005B-LTLFireability-05 24521014 m, 110901 m/sec, 156496632 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 200/450 182/2000 ShieldRVt-PT-005B-LTLFireability-05 25116892 m, 119175 m/sec, 160456259 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 205/450 186/2000 ShieldRVt-PT-005B-LTLFireability-05 25697973 m, 116216 m/sec, 164277451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 210/450 190/2000 ShieldRVt-PT-005B-LTLFireability-05 26248407 m, 110086 m/sec, 168156309 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 215/450 194/2000 ShieldRVt-PT-005B-LTLFireability-05 26807551 m, 111828 m/sec, 172102465 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 220/450 198/2000 ShieldRVt-PT-005B-LTLFireability-05 27428929 m, 124275 m/sec, 176078305 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 225/450 203/2000 ShieldRVt-PT-005B-LTLFireability-05 28067806 m, 127775 m/sec, 179928206 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 230/450 207/2000 ShieldRVt-PT-005B-LTLFireability-05 28677002 m, 121839 m/sec, 183826279 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 207
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 235/450 211/2000 ShieldRVt-PT-005B-LTLFireability-05 29297812 m, 124162 m/sec, 187785517 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 240/450 215/2000 ShieldRVt-PT-005B-LTLFireability-05 29938458 m, 128129 m/sec, 191715552 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 215
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 245/450 219/2000 ShieldRVt-PT-005B-LTLFireability-05 30501429 m, 112594 m/sec, 195605023 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 250/450 223/2000 ShieldRVt-PT-005B-LTLFireability-05 31059640 m, 111642 m/sec, 199544408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 223
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 255/450 227/2000 ShieldRVt-PT-005B-LTLFireability-05 31629533 m, 113978 m/sec, 203543136 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 260/450 231/2000 ShieldRVt-PT-005B-LTLFireability-05 32254311 m, 124955 m/sec, 207496715 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 231
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 265/450 235/2000 ShieldRVt-PT-005B-LTLFireability-05 32815362 m, 112210 m/sec, 211407436 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 270/450 239/2000 ShieldRVt-PT-005B-LTLFireability-05 33378757 m, 112679 m/sec, 215361601 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 239
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 275/450 243/2000 ShieldRVt-PT-005B-LTLFireability-05 33954166 m, 115081 m/sec, 219380263 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 243
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 280/450 247/2000 ShieldRVt-PT-005B-LTLFireability-05 34568240 m, 122814 m/sec, 223268055 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 285/450 251/2000 ShieldRVt-PT-005B-LTLFireability-05 35116132 m, 109578 m/sec, 227112876 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 290/450 255/2000 ShieldRVt-PT-005B-LTLFireability-05 35672525 m, 111278 m/sec, 230991478 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 255
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 295/450 259/2000 ShieldRVt-PT-005B-LTLFireability-05 36234301 m, 112355 m/sec, 234925789 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 259
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 300/450 263/2000 ShieldRVt-PT-005B-LTLFireability-05 36802361 m, 113612 m/sec, 238818878 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 263
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 305/450 266/2000 ShieldRVt-PT-005B-LTLFireability-05 37308914 m, 101310 m/sec, 242675452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 310/450 270/2000 ShieldRVt-PT-005B-LTLFireability-05 37816800 m, 101577 m/sec, 246582705 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 315/450 273/2000 ShieldRVt-PT-005B-LTLFireability-05 38330493 m, 102738 m/sec, 250542147 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 273
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 320/450 277/2000 ShieldRVt-PT-005B-LTLFireability-05 38893094 m, 112520 m/sec, 254537522 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 277
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 325/450 281/2000 ShieldRVt-PT-005B-LTLFireability-05 39419989 m, 105379 m/sec, 258432412 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 281
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 330/450 284/2000 ShieldRVt-PT-005B-LTLFireability-05 39931680 m, 102338 m/sec, 262375649 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 284
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 335/450 288/2000 ShieldRVt-PT-005B-LTLFireability-05 40449252 m, 103514 m/sec, 266366264 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 288
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 340/450 292/2000 ShieldRVt-PT-005B-LTLFireability-05 41011886 m, 112526 m/sec, 270385827 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 292
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 345/450 295/2000 ShieldRVt-PT-005B-LTLFireability-05 41587791 m, 115181 m/sec, 274160430 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 295
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 350/450 299/2000 ShieldRVt-PT-005B-LTLFireability-05 42127660 m, 107973 m/sec, 277963642 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 299
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 355/450 303/2000 ShieldRVt-PT-005B-LTLFireability-05 42675229 m, 109513 m/sec, 281824520 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 360/450 307/2000 ShieldRVt-PT-005B-LTLFireability-05 43249108 m, 114775 m/sec, 285731279 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 307
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 365/450 311/2000 ShieldRVt-PT-005B-LTLFireability-05 43781205 m, 106419 m/sec, 289537506 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 311
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 370/450 314/2000 ShieldRVt-PT-005B-LTLFireability-05 44277105 m, 99180 m/sec, 293364358 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 314
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 375/450 317/2000 ShieldRVt-PT-005B-LTLFireability-05 44780496 m, 100678 m/sec, 297252001 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 317
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 380/450 321/2000 ShieldRVt-PT-005B-LTLFireability-05 45291613 m, 102223 m/sec, 301191245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 321
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 385/450 325/2000 ShieldRVt-PT-005B-LTLFireability-05 45848584 m, 111394 m/sec, 305079250 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 325
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 390/450 328/2000 ShieldRVt-PT-005B-LTLFireability-05 46356222 m, 101527 m/sec, 308922987 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 328
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 395/450 332/2000 ShieldRVt-PT-005B-LTLFireability-05 46860699 m, 100895 m/sec, 312818549 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 332
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 400/450 335/2000 ShieldRVt-PT-005B-LTLFireability-05 47371658 m, 102191 m/sec, 316749316 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 335
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 405/450 339/2000 ShieldRVt-PT-005B-LTLFireability-05 47943489 m, 114366 m/sec, 320671380 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 339
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 410/450 343/2000 ShieldRVt-PT-005B-LTLFireability-05 48506167 m, 112535 m/sec, 324440079 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 343
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 415/450 347/2000 ShieldRVt-PT-005B-LTLFireability-05 49047363 m, 108239 m/sec, 328244457 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 347
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 420/450 350/2000 ShieldRVt-PT-005B-LTLFireability-05 49588328 m, 108193 m/sec, 332058975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 350
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 425/450 354/2000 ShieldRVt-PT-005B-LTLFireability-05 50157426 m, 113819 m/sec, 335903633 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 430/450 358/2000 ShieldRVt-PT-005B-LTLFireability-05 50674963 m, 103507 m/sec, 339663709 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 358
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 435/450 361/2000 ShieldRVt-PT-005B-LTLFireability-05 51170987 m, 99204 m/sec, 343482096 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 361
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 440/450 365/2000 ShieldRVt-PT-005B-LTLFireability-05 51671578 m, 100118 m/sec, 347345422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 365
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 445/450 368/2000 ShieldRVt-PT-005B-LTLFireability-05 52180323 m, 101749 m/sec, 351269357 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 368
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 32 LTL EXCL 450/450 372/2000 ShieldRVt-PT-005B-LTLFireability-05 52730899 m, 110115 m/sec, 355107402 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 372
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 32 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-05 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 70 (type EXCL) for 69 ShieldRVt-PT-005B-LTLFireability-15
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 ShieldRVt-PT-005B-LTLFireability-05
[[35mlola[0m][I] time limit : 3145 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 70 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 94
[[35mlola[0m][I] fired transitions : 94
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 32 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-05 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 ShieldRVt-PT-005B-LTLFireability-04
[[35mlola[0m][I] time limit : 523 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 5/523 7/2000 ShieldRVt-PT-005B-LTLFireability-04 859111 m, 171822 m/sec, 3872886 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 10/523 12/2000 ShieldRVt-PT-005B-LTLFireability-04 1627323 m, 153642 m/sec, 7818493 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 15/523 18/2000 ShieldRVt-PT-005B-LTLFireability-04 2406292 m, 155793 m/sec, 11826781 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 20/523 24/2000 ShieldRVt-PT-005B-LTLFireability-04 3221542 m, 163050 m/sec, 15905053 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 25/523 29/2000 ShieldRVt-PT-005B-LTLFireability-04 3974707 m, 150633 m/sec, 19852752 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 30/523 34/2000 ShieldRVt-PT-005B-LTLFireability-04 4651655 m, 135389 m/sec, 23819513 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 35/523 39/2000 ShieldRVt-PT-005B-LTLFireability-04 5341471 m, 137963 m/sec, 27863240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 40/523 44/2000 ShieldRVt-PT-005B-LTLFireability-04 6038131 m, 139332 m/sec, 31936111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 45/523 50/2000 ShieldRVt-PT-005B-LTLFireability-04 6823951 m, 157164 m/sec, 35960875 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 50/523 55/2000 ShieldRVt-PT-005B-LTLFireability-04 7533170 m, 141843 m/sec, 39952791 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 55/523 60/2000 ShieldRVt-PT-005B-LTLFireability-04 8228172 m, 139000 m/sec, 43990154 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 60/523 65/2000 ShieldRVt-PT-005B-LTLFireability-04 8930571 m, 140479 m/sec, 48073322 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 65/523 71/2000 ShieldRVt-PT-005B-LTLFireability-04 9695485 m, 152982 m/sec, 52167857 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 70/523 76/2000 ShieldRVt-PT-005B-LTLFireability-04 10418331 m, 144569 m/sec, 56054092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 75/523 81/2000 ShieldRVt-PT-005B-LTLFireability-04 11093138 m, 134961 m/sec, 59989520 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 80/523 86/2000 ShieldRVt-PT-005B-LTLFireability-04 11773971 m, 136166 m/sec, 63976868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 85/523 91/2000 ShieldRVt-PT-005B-LTLFireability-04 12466553 m, 138516 m/sec, 68019829 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 545 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 90/523 96/2000 ShieldRVt-PT-005B-LTLFireability-04 13172362 m, 141161 m/sec, 71992703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 550 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 95/523 101/2000 ShieldRVt-PT-005B-LTLFireability-04 13799555 m, 125438 m/sec, 75928447 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 555 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 100/523 105/2000 ShieldRVt-PT-005B-LTLFireability-04 14416256 m, 123340 m/sec, 79915472 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 560 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 105/523 110/2000 ShieldRVt-PT-005B-LTLFireability-04 15039667 m, 124682 m/sec, 83939995 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 565 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 110/523 114/2000 ShieldRVt-PT-005B-LTLFireability-04 15668068 m, 125680 m/sec, 88033658 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 570 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 115/523 119/2000 ShieldRVt-PT-005B-LTLFireability-04 16364046 m, 139195 m/sec, 92027068 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 575 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 120/523 124/2000 ShieldRVt-PT-005B-LTLFireability-04 16990307 m, 125252 m/sec, 95999394 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 580 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 125/523 128/2000 ShieldRVt-PT-005B-LTLFireability-04 17613009 m, 124540 m/sec, 100018584 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 585 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 130/523 133/2000 ShieldRVt-PT-005B-LTLFireability-04 18239862 m, 125370 m/sec, 104083143 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 590 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 135/523 137/2000 ShieldRVt-PT-005B-LTLFireability-04 18884297 m, 128887 m/sec, 108227760 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 595 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 140/523 143/2000 ShieldRVt-PT-005B-LTLFireability-04 19641113 m, 151363 m/sec, 112137907 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 600 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 145/523 148/2000 ShieldRVt-PT-005B-LTLFireability-04 20314896 m, 134756 m/sec, 116034051 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 605 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 150/523 153/2000 ShieldRVt-PT-005B-LTLFireability-04 20995471 m, 136115 m/sec, 119985165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 610 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 155/523 158/2000 ShieldRVt-PT-005B-LTLFireability-04 21680397 m, 136985 m/sec, 123983693 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 615 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 160/523 163/2000 ShieldRVt-PT-005B-LTLFireability-04 22404517 m, 144824 m/sec, 127989413 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 620 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 165/523 168/2000 ShieldRVt-PT-005B-LTLFireability-04 23053045 m, 129705 m/sec, 131896131 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 625 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 170/523 172/2000 ShieldRVt-PT-005B-LTLFireability-04 23655083 m, 120407 m/sec, 135836466 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 630 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 175/523 176/2000 ShieldRVt-PT-005B-LTLFireability-04 24260459 m, 121075 m/sec, 139841888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 635 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 180/523 181/2000 ShieldRVt-PT-005B-LTLFireability-04 24887286 m, 125365 m/sec, 143886264 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 640 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 185/523 186/2000 ShieldRVt-PT-005B-LTLFireability-04 25584946 m, 139532 m/sec, 147972098 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 645 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 190/523 191/2000 ShieldRVt-PT-005B-LTLFireability-04 26239398 m, 130890 m/sec, 151948635 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 650 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 195/523 195/2000 ShieldRVt-PT-005B-LTLFireability-04 26857583 m, 123637 m/sec, 155966037 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 655 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 200/523 200/2000 ShieldRVt-PT-005B-LTLFireability-04 27479334 m, 124350 m/sec, 160047408 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 660 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 205/523 204/2000 ShieldRVt-PT-005B-LTLFireability-04 28108592 m, 125851 m/sec, 164163276 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 665 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 210/523 210/2000 ShieldRVt-PT-005B-LTLFireability-04 28843913 m, 147064 m/sec, 168128231 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 670 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 215/523 214/2000 ShieldRVt-PT-005B-LTLFireability-04 29531295 m, 137476 m/sec, 171937623 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 675 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 220/523 219/2000 ShieldRVt-PT-005B-LTLFireability-04 30189449 m, 131630 m/sec, 175773302 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 680 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 225/523 223/2000 ShieldRVt-PT-005B-LTLFireability-04 30857655 m, 133641 m/sec, 179646807 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 685 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 230/523 228/2000 ShieldRVt-PT-005B-LTLFireability-04 31550202 m, 138509 m/sec, 183611054 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 690 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 235/523 233/2000 ShieldRVt-PT-005B-LTLFireability-04 32211711 m, 132301 m/sec, 187429081 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 695 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 240/523 237/2000 ShieldRVt-PT-005B-LTLFireability-04 32807502 m, 119158 m/sec, 191240101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 700 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 245/523 241/2000 ShieldRVt-PT-005B-LTLFireability-04 33406472 m, 119794 m/sec, 195095157 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 705 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 250/523 245/2000 ShieldRVt-PT-005B-LTLFireability-04 34001741 m, 119053 m/sec, 198952946 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 710 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 255/523 249/2000 ShieldRVt-PT-005B-LTLFireability-04 34604072 m, 120466 m/sec, 202867431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 715 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 260/523 254/2000 ShieldRVt-PT-005B-LTLFireability-04 35273098 m, 133805 m/sec, 206709341 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 720 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 265/523 258/2000 ShieldRVt-PT-005B-LTLFireability-04 35878939 m, 121168 m/sec, 210507112 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 725 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 270/523 262/2000 ShieldRVt-PT-005B-LTLFireability-04 36473027 m, 118817 m/sec, 214345782 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 730 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 275/523 266/2000 ShieldRVt-PT-005B-LTLFireability-04 37061780 m, 117750 m/sec, 218161193 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 735 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 280/523 270/2000 ShieldRVt-PT-005B-LTLFireability-04 37657359 m, 119115 m/sec, 222087637 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 740 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 285/523 275/2000 ShieldRVt-PT-005B-LTLFireability-04 38397436 m, 148015 m/sec, 226017318 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 745 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 290/523 280/2000 ShieldRVt-PT-005B-LTLFireability-04 39076045 m, 135721 m/sec, 229827950 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 750 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 295/523 284/2000 ShieldRVt-PT-005B-LTLFireability-04 39740990 m, 132989 m/sec, 233681038 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 755 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 300/523 289/2000 ShieldRVt-PT-005B-LTLFireability-04 40407121 m, 133226 m/sec, 237576820 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 760 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 305/523 294/2000 ShieldRVt-PT-005B-LTLFireability-04 41114819 m, 141539 m/sec, 241527374 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 765 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 310/523 298/2000 ShieldRVt-PT-005B-LTLFireability-04 41764766 m, 129989 m/sec, 245363615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 770 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 315/523 302/2000 ShieldRVt-PT-005B-LTLFireability-04 42353663 m, 117779 m/sec, 249164984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 775 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 320/523 306/2000 ShieldRVt-PT-005B-LTLFireability-04 42951474 m, 119562 m/sec, 253023232 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 780 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 325/523 311/2000 ShieldRVt-PT-005B-LTLFireability-04 43554005 m, 120506 m/sec, 256932330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 785 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 330/523 315/2000 ShieldRVt-PT-005B-LTLFireability-04 44195076 m, 128214 m/sec, 260963659 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 790 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 335/523 320/2000 ShieldRVt-PT-005B-LTLFireability-04 44860313 m, 133047 m/sec, 264847007 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 795 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 340/523 324/2000 ShieldRVt-PT-005B-LTLFireability-04 45465195 m, 120976 m/sec, 268718221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 800 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 345/523 328/2000 ShieldRVt-PT-005B-LTLFireability-04 46071331 m, 121227 m/sec, 272627575 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 805 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 350/523 332/2000 ShieldRVt-PT-005B-LTLFireability-04 46681173 m, 121968 m/sec, 276571089 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 810 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 355/523 336/2000 ShieldRVt-PT-005B-LTLFireability-04 47309951 m, 125755 m/sec, 280599457 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 815 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 360/523 341/2000 ShieldRVt-PT-005B-LTLFireability-04 47973940 m, 132797 m/sec, 284419329 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 820 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 365/523 345/2000 ShieldRVt-PT-005B-LTLFireability-04 48569369 m, 119085 m/sec, 288206374 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 825 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 370/523 349/2000 ShieldRVt-PT-005B-LTLFireability-04 49161727 m, 118471 m/sec, 292041969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 830 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 375/523 353/2000 ShieldRVt-PT-005B-LTLFireability-04 49763249 m, 120304 m/sec, 295910111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 835 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 380/523 357/2000 ShieldRVt-PT-005B-LTLFireability-04 50361963 m, 119742 m/sec, 299827341 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 840 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 385/523 362/2000 ShieldRVt-PT-005B-LTLFireability-04 50975951 m, 122797 m/sec, 303665332 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 845 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 390/523 365/2000 ShieldRVt-PT-005B-LTLFireability-04 51529721 m, 110754 m/sec, 307437248 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 850 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 395/523 369/2000 ShieldRVt-PT-005B-LTLFireability-04 52052596 m, 104575 m/sec, 311189627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 855 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 400/523 373/2000 ShieldRVt-PT-005B-LTLFireability-04 52585224 m, 106525 m/sec, 315040466 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 860 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 405/523 376/2000 ShieldRVt-PT-005B-LTLFireability-04 53131220 m, 109199 m/sec, 318929489 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 865 secs. Pages in use: 376
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 410/523 380/2000 ShieldRVt-PT-005B-LTLFireability-04 53716765 m, 117109 m/sec, 322894596 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 870 secs. Pages in use: 380
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 415/523 384/2000 ShieldRVt-PT-005B-LTLFireability-04 54299836 m, 116614 m/sec, 326718745 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 875 secs. Pages in use: 384
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 420/523 388/2000 ShieldRVt-PT-005B-LTLFireability-04 54844898 m, 109012 m/sec, 330542697 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 880 secs. Pages in use: 388
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 425/523 392/2000 ShieldRVt-PT-005B-LTLFireability-04 55392181 m, 109456 m/sec, 334427834 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 885 secs. Pages in use: 392
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 430/523 396/2000 ShieldRVt-PT-005B-LTLFireability-04 55939083 m, 109380 m/sec, 338365414 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 890 secs. Pages in use: 396
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 435/523 399/2000 ShieldRVt-PT-005B-LTLFireability-04 56479935 m, 108170 m/sec, 342278925 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 895 secs. Pages in use: 399
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 440/523 404/2000 ShieldRVt-PT-005B-LTLFireability-04 57109155 m, 125844 m/sec, 346153544 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 900 secs. Pages in use: 404
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 445/523 408/2000 ShieldRVt-PT-005B-LTLFireability-04 57724357 m, 123040 m/sec, 349856186 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 905 secs. Pages in use: 408
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 450/523 412/2000 ShieldRVt-PT-005B-LTLFireability-04 58279249 m, 110978 m/sec, 353524306 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 910 secs. Pages in use: 412
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 455/523 416/2000 ShieldRVt-PT-005B-LTLFireability-04 58850164 m, 114183 m/sec, 357212821 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 915 secs. Pages in use: 416
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 460/523 420/2000 ShieldRVt-PT-005B-LTLFireability-04 59427826 m, 115532 m/sec, 360957660 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 920 secs. Pages in use: 420
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 465/523 424/2000 ShieldRVt-PT-005B-LTLFireability-04 60046183 m, 123671 m/sec, 364795092 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 925 secs. Pages in use: 424
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 470/523 428/2000 ShieldRVt-PT-005B-LTLFireability-04 60606886 m, 112140 m/sec, 368473246 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 930 secs. Pages in use: 428
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 475/523 431/2000 ShieldRVt-PT-005B-LTLFireability-04 61130690 m, 104760 m/sec, 372125741 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 935 secs. Pages in use: 431
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 480/523 435/2000 ShieldRVt-PT-005B-LTLFireability-04 61649460 m, 103754 m/sec, 375816185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 940 secs. Pages in use: 435
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 485/523 438/2000 ShieldRVt-PT-005B-LTLFireability-04 62159521 m, 102012 m/sec, 379535123 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 945 secs. Pages in use: 438
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 490/523 442/2000 ShieldRVt-PT-005B-LTLFireability-04 62679673 m, 104030 m/sec, 383263837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 950 secs. Pages in use: 442
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 495/523 446/2000 ShieldRVt-PT-005B-LTLFireability-04 63259591 m, 115983 m/sec, 387083497 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 955 secs. Pages in use: 446
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 500/523 450/2000 ShieldRVt-PT-005B-LTLFireability-04 63819896 m, 112061 m/sec, 390795951 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 960 secs. Pages in use: 450
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 505/523 453/2000 ShieldRVt-PT-005B-LTLFireability-04 64336293 m, 103279 m/sec, 394459133 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 965 secs. Pages in use: 453
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 510/523 457/2000 ShieldRVt-PT-005B-LTLFireability-04 64862279 m, 105197 m/sec, 398175938 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 970 secs. Pages in use: 457
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 515/523 460/2000 ShieldRVt-PT-005B-LTLFireability-04 65384244 m, 104393 m/sec, 401939822 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 975 secs. Pages in use: 460
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 29 LTL EXCL 520/523 464/2000 ShieldRVt-PT-005B-LTLFireability-04 65906967 m, 104544 m/sec, 405718172 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 980 secs. Pages in use: 464
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 29 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-04 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 985 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 ShieldRVt-PT-005B-LTLFireability-03
[[35mlola[0m][I] time limit : 523 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 ShieldRVt-PT-005B-LTLFireability-04
[[35mlola[0m][I] time limit : 2615 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] CANCELED task # 29 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-04 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 990 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 5 (type EXCL) for 0 ShieldRVt-PT-005B-LTLFireability-00
[[35mlola[0m][I] time limit : 652 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 5 (type EXCL) for ShieldRVt-PT-005B-LTLFireability-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 3 (type EXCL) for 0 ShieldRVt-PT-005B-LTLFireability-00
[[35mlola[0m][I] time limit : 870 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 5/870 6/2000 ShieldRVt-PT-005B-LTLFireability-00 820821 m, 164164 m/sec, 3364213 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 995 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 10/870 11/2000 ShieldRVt-PT-005B-LTLFireability-00 1501297 m, 136095 m/sec, 6399065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1000 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 15/870 15/2000 ShieldRVt-PT-005B-LTLFireability-00 2166395 m, 133019 m/sec, 9305178 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1005 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 20/870 20/2000 ShieldRVt-PT-005B-LTLFireability-00 2865738 m, 139868 m/sec, 12189836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1010 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 25/870 25/2000 ShieldRVt-PT-005B-LTLFireability-00 3584078 m, 143668 m/sec, 15017276 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1015 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 30/870 30/2000 ShieldRVt-PT-005B-LTLFireability-00 4289158 m, 141016 m/sec, 17749263 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1020 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 35/870 35/2000 ShieldRVt-PT-005B-LTLFireability-00 4996207 m, 141409 m/sec, 20494582 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1025 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 40/870 39/2000 ShieldRVt-PT-005B-LTLFireability-00 5678218 m, 136402 m/sec, 23195204 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1030 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 45/870 44/2000 ShieldRVt-PT-005B-LTLFireability-00 6326208 m, 129598 m/sec, 25793119 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1035 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 50/870 48/2000 ShieldRVt-PT-005B-LTLFireability-00 6987233 m, 132205 m/sec, 28416705 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1040 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 55/870 52/2000 ShieldRVt-PT-005B-LTLFireability-00 7633924 m, 129338 m/sec, 31026904 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1045 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 60/870 57/2000 ShieldRVt-PT-005B-LTLFireability-00 8272992 m, 127813 m/sec, 33629436 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1050 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 65/870 61/2000 ShieldRVt-PT-005B-LTLFireability-00 8894910 m, 124383 m/sec, 36183472 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1055 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 70/870 65/2000 ShieldRVt-PT-005B-LTLFireability-00 9522640 m, 125546 m/sec, 38790203 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1060 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 75/870 69/2000 ShieldRVt-PT-005B-LTLFireability-00 10138245 m, 123121 m/sec, 41365569 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1065 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-01: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-02: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-03: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-005B-LTLFireability-06: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-09: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-14: CONJ false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-005B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-00: CONJ 0 0 1 0 3 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-04: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-05: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-10: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-005B-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 3 LTL EXCL 80/870 73/2000 ShieldRVt-PT-005B-LTLFireability-00 10743752 m, 121101 m/sec, 43913573 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1070 secs. Pages in use: 468
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 407 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-005B"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ShieldRVt-PT-005B, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r357-tall-171683764600956"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-005B.tgz
mv ShieldRVt-PT-005B execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;