About the Execution of LoLA for ShieldRVt-PT-004B
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 1522.684 | 51150.00 | 52084.00 | 220.50 | FFTFFFFFFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r357-tall-171683764500940.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ShieldRVt-PT-004B, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r357-tall-171683764500940
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 500K
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K May 19 07:17 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K May 19 16:39 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 23 07:55 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:55 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 11 21:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 110K Apr 11 21:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Apr 11 21:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 92K Apr 11 21:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:55 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:55 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 48K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-00
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-01
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-02
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-03
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-04
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-05
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-06
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-07
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-08
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-09
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-10
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-11
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-12
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-13
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-14
FORMULA_NAME ShieldRVt-PT-004B-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717198644150
FORMULA ShieldRVt-PT-004B-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-004B-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-00: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-004B-LTLFireability-02: LTL true LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-03: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-05: CONJ false findpath[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-06: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-08: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-09: AG false findpath[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-10: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-11: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-12: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-13: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-004B-LTLFireability-15: LTL false LTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 51 secs. Pages in use: 50
BK_STOP 1717198695300
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 ShieldRVt-PT-004B-LTLFireability-01
[[35mlola[0m][I] time limit : 149 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 53 (type FNDP) for 15 ShieldRVt-PT-004B-LTLFireability-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 54 (type EQUN) for 15 ShieldRVt-PT-004B-LTLFireability-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 60 (type EQUN) for 15 ShieldRVt-PT-004B-LTLFireability-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 53 (type FNDP) for ShieldRVt-PT-004B-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 54 (type EQUN) for ShieldRVt-PT-004B-LTLFireability-05 (obsolete)
[[35mlola[0m][W] CANCELED task # 60 (type EQUN) for ShieldRVt-PT-004B-LTLFireability-05 (obsolete)
[[35mlola[0m][I] LAUNCH task # 62 (type FNDP) for 31 ShieldRVt-PT-004B-LTLFireability-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 63 (type EQUN) for 31 ShieldRVt-PT-004B-LTLFireability-09
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 62 (type FNDP) for ShieldRVt-PT-004B-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 63 (type EQUN) for ShieldRVt-PT-004B-LTLFireability-09 (obsolete)
[[35mlola[0m][I] FINISHED task # 54 (type EQUN) for ShieldRVt-PT-004B-LTLFireability-05
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 60 (type EQUN) for ShieldRVt-PT-004B-LTLFireability-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 63 (type EQUN) for ShieldRVt-PT-004B-LTLFireability-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 400569
[[35mlola[0m][I] fired transitions : 1435757
[[35mlola[0m][I] time used : 2
[[35mlola[0m][I] memory pages used : 3
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 ShieldRVt-PT-004B-LTLFireability-14
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3085
[[35mlola[0m][I] fired transitions : 5494
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 ShieldRVt-PT-004B-LTLFireability-13
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-09: AG false findpath[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 LTL EXCL 3/299 4/2000 ShieldRVt-PT-004B-LTLFireability-13 580577 m, 116115 m/sec, 2054197 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 7 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-09: AG false findpath[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 LTL EXCL 8/299 11/2000 ShieldRVt-PT-004B-LTLFireability-13 1490214 m, 181927 m/sec, 5138320 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 12 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-05: CONJ false findpath[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-09: AG false findpath[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-14: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 44 LTL EXCL 13/299 16/2000 ShieldRVt-PT-004B-LTLFireability-13 2234473 m, 148851 m/sec, 7836421 t fired, .
[[35mlola[0m][.]
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[[35mlola[0m][.] [1m[31mShieldRVt-PT-004B-LTLFireability-05: CONJ false findpath[0m
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[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-13: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-004B-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 44 LTL EXCL 18/299 21/2000 ShieldRVt-PT-004B-LTLFireability-13 2984381 m, 149981 m/sec, 10603233 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 23/299 26/2000 ShieldRVt-PT-004B-LTLFireability-13 3768889 m, 156901 m/sec, 13412675 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 28/299 31/2000 ShieldRVt-PT-004B-LTLFireability-13 4534438 m, 153109 m/sec, 16203595 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 33/299 36/2000 ShieldRVt-PT-004B-LTLFireability-13 5259225 m, 144957 m/sec, 18925160 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 38/299 41/2000 ShieldRVt-PT-004B-LTLFireability-13 5994720 m, 147099 m/sec, 21642618 t fired, .
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[[35mlola[0m][.] 44 LTL EXCL 43/299 46/2000 ShieldRVt-PT-004B-LTLFireability-13 6704076 m, 141871 m/sec, 24323718 t fired, .
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[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 7244863
[[35mlola[0m][I] fired transitions : 26275173
[[35mlola[0m][I] time used : 47
[[35mlola[0m][I] memory pages used : 50
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 ShieldRVt-PT-004B-LTLFireability-11
[[35mlola[0m][I] time limit : 322 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 78
[[35mlola[0m][I] fired transitions : 78
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 ShieldRVt-PT-004B-LTLFireability-06
[[35mlola[0m][I] time limit : 354 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 130
[[35mlola[0m][I] fired transitions : 130
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 ShieldRVt-PT-004B-LTLFireability-04
[[35mlola[0m][I] time limit : 394 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 78
[[35mlola[0m][I] fired transitions : 78
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 ShieldRVt-PT-004B-LTLFireability-03
[[35mlola[0m][I] time limit : 443 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 78
[[35mlola[0m][I] fired transitions : 78
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 ShieldRVt-PT-004B-LTLFireability-02
[[35mlola[0m][I] time limit : 507 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 ShieldRVt-PT-004B-LTLFireability-08
[[35mlola[0m][I] time limit : 591 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 7
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 41 (type EXCL) for 40 ShieldRVt-PT-004B-LTLFireability-12
[[35mlola[0m][I] time limit : 709 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 41 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 ShieldRVt-PT-004B-LTLFireability-07
[[35mlola[0m][I] time limit : 887 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 4
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 ShieldRVt-PT-004B-LTLFireability-00
[[35mlola[0m][I] time limit : 1183 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 111
[[35mlola[0m][I] fired transitions : 144
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 ShieldRVt-PT-004B-LTLFireability-15
[[35mlola[0m][I] time limit : 1774 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 5
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 ShieldRVt-PT-004B-LTLFireability-10
[[35mlola[0m][I] time limit : 3549 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for ShieldRVt-PT-004B-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-004B"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ShieldRVt-PT-004B, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r357-tall-171683764500940"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-004B.tgz
mv ShieldRVt-PT-004B execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;