About the Execution of LoLA for ShieldRVt-PT-002B
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 6518.779 | 540765.00 | 549773.00 | 1058.20 | TTTTTTTTFFTTFTTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r357-tall-171683764400906.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ShieldRVt-PT-002B, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r357-tall-171683764400906
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 500K
-rw-r--r-- 1 mcc users 7.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 92K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Apr 23 07:55 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 23 07:55 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 23 07:55 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:55 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 11 21:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 112K Apr 11 21:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Apr 11 21:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Apr 11 21:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:55 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:55 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 24K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-00
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-01
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-02
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-03
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-04
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-05
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-06
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-07
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-08
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-09
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-10
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2024-11
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2023-12
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2023-13
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2023-14
FORMULA_NAME ShieldRVt-PT-002B-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717197357187
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2023-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVt-PT-002B-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-02: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-002B-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-002B-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 540 secs. Pages in use: 350
BK_STOP 1717197897952
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 19 (type EXCL) for 18 ShieldRVt-PT-002B-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 19 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 45
[[35mlola[0m][I] fired transitions : 161
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 ShieldRVt-PT-002B-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 16
[[35mlola[0m][I] fired transitions : 26
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 ShieldRVt-PT-002B-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 37
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 ShieldRVt-PT-002B-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-01
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 23
[[35mlola[0m][I] fired transitions : 66
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 ShieldRVt-PT-002B-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 45
[[35mlola[0m][I] fired transitions : 137
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 ShieldRVt-PT-002B-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 40
[[35mlola[0m][I] fired transitions : 68
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 ShieldRVt-PT-002B-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 72
[[35mlola[0m][I] fired transitions : 246
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 ShieldRVt-PT-002B-CTLFireability-2023-12
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2023-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 121
[[35mlola[0m][I] fired transitions : 126
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 ShieldRVt-PT-002B-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 10 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 63
[[35mlola[0m][I] fired transitions : 63
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 ShieldRVt-PT-002B-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 513 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 50
[[35mlola[0m][I] fired transitions : 62
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 ShieldRVt-PT-002B-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 599 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 349
[[35mlola[0m][I] fired transitions : 578
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 ShieldRVt-PT-002B-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 719 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 5/719 8/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 1844161 m, 368832 m/sec, 5991257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 9 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 10/719 15/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 3339389 m, 299045 m/sec, 11741577 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 14 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 15/719 20/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 4550414 m, 242205 m/sec, 17006371 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 19 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 20/719 25/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 5840500 m, 258017 m/sec, 22529023 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 24 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 25/719 30/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 7101761 m, 252252 m/sec, 28025799 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 29 secs. Pages in use: 30
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 30/719 35/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 8333089 m, 246265 m/sec, 33518457 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 34 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 35/719 40/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 9482646 m, 229911 m/sec, 38852223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 39 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 40/719 45/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 10589116 m, 221294 m/sec, 44156854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 44 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 45/719 49/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 11630776 m, 208332 m/sec, 49333773 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 49 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 50/719 54/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 12637787 m, 201402 m/sec, 54488464 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 54 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 55/719 58/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 13723809 m, 217204 m/sec, 59722210 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 59 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 60/719 62/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 14670508 m, 189339 m/sec, 64639878 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 64 secs. Pages in use: 62
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 65/719 66/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 15580172 m, 181932 m/sec, 69259518 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 69 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 70/719 70/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 16471895 m, 178344 m/sec, 74248753 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 74 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 75/719 73/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 17356125 m, 176846 m/sec, 79289105 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 79 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 80/719 77/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 18259075 m, 180590 m/sec, 84371866 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 84 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 85/719 81/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 19156553 m, 179495 m/sec, 89437765 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 89 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 90/719 85/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 20078920 m, 184473 m/sec, 94529061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 94 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 95/719 88/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 20948708 m, 173957 m/sec, 99463028 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 99 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 100/719 92/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 21819189 m, 174096 m/sec, 104376441 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 104 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 105/719 96/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 22682506 m, 172663 m/sec, 109266875 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 109 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 110/719 99/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 23563692 m, 176237 m/sec, 114151405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 114 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 115/719 103/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 24442448 m, 175751 m/sec, 118965646 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 119 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 120/719 107/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 25266228 m, 164756 m/sec, 123696052 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 124 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 125/719 110/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 26045777 m, 155909 m/sec, 128446655 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 129 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 130/719 113/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 26833149 m, 157474 m/sec, 133125104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 134 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 135/719 116/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 27570989 m, 147568 m/sec, 137670354 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 139 secs. Pages in use: 116
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 140/719 119/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 28325996 m, 151001 m/sec, 142375013 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 144 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 145/719 122/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 29011924 m, 137185 m/sec, 146861736 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 149 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 150/719 126/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 29884722 m, 174559 m/sec, 151951269 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 154 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 155/719 129/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 30682422 m, 159540 m/sec, 156845628 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 159 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 160/719 133/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 31503805 m, 164276 m/sec, 161896765 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 164 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 165/719 136/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 32295025 m, 158244 m/sec, 166960093 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 169 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 170/719 139/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 33077972 m, 156589 m/sec, 171972975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 174 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 175/719 142/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 33810353 m, 146476 m/sec, 176620662 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 179 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 180/719 145/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 34473307 m, 132590 m/sec, 180741451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 184 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 185/719 148/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 35186716 m, 142681 m/sec, 185304894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 189 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 190/719 152/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 35975373 m, 157731 m/sec, 190434113 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 194 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 195/719 155/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 36750480 m, 155021 m/sec, 195481101 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 199 secs. Pages in use: 155
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 200/719 158/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 37476845 m, 145273 m/sec, 200400041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 204 secs. Pages in use: 158
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 205/719 161/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 38169104 m, 138451 m/sec, 205202148 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 209 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 210/719 164/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 38879183 m, 142015 m/sec, 210083610 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 214 secs. Pages in use: 164
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 215/719 167/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 39584341 m, 141031 m/sec, 214907072 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 219 secs. Pages in use: 167
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 220/719 170/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 40280446 m, 139221 m/sec, 219594211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 224 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 225/719 172/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 40977391 m, 139389 m/sec, 224342496 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 229 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 230/719 175/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 41685938 m, 141709 m/sec, 229126679 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 234 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 235/719 178/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 42368570 m, 136526 m/sec, 233829815 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 239 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 240/719 181/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 43064096 m, 139105 m/sec, 238601083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 244 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 245/719 184/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 43746233 m, 136427 m/sec, 243328416 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 249 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 250/719 187/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 44396955 m, 130144 m/sec, 248027688 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 254 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 255/719 190/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 45035133 m, 127635 m/sec, 252670041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 259 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 260/719 192/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 45642909 m, 121555 m/sec, 257226102 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 264 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 265/719 195/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 46271838 m, 125785 m/sec, 262053186 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 269 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 270/719 197/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 46921801 m, 129992 m/sec, 267086562 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 274 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 275/719 200/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 47521011 m, 119842 m/sec, 271713660 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 279 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 280/719 203/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 48155580 m, 126913 m/sec, 276427750 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 284 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 285/719 206/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 48858217 m, 140527 m/sec, 281608034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 289 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 290/719 208/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 49552477 m, 138852 m/sec, 286676647 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 294 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 295/719 211/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 50240694 m, 137643 m/sec, 291759275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 299 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 300/719 214/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 50858055 m, 123472 m/sec, 296431045 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 304 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 306/719 216/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 51444573 m, 117303 m/sec, 300865905 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 311/719 219/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 52059150 m, 122915 m/sec, 305530105 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 219
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 316/719 221/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 52623179 m, 112805 m/sec, 309847414 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 221
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 321/719 224/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 53191191 m, 113602 m/sec, 314586339 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 224
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 326/719 226/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 53721348 m, 106031 m/sec, 318977869 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 226
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 331/719 229/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 54424102 m, 140550 m/sec, 323981320 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 229
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 336/719 232/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 55060371 m, 127253 m/sec, 328761935 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 232
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 341/719 234/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 55733978 m, 134721 m/sec, 333727228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 234
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 346/719 237/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 56346362 m, 122476 m/sec, 338423723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 351/719 240/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 56964105 m, 123548 m/sec, 343133920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 240
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 356/719 242/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 57581226 m, 123424 m/sec, 347975046 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 242
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 361/719 245/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 58178592 m, 119473 m/sec, 352671297 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 366/719 247/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 58755085 m, 115298 m/sec, 357355474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 371/719 250/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 59365974 m, 122177 m/sec, 362334048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 250
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 376/719 252/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 59941947 m, 115194 m/sec, 367166295 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 252
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 381/719 254/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 60467324 m, 105075 m/sec, 371722629 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 254
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 386/719 256/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 60967139 m, 99963 m/sec, 376090757 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 256
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 391/719 258/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 61473446 m, 101261 m/sec, 380346057 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 396/719 261/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 62098448 m, 125000 m/sec, 385252575 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 261
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 401/719 264/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 62667462 m, 113802 m/sec, 390150964 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 264
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 406/719 266/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 63348495 m, 136206 m/sec, 395125296 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 411/719 270/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 64203792 m, 171059 m/sec, 400546069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 270
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 416/719 274/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 65081722 m, 175586 m/sec, 405526445 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 421/719 277/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 65952721 m, 174199 m/sec, 410559828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 277
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 426/719 280/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 66537506 m, 116957 m/sec, 414961098 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 280
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 431/719 283/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 67261190 m, 144736 m/sec, 419891185 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 283
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 436/719 286/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 68099710 m, 167704 m/sec, 425238010 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 286
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 441/719 290/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 68962393 m, 172536 m/sec, 430142723 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 290
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 446/719 294/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 69873972 m, 182315 m/sec, 435459417 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 294
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 451/719 298/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 70827460 m, 190697 m/sec, 441520814 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 298
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 456/719 302/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 71848076 m, 204123 m/sec, 447253789 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 302
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 461/719 306/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 72835851 m, 197555 m/sec, 452870566 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 306
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 466/719 309/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 73468774 m, 126584 m/sec, 457275161 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 471/719 311/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 74028159 m, 111877 m/sec, 461733225 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 311
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 476/719 313/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 74570434 m, 108455 m/sec, 466114768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 481/719 317/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 75370104 m, 159934 m/sec, 470889949 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 317
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 486/719 320/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 76173097 m, 160598 m/sec, 475757317 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 320
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 491/719 324/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 77012695 m, 167919 m/sec, 480866111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 324
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 496/719 327/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 77908404 m, 179141 m/sec, 486256898 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 327
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 501/719 330/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 78482933 m, 114905 m/sec, 490281029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 330
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 506/719 332/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 79035571 m, 110527 m/sec, 494696445 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 332
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 511/719 335/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 79624417 m, 117769 m/sec, 499184393 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 335
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 516/719 337/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 80299273 m, 134971 m/sec, 503609921 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 337
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 521/719 341/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 81085398 m, 157225 m/sec, 508368228 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 341
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 526/719 344/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 81879561 m, 158832 m/sec, 513229380 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 344
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 31 CTL EXCL 531/719 348/2000 ShieldRVt-PT-002B-CTLFireability-2024-10 82789840 m, 182055 m/sec, 518615909 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 348
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 83299954
[[35mlola[0m][I] fired transitions : 521864794
[[35mlola[0m][I] time used : 535
[[35mlola[0m][I] memory pages used : 350
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 ShieldRVt-PT-002B-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 765 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-03: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-07: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2024-11: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVt-PT-002B-CTLFireability-2023-12: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVt-PT-002B-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVt-PT-002B-CTLFireability-2023-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 1/765 1/2000 ShieldRVt-PT-002B-CTLFireability-2023-15 139997 m, 27999 m/sec, 1475376 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 350
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2023-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 215041
[[35mlola[0m][I] fired transitions : 2502060
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 ShieldRVt-PT-002B-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 1020 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 55
[[35mlola[0m][I] fired transitions : 113
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 ShieldRVt-PT-002B-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 1530 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 9387
[[35mlola[0m][I] fired transitions : 50445
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 ShieldRVt-PT-002B-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 3060 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 28 (type EXCL) for ShieldRVt-PT-002B-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 32381
[[35mlola[0m][I] fired transitions : 65941
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-002B"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ShieldRVt-PT-002B, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r357-tall-171683764400906"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-002B.tgz
mv ShieldRVt-PT-002B execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;