About the Execution of LoLA for ShieldRVs-PT-040A
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16205.867 | 1161262.00 | 1748757.00 | 3740.60 | ????T??T???????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r357-tall-171683764300834.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ShieldRVs-PT-040A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r357-tall-171683764300834
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 664K
-rw-r--r-- 1 mcc users 7.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 87K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K May 19 07:16 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 19 16:38 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 19 07:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 19 19:15 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.5K Apr 12 18:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 84K Apr 12 18:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.1K Apr 12 17:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Apr 12 17:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:55 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:55 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 256K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-00
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-01
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-02
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-03
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-04
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-05
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-06
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-07
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-08
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-09
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-10
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2024-11
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2023-12
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2023-13
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2023-14
FORMULA_NAME ShieldRVs-PT-040A-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717183149179
FORMULA ShieldRVs-PT-040A-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-040A-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717184310441
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 66 (type EXCL) for 21 ShieldRVs-PT-040A-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 177 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 64 (type FNDP) for 21 ShieldRVs-PT-040A-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 21 ShieldRVs-PT-040A-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 66 (type EXCL) for ShieldRVs-PT-040A-CTLFireability-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 40
[[35mlola[0m][I] fired transitions : 39
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 64 (type FNDP) for ShieldRVs-PT-040A-CTLFireability-2024-07 (obsolete)
[[35mlola[0m][W] CANCELED task # 65 (type EQUN) for ShieldRVs-PT-040A-CTLFireability-2024-07 (obsolete)
[[35mlola[0m][I] FINISHED task # 64 (type FNDP) for ShieldRVs-PT-040A-CTLFireability-2024-07
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][I] LAUNCH task # 69 (type EXCL) for 12 ShieldRVs-PT-040A-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 186 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 67 (type FNDP) for 12 ShieldRVs-PT-040A-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 68 (type EQUN) for 12 ShieldRVs-PT-040A-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 67 (type FNDP) for ShieldRVs-PT-040A-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 68 (type EQUN) for ShieldRVs-PT-040A-CTLFireability-2024-04 (obsolete)
[[35mlola[0m][W] CANCELED task # 69 (type EXCL) for ShieldRVs-PT-040A-CTLFireability-2024-04 (obsolete)
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 ShieldRVs-PT-040A-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 208 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 92 (type EQUN) for 37 ShieldRVs-PT-040A-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 81 (type FNDP) for 37 ShieldRVs-PT-040A-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 86 (type EQUN) for 37 ShieldRVs-PT-040A-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 81 (type FNDP) for ShieldRVs-PT-040A-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] CANCELED task # 86 (type EQUN) for ShieldRVs-PT-040A-CTLFireability-2024-11 (obsolete)
[[35mlola[0m][I] LAUNCH task # 85 (type EQUN) for 61 ShieldRVs-PT-040A-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 89 (type EQUN) for 61 ShieldRVs-PT-040A-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 85 (type EQUN) for ShieldRVs-PT-040A-CTLFireability-2023-15
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 76 (type EQUN) for 6 ShieldRVs-PT-040A-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 65 (type EQUN) for ShieldRVs-PT-040A-CTLFireability-2024-07
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 89 (type EQUN) for ShieldRVs-PT-040A-CTLFireability-2023-15
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 79 (type EQUN) for 0 ShieldRVs-PT-040A-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 92 (type EQUN) for ShieldRVs-PT-040A-CTLFireability-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 68 (type EQUN) for ShieldRVs-PT-040A-CTLFireability-2024-04
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-040A-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-040A-CTLFireability-2024-07: EF true state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-00: EG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-02: EG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-11: DISJ 0 2 0 0 5 0 0 2
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-12: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-15: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 CTL EXCL 5/208 2/2000 ShieldRVs-PT-040A-CTLFireability-2024-08 307669 m, 61533 m/sec, 1309283 t fired, .
[[35mlola[0m][.] 76 EF STEQ 4/3539 0/5 ShieldRVs-PT-040A-CTLFireability-2024-02 sara not yet started (preprocessing).
[[35mlola[0m][.] 79 EF STEQ 3/3538 0/5 ShieldRVs-PT-040A-CTLFireability-2024-00 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 86 (type EQUN) for ShieldRVs-PT-040A-CTLFireability-2024-11
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-040A-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-040A-CTLFireability-2024-07: EF true state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-00: EG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-02: EG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-11: DISJ 0 2 0 0 6 0 0 1
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-12: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-15: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 CTL EXCL 10/208 6/2000 ShieldRVs-PT-040A-CTLFireability-2024-08 866623 m, 111790 m/sec, 4160064 t fired, .
[[35mlola[0m][.] 76 EF STEQ 9/3539 0/5 ShieldRVs-PT-040A-CTLFireability-2024-02 sara not yet started (preprocessing).
[[35mlola[0m][.] 79 EF STEQ 8/3538 0/5 ShieldRVs-PT-040A-CTLFireability-2024-00 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 3 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 79 (type EQUN) for ShieldRVs-PT-040A-CTLFireability-2024-00
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-040A-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-040A-CTLFireability-2024-07: EF true state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-00: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-02: EG 0 1 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-08: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-10: DISJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-11: DISJ 0 2 0 0 6 0 0 1
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-12: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2023-15: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 25 CTL EXCL 15/208 10/2000 ShieldRVs-PT-040A-CTLFireability-2024-08 1556969 m, 138069 m/sec, 7347183 t fired, .
[[35mlola[0m][.] 76 EF STEQ 14/3539 0/5 ShieldRVs-PT-040A-CTLFireability-2024-02 sara not yet started (preprocessing).
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-040A-CTLFireability-2024-04: EF true findpath[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-040A-CTLFireability-2024-07: EF true state space[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-00: EG 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-040A-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 73 EG EXCL 5/288 6/2000 ShieldRVs-PT-040A-CTLFireability-2024-02 912415 m, 182483 m/sec, 1900885 t fired, .
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[[35mlola[0m][.] 73 EG EXCL 10/288 11/2000 ShieldRVs-PT-040A-CTLFireability-2024-02 1831974 m, 183911 m/sec, 3842329 t fired, .
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[[35mlola[0m][.] 73 EG EXCL 15/288 16/2000 ShieldRVs-PT-040A-CTLFireability-2024-02 2735541 m, 180713 m/sec, 5800634 t fired, .
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[[35mlola[0m][.] 73 EG EXCL 20/288 21/2000 ShieldRVs-PT-040A-CTLFireability-2024-02 3599200 m, 172731 m/sec, 7748407 t fired, .
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[[35mlola[0m][.] 73 EG EXCL 50/288 50/2000 ShieldRVs-PT-040A-CTLFireability-2024-02 8722701 m, 172231 m/sec, 19380694 t fired, .
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[[35mlola[0m][.] 73 EG EXCL 60/288 60/2000 ShieldRVs-PT-040A-CTLFireability-2024-02 10432881 m, 172681 m/sec, 23258951 t fired, .
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[[35mlola[0m][.] 73 EG EXCL 95/288 92/2000 ShieldRVs-PT-040A-CTLFireability-2024-02 16052599 m, 162501 m/sec, 36307537 t fired, .
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[[35mlola[0m][.] 73 EG EXCL 100/288 97/2000 ShieldRVs-PT-040A-CTLFireability-2024-02 16896642 m, 168808 m/sec, 38229995 t fired, .
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[[35mlola[0m][.] 73 EG EXCL 105/288 102/2000 ShieldRVs-PT-040A-CTLFireability-2024-02 17759896 m, 172650 m/sec, 40135644 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVs-PT-040A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ShieldRVs-PT-040A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r357-tall-171683764300834"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVs-PT-040A.tgz
mv ShieldRVs-PT-040A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;