About the Execution of LoLA for ShieldRVs-PT-010A
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 698969.00 | 0.00 | 0.00 | F?????F???FF???? | normal |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r357-tall-171683764200787.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ShieldRVs-PT-010A, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r357-tall-171683764200787
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 556K
-rw-r--r-- 1 mcc users 6.2K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.2K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K May 19 07:16 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 19 16:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 19 07:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 19 19:13 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 12 18:00 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 176K Apr 12 18:00 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.8K Apr 12 17:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 66K Apr 12 17:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:55 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:55 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 63K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-00
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-01
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-02
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-03
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-04
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-05
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-06
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-07
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-08
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-09
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-10
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-11
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-12
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-13
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-14
FORMULA_NAME ShieldRVs-PT-010A-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1717173752060
FORMULA ShieldRVs-PT-010A-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-010A-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-010A-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-010A-LTLCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717174451029
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLCardinality.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 27 (type CNST) for 26 ShieldRVs-PT-010A-LTLCardinality-06
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 27 (type CNST) for ShieldRVs-PT-010A-LTLCardinality-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 1 (type CNST) for 0 ShieldRVs-PT-010A-LTLCardinality-00
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 1 (type CNST) for ShieldRVs-PT-010A-LTLCardinality-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 42 (type EXCL) for 41 ShieldRVs-PT-010A-LTLCardinality-11
[[35mlola[0m][I] time limit : 162 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 42 (type EXCL) for ShieldRVs-PT-010A-LTLCardinality-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 246
[[35mlola[0m][I] fired transitions : 246
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 39 (type EXCL) for 38 ShieldRVs-PT-010A-LTLCardinality-10
[[35mlola[0m][I] time limit : 188 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 39 (type EXCL) for ShieldRVs-PT-010A-LTLCardinality-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 246
[[35mlola[0m][I] fired transitions : 246
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 6 ShieldRVs-PT-010A-LTLCardinality-02
[[35mlola[0m][I] time limit : 210 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 60 (type EQUN) for 13 ShieldRVs-PT-010A-LTLCardinality-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 65 (type EQUN) for 47 ShieldRVs-PT-010A-LTLCardinality-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 60 (type EQUN) for ShieldRVs-PT-010A-LTLCardinality-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 65 (type EQUN) for ShieldRVs-PT-010A-LTLCardinality-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 5/255 10/2000 ShieldRVs-PT-010A-LTLCardinality-02 1414477 m, 282895 m/sec, 3217436 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 10/255 19/2000 ShieldRVs-PT-010A-LTLCardinality-02 2947431 m, 306590 m/sec, 6246282 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 15/255 29/2000 ShieldRVs-PT-010A-LTLCardinality-02 4392859 m, 289085 m/sec, 9334914 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 20/255 38/2000 ShieldRVs-PT-010A-LTLCardinality-02 5809399 m, 283308 m/sec, 12344837 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 25/255 46/2000 ShieldRVs-PT-010A-LTLCardinality-02 7130691 m, 264258 m/sec, 15346174 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 46
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 30/255 56/2000 ShieldRVs-PT-010A-LTLCardinality-02 8649775 m, 303816 m/sec, 18253255 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 35/255 66/2000 ShieldRVs-PT-010A-LTLCardinality-02 10149473 m, 299939 m/sec, 21218166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 40/255 75/2000 ShieldRVs-PT-010A-LTLCardinality-02 11619328 m, 293971 m/sec, 24133453 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 45/255 86/2000 ShieldRVs-PT-010A-LTLCardinality-02 13265616 m, 329257 m/sec, 27010543 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 86
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 50/255 98/2000 ShieldRVs-PT-010A-LTLCardinality-02 15152858 m, 377448 m/sec, 29861835 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 55/255 110/2000 ShieldRVs-PT-010A-LTLCardinality-02 17016530 m, 372734 m/sec, 32659366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 60/255 122/2000 ShieldRVs-PT-010A-LTLCardinality-02 18888675 m, 374429 m/sec, 35411296 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 65/255 132/2000 ShieldRVs-PT-010A-LTLCardinality-02 20370759 m, 296416 m/sec, 38502975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 70/255 141/2000 ShieldRVs-PT-010A-LTLCardinality-02 21804203 m, 286688 m/sec, 41672075 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 75/255 151/2000 ShieldRVs-PT-010A-LTLCardinality-02 23301989 m, 299557 m/sec, 44721216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 80/255 160/2000 ShieldRVs-PT-010A-LTLCardinality-02 24779405 m, 295483 m/sec, 47936824 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 85/255 169/2000 ShieldRVs-PT-010A-LTLCardinality-02 26202592 m, 284637 m/sec, 50925885 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 90/255 178/2000 ShieldRVs-PT-010A-LTLCardinality-02 27618162 m, 283114 m/sec, 53875969 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 95/255 188/2000 ShieldRVs-PT-010A-LTLCardinality-02 29131775 m, 302722 m/sec, 56844486 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 100/255 198/2000 ShieldRVs-PT-010A-LTLCardinality-02 30664869 m, 306618 m/sec, 59701026 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 105/255 208/2000 ShieldRVs-PT-010A-LTLCardinality-02 32163339 m, 299694 m/sec, 62476058 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 110/255 217/2000 ShieldRVs-PT-010A-LTLCardinality-02 33701204 m, 307573 m/sec, 65352455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 217
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 115/255 228/2000 ShieldRVs-PT-010A-LTLCardinality-02 35278369 m, 315433 m/sec, 68239029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 120/255 238/2000 ShieldRVs-PT-010A-LTLCardinality-02 36837597 m, 311845 m/sec, 71068307 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 238
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 125/255 248/2000 ShieldRVs-PT-010A-LTLCardinality-02 38370936 m, 306667 m/sec, 73937939 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 248
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 130/255 258/2000 ShieldRVs-PT-010A-LTLCardinality-02 39922943 m, 310401 m/sec, 76756587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 135/255 268/2000 ShieldRVs-PT-010A-LTLCardinality-02 41493223 m, 314056 m/sec, 79468321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 268
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 140/255 278/2000 ShieldRVs-PT-010A-LTLCardinality-02 43001551 m, 301665 m/sec, 82360438 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 278
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 145/255 287/2000 ShieldRVs-PT-010A-LTLCardinality-02 44520735 m, 303836 m/sec, 85192108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 287
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 150/255 297/2000 ShieldRVs-PT-010A-LTLCardinality-02 46011088 m, 298070 m/sec, 88082428 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 297
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 155/255 306/2000 ShieldRVs-PT-010A-LTLCardinality-02 47474526 m, 292687 m/sec, 90976854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 306
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 160/255 316/2000 ShieldRVs-PT-010A-LTLCardinality-02 48952280 m, 295550 m/sec, 93800528 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 316
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 165/255 325/2000 ShieldRVs-PT-010A-LTLCardinality-02 50416705 m, 292885 m/sec, 96725348 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 325
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 170/255 335/2000 ShieldRVs-PT-010A-LTLCardinality-02 51917029 m, 300064 m/sec, 99643635 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 335
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 175/255 345/2000 ShieldRVs-PT-010A-LTLCardinality-02 53463139 m, 309222 m/sec, 102370871 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 345
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 180/255 355/2000 ShieldRVs-PT-010A-LTLCardinality-02 55109004 m, 329173 m/sec, 105476981 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 355
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 185/255 365/2000 ShieldRVs-PT-010A-LTLCardinality-02 56691137 m, 316426 m/sec, 108696321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 365
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 190/255 375/2000 ShieldRVs-PT-010A-LTLCardinality-02 58256146 m, 313001 m/sec, 111810494 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 375
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 195/255 385/2000 ShieldRVs-PT-010A-LTLCardinality-02 59778312 m, 304433 m/sec, 114761872 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 385
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 200/255 396/2000 ShieldRVs-PT-010A-LTLCardinality-02 61427443 m, 329826 m/sec, 117744325 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 396
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 205/255 406/2000 ShieldRVs-PT-010A-LTLCardinality-02 63014205 m, 317352 m/sec, 120598636 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 406
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 210/255 417/2000 ShieldRVs-PT-010A-LTLCardinality-02 64665809 m, 330320 m/sec, 123364459 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 417
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 215/255 428/2000 ShieldRVs-PT-010A-LTLCardinality-02 66358466 m, 338531 m/sec, 126218663 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 428
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 220/255 439/2000 ShieldRVs-PT-010A-LTLCardinality-02 68075336 m, 343374 m/sec, 129064217 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 439
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 225/255 449/2000 ShieldRVs-PT-010A-LTLCardinality-02 69748499 m, 334632 m/sec, 131866851 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 449
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 230/255 461/2000 ShieldRVs-PT-010A-LTLCardinality-02 71482832 m, 346866 m/sec, 134626503 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 461
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 235/255 472/2000 ShieldRVs-PT-010A-LTLCardinality-02 73185061 m, 340445 m/sec, 137354662 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 472
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 240/255 483/2000 ShieldRVs-PT-010A-LTLCardinality-02 74867252 m, 336438 m/sec, 140205476 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 483
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 245/255 493/2000 ShieldRVs-PT-010A-LTLCardinality-02 76538428 m, 334235 m/sec, 143087861 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 493
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 250/255 504/2000 ShieldRVs-PT-010A-LTLCardinality-02 78208828 m, 334080 m/sec, 145887383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 504
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 1 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 11 LTL EXCL 255/255 515/2000 ShieldRVs-PT-010A-LTLCardinality-02 79843617 m, 326957 m/sec, 148756644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 515
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 11 (type EXCL) for ShieldRVs-PT-010A-LTLCardinality-02 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 1 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 ShieldRVs-PT-010A-LTLCardinality-15
[[35mlola[0m][I] time limit : 255 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 6 ShieldRVs-PT-010A-LTLCardinality-02
[[35mlola[0m][I] time limit : 3320 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] CANCELED task # 11 (type EXCL) for ShieldRVs-PT-010A-LTLCardinality-02 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 5/255 6/2000 ShieldRVs-PT-010A-LTLCardinality-15 902388 m, 180477 m/sec, 7156359 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 10/255 11/2000 ShieldRVs-PT-010A-LTLCardinality-15 1688231 m, 157168 m/sec, 14252915 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 15/255 17/2000 ShieldRVs-PT-010A-LTLCardinality-15 2558780 m, 174109 m/sec, 21466439 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 20/255 22/2000 ShieldRVs-PT-010A-LTLCardinality-15 3362188 m, 160681 m/sec, 28619108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 25/255 27/2000 ShieldRVs-PT-010A-LTLCardinality-15 4099912 m, 147544 m/sec, 35696558 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 30/255 32/2000 ShieldRVs-PT-010A-LTLCardinality-15 4891039 m, 158225 m/sec, 42788423 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 35/255 37/2000 ShieldRVs-PT-010A-LTLCardinality-15 5615031 m, 144798 m/sec, 49824198 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 40/255 42/2000 ShieldRVs-PT-010A-LTLCardinality-15 6442233 m, 165440 m/sec, 56938551 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 45/255 48/2000 ShieldRVs-PT-010A-LTLCardinality-15 7227627 m, 157078 m/sec, 63967854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 50/255 53/2000 ShieldRVs-PT-010A-LTLCardinality-15 8030929 m, 160660 m/sec, 71081366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 55/255 58/2000 ShieldRVs-PT-010A-LTLCardinality-15 8857613 m, 165336 m/sec, 78159944 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 60/255 65/2000 ShieldRVs-PT-010A-LTLCardinality-15 9863077 m, 201092 m/sec, 85097181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 65/255 71/2000 ShieldRVs-PT-010A-LTLCardinality-15 10884202 m, 204225 m/sec, 92019608 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 70/255 77/2000 ShieldRVs-PT-010A-LTLCardinality-15 11792091 m, 181577 m/sec, 98671796 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 75/255 83/2000 ShieldRVs-PT-010A-LTLCardinality-15 12710471 m, 183676 m/sec, 105523064 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 80/255 89/2000 ShieldRVs-PT-010A-LTLCardinality-15 13632726 m, 184451 m/sec, 112106043 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 85/255 95/2000 ShieldRVs-PT-010A-LTLCardinality-15 14477574 m, 168969 m/sec, 118770970 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 90/255 100/2000 ShieldRVs-PT-010A-LTLCardinality-15 15267261 m, 157937 m/sec, 125221304 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 95/255 106/2000 ShieldRVs-PT-010A-LTLCardinality-15 16204773 m, 187502 m/sec, 132208480 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 100/255 112/2000 ShieldRVs-PT-010A-LTLCardinality-15 17108240 m, 180693 m/sec, 139183715 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 105/255 117/2000 ShieldRVs-PT-010A-LTLCardinality-15 17923451 m, 163042 m/sec, 145744249 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 110/255 122/2000 ShieldRVs-PT-010A-LTLCardinality-15 18750409 m, 165391 m/sec, 152269819 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 115/255 128/2000 ShieldRVs-PT-010A-LTLCardinality-15 19551876 m, 160293 m/sec, 158790446 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 120/255 133/2000 ShieldRVs-PT-010A-LTLCardinality-15 20365122 m, 162649 m/sec, 165144936 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 125/255 138/2000 ShieldRVs-PT-010A-LTLCardinality-15 21223360 m, 171647 m/sec, 171584533 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 130/255 143/2000 ShieldRVs-PT-010A-LTLCardinality-15 21988336 m, 152995 m/sec, 177834091 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 135/255 148/2000 ShieldRVs-PT-010A-LTLCardinality-15 22737251 m, 149783 m/sec, 183880846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 140/255 153/2000 ShieldRVs-PT-010A-LTLCardinality-15 23487607 m, 150071 m/sec, 190211677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 145/255 158/2000 ShieldRVs-PT-010A-LTLCardinality-15 24245718 m, 151622 m/sec, 196211717 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 150/255 163/2000 ShieldRVs-PT-010A-LTLCardinality-15 24964694 m, 143795 m/sec, 202301414 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 155/255 167/2000 ShieldRVs-PT-010A-LTLCardinality-15 25595263 m, 126113 m/sec, 208038888 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 160/255 171/2000 ShieldRVs-PT-010A-LTLCardinality-15 26254283 m, 131804 m/sec, 213617434 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 165/255 175/2000 ShieldRVs-PT-010A-LTLCardinality-15 26817701 m, 112683 m/sec, 218957176 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 170/255 179/2000 ShieldRVs-PT-010A-LTLCardinality-15 27447610 m, 125981 m/sec, 224506998 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 175/255 183/2000 ShieldRVs-PT-010A-LTLCardinality-15 28063968 m, 123271 m/sec, 230254648 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 180/255 187/2000 ShieldRVs-PT-010A-LTLCardinality-15 28673007 m, 121807 m/sec, 235837028 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 185/255 191/2000 ShieldRVs-PT-010A-LTLCardinality-15 29333104 m, 132019 m/sec, 241620886 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 190/255 196/2000 ShieldRVs-PT-010A-LTLCardinality-15 30031329 m, 139645 m/sec, 247521653 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 195/255 200/2000 ShieldRVs-PT-010A-LTLCardinality-15 30761864 m, 146107 m/sec, 253838061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 200/255 205/2000 ShieldRVs-PT-010A-LTLCardinality-15 31406332 m, 128893 m/sec, 259907982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 205/255 209/2000 ShieldRVs-PT-010A-LTLCardinality-15 32047213 m, 128176 m/sec, 265460403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 210/255 213/2000 ShieldRVs-PT-010A-LTLCardinality-15 32627646 m, 116086 m/sec, 271081683 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 215/255 217/2000 ShieldRVs-PT-010A-LTLCardinality-15 33273317 m, 129134 m/sec, 276680499 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 220/255 221/2000 ShieldRVs-PT-010A-LTLCardinality-15 33918716 m, 129079 m/sec, 282313839 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 225/255 225/2000 ShieldRVs-PT-010A-LTLCardinality-15 34575136 m, 131284 m/sec, 288408438 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 230/255 229/2000 ShieldRVs-PT-010A-LTLCardinality-15 35130979 m, 111168 m/sec, 293884676 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 235/255 233/2000 ShieldRVs-PT-010A-LTLCardinality-15 35740846 m, 121973 m/sec, 299625959 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 240/255 236/2000 ShieldRVs-PT-010A-LTLCardinality-15 36279000 m, 107630 m/sec, 305354495 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 245/255 241/2000 ShieldRVs-PT-010A-LTLCardinality-15 37086047 m, 161409 m/sec, 311725490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 250/255 246/2000 ShieldRVs-PT-010A-LTLCardinality-15 37787826 m, 140355 m/sec, 317634875 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 54 LTL EXCL 255/255 250/2000 ShieldRVs-PT-010A-LTLCardinality-15 38475501 m, 137535 m/sec, 323821905 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 54 (type EXCL) for ShieldRVs-PT-010A-LTLCardinality-15 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 ShieldRVs-PT-010A-LTLCardinality-14
[[35mlola[0m][I] time limit : 255 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 ShieldRVs-PT-010A-LTLCardinality-15
[[35mlola[0m][I] time limit : 3060 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] CANCELED task # 54 (type EXCL) for ShieldRVs-PT-010A-LTLCardinality-15 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 5/255 8/2000 ShieldRVs-PT-010A-LTLCardinality-14 1172077 m, 234415 m/sec, 7222611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 545 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 10/255 16/2000 ShieldRVs-PT-010A-LTLCardinality-14 2290433 m, 223671 m/sec, 14253363 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 550 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 15/255 24/2000 ShieldRVs-PT-010A-LTLCardinality-14 3525524 m, 247018 m/sec, 21481906 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 555 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 20/255 32/2000 ShieldRVs-PT-010A-LTLCardinality-14 4697054 m, 234306 m/sec, 28850672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 560 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 25/255 39/2000 ShieldRVs-PT-010A-LTLCardinality-14 5815119 m, 223613 m/sec, 36097960 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 565 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 30/255 46/2000 ShieldRVs-PT-010A-LTLCardinality-14 6890341 m, 215044 m/sec, 43320190 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 570 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 35/255 53/2000 ShieldRVs-PT-010A-LTLCardinality-14 7934009 m, 208733 m/sec, 50633514 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 575 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 40/255 59/2000 ShieldRVs-PT-010A-LTLCardinality-14 8950351 m, 203268 m/sec, 57733697 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 580 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 45/255 66/2000 ShieldRVs-PT-010A-LTLCardinality-14 9945037 m, 198937 m/sec, 64787231 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 585 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 50/255 72/2000 ShieldRVs-PT-010A-LTLCardinality-14 10952612 m, 201515 m/sec, 71951950 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 590 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 55/255 78/2000 ShieldRVs-PT-010A-LTLCardinality-14 11933091 m, 196095 m/sec, 79084825 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 595 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 60/255 86/2000 ShieldRVs-PT-010A-LTLCardinality-14 13032554 m, 219892 m/sec, 85851020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 600 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 65/255 92/2000 ShieldRVs-PT-010A-LTLCardinality-14 14064074 m, 206304 m/sec, 92499221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 605 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 70/255 99/2000 ShieldRVs-PT-010A-LTLCardinality-14 15054882 m, 198161 m/sec, 99453034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 610 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 75/255 105/2000 ShieldRVs-PT-010A-LTLCardinality-14 15999693 m, 188962 m/sec, 106504964 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 615 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 80/255 111/2000 ShieldRVs-PT-010A-LTLCardinality-14 16928569 m, 185775 m/sec, 113473560 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 620 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 85/255 117/2000 ShieldRVs-PT-010A-LTLCardinality-14 17928067 m, 199899 m/sec, 120212697 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 625 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 90/255 123/2000 ShieldRVs-PT-010A-LTLCardinality-14 18852211 m, 184828 m/sec, 126822594 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 630 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 95/255 129/2000 ShieldRVs-PT-010A-LTLCardinality-14 19780051 m, 185568 m/sec, 133679945 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 635 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 100/255 135/2000 ShieldRVs-PT-010A-LTLCardinality-14 20683044 m, 180598 m/sec, 140420050 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 640 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 105/255 141/2000 ShieldRVs-PT-010A-LTLCardinality-14 21585494 m, 180490 m/sec, 147046507 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 645 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 110/255 147/2000 ShieldRVs-PT-010A-LTLCardinality-14 22487284 m, 180358 m/sec, 153747626 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 650 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 115/255 153/2000 ShieldRVs-PT-010A-LTLCardinality-14 23405509 m, 183645 m/sec, 160442748 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 655 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 120/255 159/2000 ShieldRVs-PT-010A-LTLCardinality-14 24316497 m, 182197 m/sec, 167256071 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 660 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 125/255 165/2000 ShieldRVs-PT-010A-LTLCardinality-14 25230406 m, 182781 m/sec, 174206622 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 665 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 130/255 171/2000 ShieldRVs-PT-010A-LTLCardinality-14 26130640 m, 180046 m/sec, 181114290 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 670 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 135/255 176/2000 ShieldRVs-PT-010A-LTLCardinality-14 27032373 m, 180346 m/sec, 187799979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 675 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 140/255 182/2000 ShieldRVs-PT-010A-LTLCardinality-14 27921105 m, 177746 m/sec, 194604057 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 680 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 145/255 188/2000 ShieldRVs-PT-010A-LTLCardinality-14 28788462 m, 173471 m/sec, 201330514 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 685 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-00: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-06: INITIAL false preprocessing[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-10: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-010A-LTLCardinality-11: LTL false LTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-02: CONJ 0 1 0 0 2 0 1 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-03: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-09: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-13: F 0 1 0 0 2 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-010A-LTLCardinality-15: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 51 LTL EXCL 150/255 193/2000 ShieldRVs-PT-010A-LTLCardinality-14 29666213 m, 175550 m/sec, 208013401 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 690 secs. Pages in use: 525
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 397 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVs-PT-010A"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ShieldRVs-PT-010A, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r357-tall-171683764200787"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVs-PT-010A.tgz
mv ShieldRVs-PT-010A execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;