About the Execution of LoLA for ShieldRVs-PT-004A
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 14504.096 | 1979999.00 | 1994616.00 | 4626.30 | TT?TTTTFFTTF?TFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r357-tall-171683764100754.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ShieldRVs-PT-004A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r357-tall-171683764100754
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 7.5K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 88K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.9K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 23 07:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 07:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 23 07:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.1K Apr 12 17:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 98K Apr 12 17:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Apr 12 17:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Apr 12 17:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 25K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-00
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-01
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-02
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-03
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-04
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-05
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-06
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-07
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-08
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-09
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-10
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2024-11
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2023-12
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2023-13
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2023-14
FORMULA_NAME ShieldRVs-PT-004A-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717169572220
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2023-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ShieldRVs-PT-004A-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-01: CTL true CTL model checker[0m
[[35mlola[0m] [1m[33mShieldRVs-PT-004A-CTLFireability-2024-02: CTL unknown AGGR[0m
[[35mlola[0m] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-03: CONJ true CONJ[0m
[[35mlola[0m] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVs-PT-004A-CTLFireability-2024-07: CONJ false state space /EFEG[0m
[[35mlola[0m] [1m[31mShieldRVs-PT-004A-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVs-PT-004A-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m] [1m[33mShieldRVs-PT-004A-CTLFireability-2023-12: CTL unknown AGGR[0m
[[35mlola[0m] [1m[32mShieldRVs-PT-004A-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVs-PT-004A-CTLFireability-2023-14: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mShieldRVs-PT-004A-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 1979 secs. Pages in use: 421
BK_STOP 1717171552219
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 ShieldRVs-PT-004A-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 149 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 77 (type EQUN) for 9 ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 75 (type EQUN) for 9 ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 80 (type EQUN) for 9 ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 77 (type EQUN) for ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 85 (type EQUN) for 37 ShieldRVs-PT-004A-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 80 (type EQUN) for ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 87 (type EQUN) for 37 ShieldRVs-PT-004A-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 85 (type EQUN) for ShieldRVs-PT-004A-CTLFireability-2024-07
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 87 (type EQUN) for ShieldRVs-PT-004A-CTLFireability-2024-07
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 75 (type EQUN) for ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 35 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 108862
[[35mlola[0m][I] fired transitions : 511106
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 70 (type EXCL) for 9 ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 179 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 70 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 69 (type EXCL) for 9 ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 69 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 46
[[35mlola[0m][I] fired transitions : 45
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 66 (type EXCL) for 65 ShieldRVs-PT-004A-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 66 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2023-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 244332
[[35mlola[0m][I] fired transitions : 529923
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 63 (type EXCL) for 62 ShieldRVs-PT-004A-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 63 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2023-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 3865
[[35mlola[0m][I] fired transitions : 17705
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 60 (type EXCL) for 59 ShieldRVs-PT-004A-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 60 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 93958
[[35mlola[0m][I] fired transitions : 443717
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 54 (type EXCL) for 53 ShieldRVs-PT-004A-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 54 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 70
[[35mlola[0m][I] fired transitions : 71
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 48 (type EXCL) for 47 ShieldRVs-PT-004A-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 299 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 48 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 70
[[35mlola[0m][I] fired transitions : 73
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 45 (type EXCL) for 44 ShieldRVs-PT-004A-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 326 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 45 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2024-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 111544
[[35mlola[0m][I] fired transitions : 563371
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 ShieldRVs-PT-004A-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 359 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 179
[[35mlola[0m][I] fired transitions : 474
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 12 (type EXCL) for 9 ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 399 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 12 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 96475
[[35mlola[0m][I] fired transitions : 460016
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 ShieldRVs-PT-004A-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 449 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-03: CONJ true CONJ[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-004A-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-004A-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-004A-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-004A-CTLFireability-2023-14: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-004A-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-004A-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-004A-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-004A-CTLFireability-2024-02: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-004A-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-004A-CTLFireability-2024-07: CONJ 0 2 0 0 4 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-004A-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] ShieldRVs-PT-004A-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 CTL EXCL 3/449 4/2000 ShieldRVs-PT-004A-CTLFireability-2024-02 894930 m, 178986 m/sec, 5662025 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 8 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-03: CONJ true CONJ[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-004A-CTLFireability-2024-08: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-004A-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-004A-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mShieldRVs-PT-004A-CTLFireability-2023-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-004A-CTLFireability-2023-14: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mShieldRVs-PT-004A-CTLFireability-2023-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] ShieldRVs-PT-004A-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 57 CTL EXCL 771/784 384/2000 ShieldRVs-PT-004A-CTLFireability-2023-12 93240578 m, 111418 m/sec, 970786763 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 685/1170 402/2000 ShieldRVs-PT-004A-CTLFireability-2024-04 97701277 m, 134886 m/sec, 897746908 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 700/1170 410/2000 ShieldRVs-PT-004A-CTLFireability-2024-04 99686146 m, 131523 m/sec, 915728989 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 705/1170 413/2000 ShieldRVs-PT-004A-CTLFireability-2024-04 100329669 m, 128704 m/sec, 921673876 t fired, .
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[[35mlola[0m][.] 29 CTL EXCL 710/1170 415/2000 ShieldRVs-PT-004A-CTLFireability-2024-04 100974274 m, 128921 m/sec, 927610322 t fired, .
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[[35mlola[0m][I] markings : 102308440
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[[35mlola[0m][I] LAUNCH task # 51 (type EXCL) for 50 ShieldRVs-PT-004A-CTLFireability-2024-10
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[[35mlola[0m][I] FINISHED task # 51 (type EXCL) for ShieldRVs-PT-004A-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 73141
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========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVs-PT-004A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ShieldRVs-PT-004A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r357-tall-171683764100754"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVs-PT-004A.tgz
mv ShieldRVs-PT-004A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;