Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r355-tall-171683760101042.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool greatspnxred
Input is ShieldRVt-PT-100A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r355-tall-171683760101042
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 820K
-rw-r--r-- 1 mcc users 7.8K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:56 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 07:56 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 19 07:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 19 19:17 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Apr 12 11:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 185K Apr 12 11:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.6K Apr 12 08:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 85K Apr 12 08:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Apr 23 07:56 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:56 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 273K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-00
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-01
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-02
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-03
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-04
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-05
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-06
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-07
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-08
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-09
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-10
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2024-11
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2023-12
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2023-13
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2023-14
FORMULA_NAME ShieldRVt-PT-100A-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717090112070

Invoking MCC driver with
BK_TOOL=greatspnxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ShieldRVt-PT-100A
BK_MEMORY_CONFINEMENT=16384
Applying reductions before tool greatspn
Invoking reducer
Running Version 202405141337
[2024-05-30 17:28:33] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2024-05-30 17:28:33] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2024-05-30 17:28:33] [INFO ] Load time of PNML (sax parser for PT used): 129 ms
[2024-05-30 17:28:33] [INFO ] Transformed 803 places.
[2024-05-30 17:28:33] [INFO ] Transformed 803 transitions.
[2024-05-30 17:28:33] [INFO ] Found NUPN structural information;
[2024-05-30 17:28:33] [INFO ] Parsed PT model containing 803 places and 803 transitions and 3406 arcs in 246 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 14 ms.
Ensure Unique test removed 1 transitions
Reduce redundant transitions removed 1 transitions.
Support contains 182 out of 803 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Applied a total of 0 rules in 84 ms. Remains 803 /803 variables (removed 0) and now considering 802/802 (removed 0) transitions.
// Phase 1: matrix 802 rows 803 cols
[2024-05-30 17:28:33] [INFO ] Computed 401 invariants in 27 ms
[2024-05-30 17:28:34] [INFO ] Implicit Places using invariants in 582 ms returned []
[2024-05-30 17:28:34] [INFO ] Invariant cache hit.
[2024-05-30 17:28:35] [INFO ] Implicit Places using invariants and state equation in 765 ms returned []
Implicit Place search using SMT with State Equation took 1381 ms to find 0 implicit places.
Running 801 sub problems to find dead transitions.
[2024-05-30 17:28:35] [INFO ] Invariant cache hit.
At refinement iteration 0 (INCLUDED_ONLY) 0/802 variables, 802/802 constraints. Problems are: Problem set: 0 solved, 801 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/802 variables, 0/802 constraints. Problems are: Problem set: 0 solved, 801 unsolved
At refinement iteration 2 (OVERLAPS) 1/803 variables, 401/1203 constraints. Problems are: Problem set: 0 solved, 801 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/803 variables, 1/1204 constraints. Problems are: Problem set: 0 solved, 801 unsolved
Error getting values : (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Solver is answering 'unknown', stopping.
After SMT solving in domain Real declared 803/1605 variables, and 1204 constraints, problems are : Problem set: 0 solved, 801 unsolved in 30024 ms.
Refiners :[Domain max(s): 803/803 constraints, Positive P Invariants (semi-flows): 401/401 constraints, State Equation: 0/803 constraints, PredecessorRefiner: 801/801 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 801 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/802 variables, 802/802 constraints. Problems are: Problem set: 0 solved, 801 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/802 variables, 0/802 constraints. Problems are: Problem set: 0 solved, 801 unsolved
At refinement iteration 2 (OVERLAPS) 1/803 variables, 401/1203 constraints. Problems are: Problem set: 0 solved, 801 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/803 variables, 1/1204 constraints. Problems are: Problem set: 0 solved, 801 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/803 variables, 0/1204 constraints. Problems are: Problem set: 0 solved, 801 unsolved
At refinement iteration 5 (OVERLAPS) 802/1605 variables, 803/2007 constraints. Problems are: Problem set: 0 solved, 801 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/1605 variables, 801/2808 constraints. Problems are: Problem set: 0 solved, 801 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1605/1605 variables, and 2808 constraints, problems are : Problem set: 0 solved, 801 unsolved in 30025 ms.
Refiners :[Domain max(s): 803/803 constraints, Positive P Invariants (semi-flows): 401/401 constraints, State Equation: 803/803 constraints, PredecessorRefiner: 801/801 constraints, Known Traps: 0/0 constraints]
After SMT, in 60476ms problems are : Problem set: 0 solved, 801 unsolved
Search for dead transitions found 0 dead transitions in 60518ms
Finished structural reductions in LTL mode , in 1 iterations and 62008 ms. Remains : 803/803 places, 802/802 transitions.
Support contains 182 out of 803 places after structural reductions.
[2024-05-30 17:29:35] [INFO ] Flatten gal took : 161 ms
[2024-05-30 17:29:36] [INFO ] Flatten gal took : 77 ms
[2024-05-30 17:29:36] [INFO ] Input system was already deterministic with 802 transitions.
Support contains 171 out of 803 places (down from 182) after GAL structural reductions.
RANDOM walk for 40000 steps (8 resets) in 2962 ms. (13 steps per ms) remains 65/78 properties
BEST_FIRST walk for 4004 steps (8 resets) in 70 ms. (56 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 58 ms. (67 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 63 ms. (62 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 61 ms. (64 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4001 steps (8 resets) in 47 ms. (83 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 88 ms. (44 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 50 ms. (78 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 47 ms. (83 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 45 ms. (87 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 51 ms. (76 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 61 ms. (64 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 36 ms. (108 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 37 ms. (105 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 39 ms. (100 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 39 ms. (100 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 36 ms. (108 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 72 ms. (54 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 48 ms. (81 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 46 ms. (85 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 57 ms. (69 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 51 ms. (77 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 40 ms. (97 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 49 ms. (80 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 40 ms. (97 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 40 ms. (97 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 44 ms. (88 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 60 ms. (65 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 49 ms. (80 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 47 ms. (83 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 44 ms. (88 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 41 ms. (95 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 37 ms. (105 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 43 ms. (91 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 43 ms. (91 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 40 ms. (97 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 45 ms. (87 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 39 ms. (100 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 38 ms. (102 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 37 ms. (105 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 35 ms. (111 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 33 ms. (117 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 47 ms. (83 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 35 ms. (111 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 33 ms. (117 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 36 ms. (108 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 32 ms. (121 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 39 ms. (100 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4001 steps (8 resets) in 43 ms. (90 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 35 ms. (111 steps per ms) remains 65/65 properties
BEST_FIRST walk for 4003 steps (8 resets) in 36 ms. (108 steps per ms) remains 65/65 properties
[2024-05-30 17:29:38] [INFO ] Invariant cache hit.
All remaining problems are real, not stopping.
At refinement iteration 0 (INCLUDED_ONLY) 0/148 variables, 148/148 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/148 variables, 0/148 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 2 (OVERLAPS) 119/267 variables, 133/281 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/267 variables, 119/400 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/267 variables, 0/400 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 5 (OVERLAPS) 536/803 variables, 268/668 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/803 variables, 536/1204 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/803 variables, 0/1204 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 8 (OVERLAPS) 802/1605 variables, 803/2007 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/1605 variables, 0/2007 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 10 (OVERLAPS) 0/1605 variables, 0/2007 constraints. Problems are: Problem set: 0 solved, 65 unsolved
No progress, stopping.
After SMT solving in domain Real declared 1605/1605 variables, and 2007 constraints, problems are : Problem set: 0 solved, 65 unsolved in 5024 ms.
Refiners :[Domain max(s): 803/803 constraints, Positive P Invariants (semi-flows): 401/401 constraints, State Equation: 803/803 constraints, PredecessorRefiner: 65/65 constraints, Known Traps: 0/0 constraints]
Escalating to Integer solving :Problem set: 0 solved, 65 unsolved
At refinement iteration 0 (INCLUDED_ONLY) 0/148 variables, 148/148 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 1 (INCLUDED_ONLY) 0/148 variables, 0/148 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 2 (OVERLAPS) 119/267 variables, 133/281 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 3 (INCLUDED_ONLY) 0/267 variables, 119/400 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 4 (INCLUDED_ONLY) 0/267 variables, 0/400 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 5 (OVERLAPS) 536/803 variables, 268/668 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 6 (INCLUDED_ONLY) 0/803 variables, 536/1204 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 7 (INCLUDED_ONLY) 0/803 variables, 0/1204 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 8 (OVERLAPS) 802/1605 variables, 803/2007 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 9 (INCLUDED_ONLY) 0/1605 variables, 65/2072 constraints. Problems are: Problem set: 0 solved, 65 unsolved
At refinement iteration 10 (INCLUDED_ONLY) 0/1605 variables, 0/2072 constraints. Problems are: Problem set: 0 solved, 65 unsolved
Solver is answering 'unknown', stopping.
After SMT solving in domain Int declared 1605/1605 variables, and 2072 constraints, problems are : Problem set: 0 solved, 65 unsolved in 5013 ms.
Refiners :[Domain max(s): 803/803 constraints, Positive P Invariants (semi-flows): 401/401 constraints, State Equation: 803/803 constraints, PredecessorRefiner: 65/65 constraints, Known Traps: 0/0 constraints]
After SMT, in 10077ms problems are : Problem set: 0 solved, 65 unsolved
Skipping Parikh replay, no witness traces provided.
Support contains 148 out of 803 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 803/803 places, 802/802 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 802 transition count 801
Partial Free-agglomeration rule applied 72 times.
Drop transitions (Partial Free agglomeration) removed 72 transitions
Iterating global reduction 0 with 72 rules applied. Total rules applied 74 place count 802 transition count 801
Drop transitions (Redundant composition of simpler transitions.) removed 72 transitions
Redundant transition composition rules discarded 72 transitions
Iterating global reduction 0 with 72 rules applied. Total rules applied 146 place count 802 transition count 729
Applied a total of 146 rules in 230 ms. Remains 802 /803 variables (removed 1) and now considering 729/802 (removed 73) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 230 ms. Remains : 802/803 places, 729/802 transitions.
RANDOM walk for 40000 steps (8 resets) in 963 ms. (41 steps per ms) remains 63/65 properties
BEST_FIRST walk for 4004 steps (8 resets) in 56 ms. (70 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 45 ms. (87 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4002 steps (8 resets) in 36 ms. (108 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 37 ms. (105 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 36 ms. (108 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 49 ms. (80 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 39 ms. (100 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 42 ms. (93 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 48 ms. (81 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 45 ms. (87 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 37 ms. (105 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 40 ms. (97 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 37 ms. (105 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 37 ms. (105 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 49 ms. (80 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 41 ms. (95 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 38 ms. (102 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 38 ms. (102 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 47 ms. (83 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 44 ms. (88 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 38 ms. (102 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 37 ms. (105 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 46 ms. (85 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 44 ms. (88 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 37 ms. (105 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 48 ms. (81 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 42 ms. (93 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 55 ms. (71 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 49 ms. (80 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 42 ms. (93 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 44 ms. (88 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 38 ms. (102 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4001 steps (8 resets) in 35 ms. (111 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 38 ms. (102 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 38 ms. (102 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 36 ms. (108 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 35 ms. (111 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 38 ms. (102 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4002 steps (8 resets) in 37 ms. (105 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 45 ms. (87 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4002 steps (8 resets) in 39 ms. (100 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4002 steps (8 resets) in 39 ms. (100 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 35 ms. (111 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 38 ms. (102 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 38 ms. (102 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 58 ms. (67 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4003 steps (8 resets) in 43 ms. (90 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 39 ms. (100 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 42 ms. (93 steps per ms) remains 63/63 properties
BEST_FIRST walk for 4004 steps (8 resets) in 44 ms. (88 steps per ms) remains 63/63 properties
Finished probabilistic random walk after 111825 steps, run visited all 63 properties in 2293 ms. (steps per millisecond=48 )
Probabilistic random walk after 111825 steps, saw 110780 distinct states, run finished after 2297 ms. (steps per millisecond=48 ) properties seen :63
[2024-05-30 17:29:51] [INFO ] Flatten gal took : 64 ms
[2024-05-30 17:29:51] [INFO ] Flatten gal took : 50 ms
[2024-05-30 17:29:52] [INFO ] Input system was already deterministic with 802 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Applied a total of 0 rules in 22 ms. Remains 803 /803 variables (removed 0) and now considering 802/802 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 803/803 places, 802/802 transitions.
[2024-05-30 17:29:52] [INFO ] Flatten gal took : 53 ms
[2024-05-30 17:29:52] [INFO ] Flatten gal took : 45 ms
[2024-05-30 17:29:52] [INFO ] Input system was already deterministic with 802 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 2 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 802 transition count 801
Applied a total of 2 rules in 58 ms. Remains 802 /803 variables (removed 1) and now considering 801/802 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 59 ms. Remains : 802/803 places, 801/802 transitions.
[2024-05-30 17:29:52] [INFO ] Flatten gal took : 43 ms
[2024-05-30 17:29:52] [INFO ] Flatten gal took : 44 ms
[2024-05-30 17:29:52] [INFO ] Input system was already deterministic with 801 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 802 transition count 801
Applied a total of 2 rules in 48 ms. Remains 802 /803 variables (removed 1) and now considering 801/802 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 48 ms. Remains : 802/803 places, 801/802 transitions.
[2024-05-30 17:29:52] [INFO ] Flatten gal took : 41 ms
[2024-05-30 17:29:52] [INFO ] Flatten gal took : 37 ms
[2024-05-30 17:29:52] [INFO ] Input system was already deterministic with 801 transitions.
Starting structural reductions in LTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Applied a total of 0 rules in 13 ms. Remains 803 /803 variables (removed 0) and now considering 802/802 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 803/803 places, 802/802 transitions.
[2024-05-30 17:29:52] [INFO ] Flatten gal took : 35 ms
[2024-05-30 17:29:52] [INFO ] Flatten gal took : 37 ms
[2024-05-30 17:29:52] [INFO ] Input system was already deterministic with 802 transitions.
Starting structural reductions in LTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Applied a total of 0 rules in 13 ms. Remains 803 /803 variables (removed 0) and now considering 802/802 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 803/803 places, 802/802 transitions.
[2024-05-30 17:29:52] [INFO ] Flatten gal took : 35 ms
[2024-05-30 17:29:52] [INFO ] Flatten gal took : 38 ms
[2024-05-30 17:29:53] [INFO ] Input system was already deterministic with 802 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 802 transition count 801
Applied a total of 2 rules in 49 ms. Remains 802 /803 variables (removed 1) and now considering 801/802 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 49 ms. Remains : 802/803 places, 801/802 transitions.
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 39 ms
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 42 ms
[2024-05-30 17:29:53] [INFO ] Input system was already deterministic with 801 transitions.
Starting structural reductions in LTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Applied a total of 0 rules in 13 ms. Remains 803 /803 variables (removed 0) and now considering 802/802 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 803/803 places, 802/802 transitions.
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 34 ms
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 35 ms
[2024-05-30 17:29:53] [INFO ] Input system was already deterministic with 802 transitions.
Starting structural reductions in LTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Applied a total of 0 rules in 12 ms. Remains 803 /803 variables (removed 0) and now considering 802/802 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 803/803 places, 802/802 transitions.
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 34 ms
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 38 ms
[2024-05-30 17:29:53] [INFO ] Input system was already deterministic with 802 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 802 transition count 801
Applied a total of 2 rules in 38 ms. Remains 802 /803 variables (removed 1) and now considering 801/802 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 38 ms. Remains : 802/803 places, 801/802 transitions.
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 33 ms
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 36 ms
[2024-05-30 17:29:53] [INFO ] Input system was already deterministic with 801 transitions.
Starting structural reductions in LTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Applied a total of 0 rules in 14 ms. Remains 803 /803 variables (removed 0) and now considering 802/802 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 14 ms. Remains : 803/803 places, 802/802 transitions.
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 34 ms
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 36 ms
[2024-05-30 17:29:53] [INFO ] Input system was already deterministic with 802 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 802 transition count 801
Applied a total of 2 rules in 39 ms. Remains 802 /803 variables (removed 1) and now considering 801/802 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 39 ms. Remains : 802/803 places, 801/802 transitions.
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 32 ms
[2024-05-30 17:29:53] [INFO ] Flatten gal took : 33 ms
[2024-05-30 17:29:53] [INFO ] Input system was already deterministic with 801 transitions.
Starting structural reductions in LTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Applied a total of 0 rules in 12 ms. Remains 803 /803 variables (removed 0) and now considering 802/802 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 803/803 places, 802/802 transitions.
[2024-05-30 17:29:54] [INFO ] Flatten gal took : 32 ms
[2024-05-30 17:29:54] [INFO ] Flatten gal took : 33 ms
[2024-05-30 17:29:54] [INFO ] Input system was already deterministic with 802 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 802 transition count 801
Applied a total of 2 rules in 37 ms. Remains 802 /803 variables (removed 1) and now considering 801/802 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 802/803 places, 801/802 transitions.
[2024-05-30 17:29:54] [INFO ] Flatten gal took : 36 ms
[2024-05-30 17:29:54] [INFO ] Flatten gal took : 33 ms
[2024-05-30 17:29:54] [INFO ] Input system was already deterministic with 801 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 802 transition count 801
Applied a total of 2 rules in 38 ms. Remains 802 /803 variables (removed 1) and now considering 801/802 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 38 ms. Remains : 802/803 places, 801/802 transitions.
[2024-05-30 17:29:54] [INFO ] Flatten gal took : 31 ms
[2024-05-30 17:29:54] [INFO ] Flatten gal took : 33 ms
[2024-05-30 17:29:54] [INFO ] Input system was already deterministic with 801 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 802 transition count 801
Applied a total of 2 rules in 36 ms. Remains 802 /803 variables (removed 1) and now considering 801/802 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 802/803 places, 801/802 transitions.
[2024-05-30 17:29:54] [INFO ] Flatten gal took : 31 ms
[2024-05-30 17:29:54] [INFO ] Flatten gal took : 33 ms
[2024-05-30 17:29:54] [INFO ] Input system was already deterministic with 801 transitions.
RANDOM walk for 40000 steps (8 resets) in 441 ms. (90 steps per ms) remains 1/1 properties
BEST_FIRST walk for 40003 steps (8 resets) in 253 ms. (157 steps per ms) remains 1/1 properties
Finished probabilistic random walk after 23820 steps, run visited all 1 properties in 235 ms. (steps per millisecond=101 )
Probabilistic random walk after 23820 steps, saw 22992 distinct states, run finished after 236 ms. (steps per millisecond=100 ) properties seen :1
FORMULA ShieldRVt-PT-100A-CTLFireability-2023-14 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 803/803 places, 802/802 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 802 transition count 801
Applied a total of 2 rules in 35 ms. Remains 802 /803 variables (removed 1) and now considering 801/802 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 35 ms. Remains : 802/803 places, 801/802 transitions.
[2024-05-30 17:29:55] [INFO ] Flatten gal took : 31 ms
[2024-05-30 17:29:55] [INFO ] Flatten gal took : 33 ms
[2024-05-30 17:29:55] [INFO ] Input system was already deterministic with 801 transitions.
RANDOM walk for 40000 steps (8 resets) in 479 ms. (83 steps per ms) remains 1/1 properties
BEST_FIRST walk for 40004 steps (8 resets) in 279 ms. (142 steps per ms) remains 1/1 properties
Finished probabilistic random walk after 30694 steps, run visited all 1 properties in 296 ms. (steps per millisecond=103 )
Probabilistic random walk after 30694 steps, saw 29805 distinct states, run finished after 297 ms. (steps per millisecond=103 ) properties seen :1
FORMULA ShieldRVt-PT-100A-CTLFireability-2023-15 TRUE TECHNIQUES TOPOLOGICAL PROBABILISTIC_WALK
[2024-05-30 17:29:55] [INFO ] Flatten gal took : 33 ms
[2024-05-30 17:29:55] [INFO ] Flatten gal took : 34 ms
[2024-05-30 17:29:55] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2024-05-30 17:29:55] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 803 places, 802 transitions and 3404 arcs took 6 ms.
Total runtime 82512 ms.
There are residual formulas that ITS could not solve within timeout
----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2023
----------------------------------------------------------------------

Running ShieldRVt-PT-100A

IS_COLORED=
IS_NUPN=

LOADING PETRI NET FILE /home/mcc/execution/411/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 803
TRANSITIONS: 802
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.021s, Sys 0.000s]


SAVING FILE /home/mcc/execution/411/model (.net / .def) ...
EXPORT TIME: [User 0.003s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2022, University of Torino, Italy.
website: https://github.com/greatspn/SOURCES

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 560
MODEL NAME: /home/mcc/execution/411/model
803 places, 802 transitions.

Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Creating all event NSFs..
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Split: SplitSubtract
Start RS construction.
Building monolithic NSF...
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-02 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-01 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-00 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-03 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-05 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-10 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2023-12 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2023-13 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-11 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA ShieldRVt-PT-100A-CTLFireability-2024-07 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1717090206673

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202405141337.jar
+ VERSION=202405141337
+ echo 'Running Version 202405141337'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVt-PT-100A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="greatspnxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool greatspnxred"
echo " Input is ShieldRVt-PT-100A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r355-tall-171683760101042"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVt-PT-100A.tgz
mv ShieldRVt-PT-100A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;