About the Execution of LoLA for SharedMemory-PT-000010
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 1407.312 | 161586.00 | 165485.00 | 412.90 | FFFTTFFFTFFFTFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r335-tall-171679082900818.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SharedMemory-PT-000010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r335-tall-171679082900818
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.9M
-rw-r--r-- 1 mcc users 31K Apr 12 15:18 CTLCardinality.txt
-rw-r--r-- 1 mcc users 161K Apr 12 15:18 CTLCardinality.xml
-rw-r--r-- 1 mcc users 58K Apr 12 15:07 CTLFireability.txt
-rw-r--r-- 1 mcc users 263K Apr 12 15:07 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 15K Apr 23 07:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 57K Apr 23 07:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 29K Apr 23 07:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 98K Apr 23 07:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 62K Apr 12 15:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 310K Apr 12 15:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110K Apr 12 15:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 487K Apr 12 15:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.1K Apr 23 07:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 9.2K Apr 23 07:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 7 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 104K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-00
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-01
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-02
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-03
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-04
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-05
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-06
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-07
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-08
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-09
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-10
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-11
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-12
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-13
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-14
FORMULA_NAME SharedMemory-PT-000010-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717139814145
FORMULA SharedMemory-PT-000010-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000010-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-01: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-03: AGAF true state space /EFEG[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-06: AGEFAG false tscc_search[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-10: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-11: EFAG false tscc_search[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-12: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-14: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 161 secs. Pages in use: 9
BK_STOP 1717139975731
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 SharedMemory-PT-000010-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 138 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 52 (type EQUN) for 33 SharedMemory-PT-000010-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 54 (type EQUN) for 33 SharedMemory-PT-000010-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 54 (type EQUN) for SharedMemory-PT-000010-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 59 (type EQUN) for 9 SharedMemory-PT-000010-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 61 (type EQUN) for 9 SharedMemory-PT-000010-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 52 (type EQUN) for SharedMemory-PT-000010-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 66 (type EQUN) for 18 SharedMemory-PT-000010-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 61 (type EQUN) for SharedMemory-PT-000010-CTLFireability-2024-03
[[35mlola[0m][I] result : true
[[35mlola[0m][I] LAUNCH task # 68 (type EQUN) for 18 SharedMemory-PT-000010-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 68 (type EQUN) for SharedMemory-PT-000010-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 59 (type EQUN) for SharedMemory-PT-000010-CTLFireability-2024-03
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 66 (type EQUN) for SharedMemory-PT-000010-CTLFireability-2024-06
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] FINISHED task # 7 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 412867
[[35mlola[0m][I] fired transitions : 1941076
[[35mlola[0m][I] time used : 3
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 SharedMemory-PT-000010-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-03: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-06: AGEFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 2/239 3/2000 SharedMemory-PT-000010-CTLFireability-2024-15 590500 m, 118100 m/sec, 2376244 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-03: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-06: AGEFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 46 CTL EXCL 7/239 8/2000 SharedMemory-PT-000010-CTLFireability-2024-15 1584336 m, 198767 m/sec, 7837236 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1830519
[[35mlola[0m][I] fired transitions : 8878608
[[35mlola[0m][I] time used : 8
[[35mlola[0m][I] memory pages used : 9
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 SharedMemory-PT-000010-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 36
[[35mlola[0m][I] fired transitions : 94
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 SharedMemory-PT-000010-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
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[[35mlola[0m][.] 40 CTL EXCL 4/276 3/2000 SharedMemory-PT-000010-CTLFireability-2024-13 607766 m, 121553 m/sec, 3929732 t fired, .
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[[35mlola[0m][.] 40 CTL EXCL 9/276 6/2000 SharedMemory-PT-000010-CTLFireability-2024-13 1161688 m, 110784 m/sec, 9066528 t fired, .
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[[35mlola[0m][.] 40 CTL EXCL 14/276 8/2000 SharedMemory-PT-000010-CTLFireability-2024-13 1646799 m, 97022 m/sec, 14107612 t fired, .
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 40 CTL EXCL 19/276 9/2000 SharedMemory-PT-000010-CTLFireability-2024-13 1830501 m, 36740 m/sec, 17703242 t fired, .
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[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-13
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1830519
[[35mlola[0m][I] fired transitions : 19486189
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[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 SharedMemory-PT-000010-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 297 sec
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[[35mlola[0m][.] 37 CTL EXCL 3/297 3/2000 SharedMemory-PT-000010-CTLFireability-2024-12 488241 m, 97648 m/sec, 2971593 t fired, .
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 37 CTL EXCL 8/297 5/2000 SharedMemory-PT-000010-CTLFireability-2024-12 1058638 m, 114079 m/sec, 7975202 t fired, .
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-03: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-06: AGEFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] 37 CTL EXCL 13/297 7/2000 SharedMemory-PT-000010-CTLFireability-2024-12 1498225 m, 87917 m/sec, 12434621 t fired, .
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-03: AGAF 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-06: AGEFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-12: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
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[[35mlola[0m][.] 37 CTL EXCL 18/297 9/2000 SharedMemory-PT-000010-CTLFireability-2024-12 1806173 m, 61589 m/sec, 16409340 t fired, .
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[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1830519
[[35mlola[0m][I] fired transitions : 19495339
[[35mlola[0m][I] time used : 22
[[35mlola[0m][I] memory pages used : 9
[[35mlola[0m][I] LAUNCH task # 28 (type EXCL) for 27 SharedMemory-PT-000010-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 322 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-03: AGAF 0 1 0 0 3 0 0 0
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-06: AGEFAG 0 1 0 0 3 0 0 0
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[[35mlola[0m][.]
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[[35mlola[0m][.] 25 CTL EXCL 11/351 5/2000 SharedMemory-PT-000010-CTLFireability-2024-08 963545 m, 86268 m/sec, 9618488 t fired, .
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[[35mlola[0m][.] 25 CTL EXCL 16/351 7/2000 SharedMemory-PT-000010-CTLFireability-2024-08 1336735 m, 74638 m/sec, 14403032 t fired, .
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[[35mlola[0m][.]
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[[35mlola[0m][.] 25 CTL EXCL 21/351 8/2000 SharedMemory-PT-000010-CTLFireability-2024-08 1668822 m, 66417 m/sec, 19029150 t fired, .
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[[35mlola[0m][.]
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[[35mlola[0m][.] 25 CTL EXCL 26/351 9/2000 SharedMemory-PT-000010-CTLFireability-2024-08 1830493 m, 32334 m/sec, 22560649 t fired, .
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[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1830519
[[35mlola[0m][I] fired transitions : 24638627
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[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 SharedMemory-PT-000010-CTLFireability-2024-07
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[[35mlola[0m][.] 22 CTL EXCL 2/386 2/2000 SharedMemory-PT-000010-CTLFireability-2024-07 348688 m, 69737 m/sec, 2587504 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 7/386 5/2000 SharedMemory-PT-000010-CTLFireability-2024-07 901666 m, 110595 m/sec, 8203312 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 12/386 7/2000 SharedMemory-PT-000010-CTLFireability-2024-07 1351536 m, 89974 m/sec, 13560478 t fired, .
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[[35mlola[0m][.] 22 CTL EXCL 17/386 8/2000 SharedMemory-PT-000010-CTLFireability-2024-07 1720026 m, 73698 m/sec, 18394749 t fired, .
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[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-11: EFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 22 CTL EXCL 22/386 9/2000 SharedMemory-PT-000010-CTLFireability-2024-07 1830513 m, 22097 m/sec, 21960344 t fired, .
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[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1830519
[[35mlola[0m][I] fired transitions : 23089287
[[35mlola[0m][I] time used : 23
[[35mlola[0m][I] memory pages used : 9
[[35mlola[0m][I] LAUNCH task # 16 (type EXCL) for 15 SharedMemory-PT-000010-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 432 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 16 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-05
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 29
[[35mlola[0m][I] fired transitions : 65
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 SharedMemory-PT-000010-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 494 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-04
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 406
[[35mlola[0m][I] fired transitions : 1020
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 SharedMemory-PT-000010-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 576 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 43
[[35mlola[0m][I] fired transitions : 122
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 SharedMemory-PT-000010-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 691 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-00
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 103754
[[35mlola[0m][I] fired transitions : 485426
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 33 SharedMemory-PT-000010-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 864 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-14: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-03: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-06: AGEFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-11: EFAG 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 AGEF EXCL 3/864 2/2000 SharedMemory-PT-000010-CTLFireability-2024-11 434064 m, 86812 m/sec, 1391887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-14: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-03: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-06: AGEFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-11: EFAG 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 AGEF EXCL 8/864 5/2000 SharedMemory-PT-000010-CTLFireability-2024-11 1031002 m, 119387 m/sec, 4071251 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-14: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-03: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-06: AGEFAG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-11: EFAG 0 0 1 0 3 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 AGEF EXCL 13/864 7/2000 SharedMemory-PT-000010-CTLFireability-2024-11 1540140 m, 101827 m/sec, 6702038 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 49 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1825416
[[35mlola[0m][I] fired transitions : 9206541
[[35mlola[0m][I] time used : 18
[[35mlola[0m][I] memory pages used : 8
[[35mlola[0m][I] LAUNCH task # 63 (type EXCL) for 18 SharedMemory-PT-000010-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 1146 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-00: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-01: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-05: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-11: EFAG false tscc_search[0m
[[35mlola[0m][.] [1m[32mSharedMemory-PT-000010-CTLFireability-2024-12: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-13: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-14: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mSharedMemory-PT-000010-CTLFireability-2024-15: CTL false CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-03: AGAF 0 1 0 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-06: AGEFAG 0 0 1 0 3 0 0 0
[[35mlola[0m][.] SharedMemory-PT-000010-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 63 EFAGEF EXCL 0/1146 1/2000 SharedMemory-PT-000010-CTLFireability-2024-06 201905 m, 40381 m/sec, 526860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] FINISHED task # 63 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 236553
[[35mlola[0m][I] fired transitions : 660489
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 9 SharedMemory-PT-000010-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 1720 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 56 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 237055
[[35mlola[0m][I] fired transitions : 707582
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 2
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 SharedMemory-PT-000010-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 3439 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for SharedMemory-PT-000010-CTLFireability-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 13824
[[35mlola[0m][I] fired transitions : 300331
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SharedMemory-PT-000010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r335-tall-171679082900818"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000010.tgz
mv SharedMemory-PT-000010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;