About the Execution of LoLA for SharedMemory-PT-000005
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 92.823 | 380.00 | 110.00 | 0.00 | TFTFFTFFTTTTFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r335-tall-171679082900810.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is SharedMemory-PT-000005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r335-tall-171679082900810
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 784K
-rw-r--r-- 1 mcc users 13K Apr 12 15:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 94K Apr 12 15:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 19K Apr 12 15:06 CTLFireability.txt
-rw-r--r-- 1 mcc users 97K Apr 12 15:06 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 8.5K Apr 23 07:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 39K Apr 23 07:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 23 07:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 42K Apr 23 07:51 LTLFireability.xml
-rw-r--r-- 1 mcc users 22K Apr 12 15:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 149K Apr 12 15:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 22K Apr 12 15:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 119K Apr 12 15:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.7K Apr 23 07:51 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.0K Apr 23 07:51 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 7 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 83K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-00
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-01
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-02
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-03
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-04
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-05
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-06
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-07
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-08
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-09
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-10
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-11
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-12
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-13
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-14
FORMULA_NAME SharedMemory-PT-000005-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717139482120
FORMULA SharedMemory-PT-000005-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SharedMemory-PT-000005-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000005-CTLFireability-2024-00: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000005-CTLFireability-2024-01: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000005-CTLFireability-2024-02: DISJ true CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000005-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000005-CTLFireability-2024-04: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000005-CTLFireability-2024-05: EG true state space / EG[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000005-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000005-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000005-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000005-CTLFireability-2024-09: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000005-CTLFireability-2024-10: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000005-CTLFireability-2024-11: DISJ true CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000005-CTLFireability-2024-12: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mSharedMemory-PT-000005-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000005-CTLFireability-2024-14: SP ACTL false LTL model checker[0m
[[35mlola[0m] [1m[31mSharedMemory-PT-000005-CTLFireability-2024-15: AGAF false state space /EFEG[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 0 secs. Pages in use: 1
BK_STOP 1717139482500
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 6 SharedMemory-PT-000005-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 116 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 17 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 51
[[35mlola[0m][I] fired transitions : 151
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 42 SharedMemory-PT-000005-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 133 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-10
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 28
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 37 (type EXCL) for 36 SharedMemory-PT-000005-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 144 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 37 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 8
[[35mlola[0m][I] fired transitions : 19
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[*** LOG ERROR #0001 ***] [2024-05-31 07:11:22] [status_logger] string pointer is null
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 SharedMemory-PT-000005-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 156 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 1 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-00
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 6
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 25 (type EXCL) for 24 SharedMemory-PT-000005-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 25 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 6
[[35mlola[0m][I] fired transitions : 5
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 30 SharedMemory-PT-000005-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-06
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 11
[[35mlola[0m][I] fired transitions : 11
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 56 (type EXCL) for 55 SharedMemory-PT-000005-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 72 (type EQUN) for 27 SharedMemory-PT-000005-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 56 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 73
[[35mlola[0m][I] fired transitions : 136
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 40 (type EXCL) for 39 SharedMemory-PT-000005-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 257 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 40 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-09
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 34 (type EXCL) for 33 SharedMemory-PT-000005-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 276 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 34 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 45 SharedMemory-PT-000005-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 300 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 78 (type EQUN) for 61 SharedMemory-PT-000005-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 80 (type EQUN) for 61 SharedMemory-PT-000005-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 50 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] fired transitions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 75 (type EXCL) for 61 SharedMemory-PT-000005-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 400 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 78 (type EQUN) for SharedMemory-PT-000005-CTLFireability-2024-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 75 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 7
[[35mlola[0m][I] fired transitions : 7
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][W] CANCELED task # 80 (type EQUN) for SharedMemory-PT-000005-CTLFireability-2024-15 (obsolete)
[[35mlola[0m][I] LAUNCH task # 53 (type EXCL) for 52 SharedMemory-PT-000005-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 600 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 53 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-12
[[35mlola[0m][I] result : false
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 69 (type EXCL) for 27 SharedMemory-PT-000005-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 900 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 72 (type EQUN) for SharedMemory-PT-000005-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 69 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-05
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 2
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] FINISHED task # 80 (type EQUN) for SharedMemory-PT-000005-CTLFireability-2024-15
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] LAUNCH task # 73 (type EXCL) for 58 SharedMemory-PT-000005-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 1200 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 73 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-14
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 173
[[35mlola[0m][I] fired transitions : 361
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 22 (type EXCL) for 21 SharedMemory-PT-000005-CTLFireability-2024-03
[[35mlola[0m][I] time limit : 1800 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 22 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-03
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 SharedMemory-PT-000005-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 3600 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for SharedMemory-PT-000005-CTLFireability-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 1863
[[35mlola[0m][I] fired transitions : 12315
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is SharedMemory-PT-000005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r335-tall-171679082900810"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000005.tgz
mv SharedMemory-PT-000005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;