fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r313-tall-171662341400882
Last Updated
July 7, 2024

About the Execution of LoLA for ResAllocation-PT-R100C002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
0.000 1542732.00 0.00 0.00 ?F?????????????? normal

Execution Chart

Sorry, for this execution, no execution chart could be reported.

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r313-tall-171662341400882.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ResAllocation-PT-R100C002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r313-tall-171662341400882
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 896K
-rw-r--r-- 1 mcc users 9.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 100K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K May 19 07:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 19 16:23 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 23 07:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 23 07:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Apr 11 23:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 97K Apr 11 23:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.4K Apr 11 23:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 78K Apr 11 23:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 9 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 422K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-00
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-01
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-02
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-03
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-04
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-05
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-06
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-07
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-08
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-09
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-10
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2024-11
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2023-12
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2023-13
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2023-14
FORMULA_NAME ResAllocation-PT-R100C002-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717359897250

FORMULA ResAllocation-PT-R100C002-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717361439982

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 18 (type EXCL) for 3 ResAllocation-PT-R100C002-CTLFireability-2024-01
[lola][I] time limit : 94 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 81 (type FNDP) for 3 ResAllocation-PT-R100C002-CTLFireability-2024-01
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 82 (type EQUN) for 3 ResAllocation-PT-R100C002-CTLFireability-2024-01
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 18 (type EXCL) for ResAllocation-PT-R100C002-CTLFireability-2024-01
[lola][I] result : false
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 10 (type EXCL) for 3 ResAllocation-PT-R100C002-CTLFireability-2024-01
[lola][I] time limit : 97 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 10 (type EXCL) for ResAllocation-PT-R100C002-CTLFireability-2024-01
[lola][I] result : true
[lola][I] markings : 3
[lola][I] fired transitions : 2
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 83 (type EXCL) for 3 ResAllocation-PT-R100C002-CTLFireability-2024-01
[lola][I] time limit : 102 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 83 (type EXCL) for ResAllocation-PT-R100C002-CTLFireability-2024-01
[lola][I] result : true
[lola][I] markings : 76
[lola][I] fired transitions : 75
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 81 (type FNDP) for ResAllocation-PT-R100C002-CTLFireability-2024-01 (obsolete)
[lola][W] CANCELED task # 82 (type EQUN) for ResAllocation-PT-R100C002-CTLFireability-2024-01 (obsolete)
[lola][I] FINISHED task # 81 (type FNDP) for ResAllocation-PT-R100C002-CTLFireability-2024-01
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] LAUNCH task # 38 (type EXCL) for 37 ResAllocation-PT-R100C002-CTLFireability-2024-03
[lola][I] time limit : 112 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 85 (type FNDP) for 26 ResAllocation-PT-R100C002-CTLFireability-2024-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 86 (type EQUN) for 26 ResAllocation-PT-R100C002-CTLFireability-2024-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 85 (type FNDP) for ResAllocation-PT-R100C002-CTLFireability-2024-02
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 86 (type EQUN) for ResAllocation-PT-R100C002-CTLFireability-2024-02 (obsolete)
[lola][I] FINISHED task # 82 (type EQUN) for ResAllocation-PT-R100C002-CTLFireability-2024-01
[lola][I] result : true
[lola][I] FINISHED task # 86 (type EQUN) for ResAllocation-PT-R100C002-CTLFireability-2024-02
[lola][I] result : true
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-01: CONJ false CONJ
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-02: DISJ 0 2 0 0 5 0 0 1
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-03: CTL 0 0 1 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 38 CTL EXCL 5/211 5/2000 ResAllocation-PT-R100C002-CTLFireability-2024-03 1002854 m, 200570 m/sec, 5428467 t fired, .
[lola][.]
[lola][.] Time elapsed: 7 secs. Pages in use: 5
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-01: CONJ false CONJ
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 38 CTL EXCL 10/211 10/2000 ResAllocation-PT-R100C002-CTLFireability-2024-03 1912266 m, 181882 m/sec, 10846917 t fired, .
[lola][.]
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[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 38 CTL EXCL 15/211 14/2000 ResAllocation-PT-R100C002-CTLFireability-2024-03 2802474 m, 178041 m/sec, 16182780 t fired, .
[lola][.]
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 38 CTL EXCL 20/211 19/2000 ResAllocation-PT-R100C002-CTLFireability-2024-03 3677034 m, 174912 m/sec, 21472061 t fired, .
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 38 CTL EXCL 25/211 23/2000 ResAllocation-PT-R100C002-CTLFireability-2024-03 4452157 m, 155024 m/sec, 26684648 t fired, .
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 38 CTL EXCL 30/211 27/2000 ResAllocation-PT-R100C002-CTLFireability-2024-03 5247065 m, 158981 m/sec, 31548815 t fired, .
[lola][.]
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[lola][.] 69 CTL EXCL 125/241 83/2000 ResAllocation-PT-R100C002-CTLFireability-2023-12 16701041 m, 119104 m/sec, 106116356 t fired, .
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[lola][.] 69 CTL EXCL 170/241 109/2000 ResAllocation-PT-R100C002-CTLFireability-2023-12 21818714 m, 118485 m/sec, 142370036 t fired, .
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[lola][.] 69 CTL EXCL 175/241 112/2000 ResAllocation-PT-R100C002-CTLFireability-2023-12 22402805 m, 116818 m/sec, 146256787 t fired, .
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[lola][.] 69 CTL EXCL 180/241 114/2000 ResAllocation-PT-R100C002-CTLFireability-2023-12 22935830 m, 106605 m/sec, 150141079 t fired, .
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[lola][.] 69 CTL EXCL 185/241 117/2000 ResAllocation-PT-R100C002-CTLFireability-2023-12 23507751 m, 114384 m/sec, 154032490 t fired, .
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[lola][.] 69 CTL EXCL 190/241 120/2000 ResAllocation-PT-R100C002-CTLFireability-2023-12 24085190 m, 115487 m/sec, 157945026 t fired, .
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[lola][.] 69 CTL EXCL 195/241 123/2000 ResAllocation-PT-R100C002-CTLFireability-2023-12 24695174 m, 121996 m/sec, 161825167 t fired, .
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[lola][.] 63 CTL EXCL 25/241 20/2000 ResAllocation-PT-R100C002-CTLFireability-2024-10 3960720 m, 139607 m/sec, 27354317 t fired, .
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[lola][.] 50 CTL EXCL 20/287 20/2000 ResAllocation-PT-R100C002-CTLFireability-2024-07 3888843 m, 176038 m/sec, 22865470 t fired, .
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[lola][.] 50 CTL EXCL 30/287 28/2000 ResAllocation-PT-R100C002-CTLFireability-2024-07 5612306 m, 178470 m/sec, 33628212 t fired, .
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[lola][.] 50 CTL EXCL 35/287 33/2000 ResAllocation-PT-R100C002-CTLFireability-2024-07 6461255 m, 169789 m/sec, 39083470 t fired, .
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[lola][.] 50 CTL EXCL 40/287 37/2000 ResAllocation-PT-R100C002-CTLFireability-2024-07 7334347 m, 174618 m/sec, 44360398 t fired, .
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[lola][.] 50 CTL EXCL 45/287 41/2000 ResAllocation-PT-R100C002-CTLFireability-2024-07 8089030 m, 150936 m/sec, 49463985 t fired, .
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[lola][.] 50 CTL EXCL 70/287 60/2000 ResAllocation-PT-R100C002-CTLFireability-2024-07 11912620 m, 163850 m/sec, 74886737 t fired, .
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[lola][.] 50 CTL EXCL 185/287 143/2000 ResAllocation-PT-R100C002-CTLFireability-2024-07 28768682 m, 154299 m/sec, 188471490 t fired, .
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[lola][.] 47 CTL EXCL 35/287 27/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 5404480 m, 143658 m/sec, 39255164 t fired, .
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[lola][.] 47 CTL EXCL 40/287 31/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 6136714 m, 146446 m/sec, 44766898 t fired, .
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[lola][.] 47 CTL EXCL 45/287 35/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 6905184 m, 153694 m/sec, 50283425 t fired, .
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[lola][.] 47 CTL EXCL 50/287 38/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 7558284 m, 130620 m/sec, 55402659 t fired, .
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[lola][.] 47 CTL EXCL 55/287 41/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 8214918 m, 131326 m/sec, 60579789 t fired, .
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[lola][.] 47 CTL EXCL 90/287 64/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 12798683 m, 148840 m/sec, 96346200 t fired, .
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[lola][.] 47 CTL EXCL 140/287 94/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 18798553 m, 113653 m/sec, 145040809 t fired, .
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[lola][.] 47 CTL EXCL 145/287 97/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 19386961 m, 117681 m/sec, 150026007 t fired, .
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[lola][.] 47 CTL EXCL 150/287 100/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 20006484 m, 123904 m/sec, 155087510 t fired, .
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[lola][.] 47 CTL EXCL 155/287 103/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 20580537 m, 114810 m/sec, 160095122 t fired, .
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[lola][.] 47 CTL EXCL 160/287 106/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 21254116 m, 134715 m/sec, 165269823 t fired, .
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[lola][.] 47 CTL EXCL 190/287 124/2000 ResAllocation-PT-R100C002-CTLFireability-2024-06 24915664 m, 122985 m/sec, 194569564 t fired, .
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[lola][I] LAUNCH task # 47 (type EXCL) for 46 ResAllocation-PT-R100C002-CTLFireability-2024-06
[lola][I] time limit : 2298 sec
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[lola][I] FINISHED task # 44 (type EXCL) for ResAllocation-PT-R100C002-CTLFireability-2024-05
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-01: CONJ false CONJ
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-05: CTL true CTL model checker
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-09: CTL true CTL model checker
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-03: CTL 0 0 0 0 1 0 1 0
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[lola][.] 47 CTL EXCL 5/287 5/5 ResAllocation-PT-R100C002-CTLFireability-2024-06 924837 m, -7184962 m/sec, 6138828 t fired, .
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-05: CTL true CTL model checker
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-09: CTL true CTL model checker
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-01: CONJ false CONJ
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-04: CTL false CTL model checker
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[lola][.] 1 CTL EXCL 5/457 18/2000 ResAllocation-PT-R100C002-CTLFireability-2024-00 3704230 m, 740846 m/sec, 3816779 t fired, .
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-05: CTL true CTL model checker
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-08: CONJ 0 1 0 0 3 0 0 0
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
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[lola][.] 1 CTL EXCL 10/457 35/2000 ResAllocation-PT-R100C002-CTLFireability-2024-00 7318147 m, 722783 m/sec, 7722769 t fired, .
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
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[lola][.] 1 CTL EXCL 15/457 53/2000 ResAllocation-PT-R100C002-CTLFireability-2024-00 10994232 m, 735217 m/sec, 11531439 t fired, .
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-08: CONJ 0 1 0 0 3 0 0 0
[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
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[lola][.] ResAllocation-PT-R100C002-CTLFireability-2024-08: CONJ 0 1 0 0 3 0 0 0
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[lola][.] 1 CTL EXCL 40/457 142/2000 ResAllocation-PT-R100C002-CTLFireability-2024-00 29527046 m, 738163 m/sec, 30731581 t fired, .
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[lola][.] 1 CTL EXCL 45/457 160/2000 ResAllocation-PT-R100C002-CTLFireability-2024-00 33301422 m, 754875 m/sec, 34640811 t fired, .
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[lola][.] 1 CTL EXCL 50/457 178/2000 ResAllocation-PT-R100C002-CTLFireability-2024-00 37127651 m, 765245 m/sec, 38604119 t fired, .
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[lola][.] 1 CTL EXCL 55/457 197/2000 ResAllocation-PT-R100C002-CTLFireability-2024-00 40945802 m, 763630 m/sec, 42558813 t fired, .
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[lola][.] 1 CTL EXCL 91/457 307/2000 ResAllocation-PT-R100C002-CTLFireability-2024-00 63823777 m, 416912 m/sec, 68438751 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 408 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R100C002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ResAllocation-PT-R100C002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r313-tall-171662341400882"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R100C002.tgz
mv ResAllocation-PT-R100C002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;