fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r313-tall-171662341300836
Last Updated
July 7, 2024

About the Execution of LoLA for ResAllocation-PT-R003C100

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16206.500 758826.00 760818.00 1706.30 ???????F???????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r313-tall-171662341300836.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is ResAllocation-PT-R003C100, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r313-tall-171662341300836
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 8.2K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 23 07:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 23 07:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 23 07:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 11 23:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 153K Apr 11 23:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Apr 11 23:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 111K Apr 11 23:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 9 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 721K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C100-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1717358280323

FORMULA ResAllocation-PT-R003C100-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1717359039149

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLFireability.xml
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 47 (type CNST) for 44 ResAllocation-PT-R003C100-LTLFireability-12
[lola][I] time limit : 0 sec
[lola][I] memory limit: 0 pages
[lola][I] FINISHED task # 47 (type CNST) for ResAllocation-PT-R003C100-LTLFireability-12
[lola][I] result : true
[lola][I] LAUNCH task # 67 (type EXCL) for 21 ResAllocation-PT-R003C100-LTLFireability-07
[lola][I] time limit : 138 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 65 (type FNDP) for 21 ResAllocation-PT-R003C100-LTLFireability-07
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 66 (type EQUN) for 21 ResAllocation-PT-R003C100-LTLFireability-07
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 67 (type EXCL) for ResAllocation-PT-R003C100-LTLFireability-07
[lola][I] result : true
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 65 (type FNDP) for ResAllocation-PT-R003C100-LTLFireability-07 (obsolete)
[lola][W] CANCELED task # 66 (type EQUN) for ResAllocation-PT-R003C100-LTLFireability-07 (obsolete)
[lola][I] LAUNCH task # 49 (type EXCL) for 44 ResAllocation-PT-R003C100-LTLFireability-12
[lola][I] time limit : 149 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 65 (type FNDP) for ResAllocation-PT-R003C100-LTLFireability-07
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 66 (type EQUN) for ResAllocation-PT-R003C100-LTLFireability-07
[lola][I] result : unknown
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ResAllocation-PT-R003C100-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 1 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 LTL EXCL 4/211 5/2000 ResAllocation-PT-R003C100-LTLFireability-12 599489 m, 119897 m/sec, 3850200 t fired, .
[lola][.]
[lola][.] Time elapsed: 6 secs. Pages in use: 5
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ResAllocation-PT-R003C100-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 1 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 LTL EXCL 9/211 9/2000 ResAllocation-PT-R003C100-LTLFireability-12 1076900 m, 95482 m/sec, 7950084 t fired, .
[lola][.]
[lola][.] Time elapsed: 11 secs. Pages in use: 9
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ResAllocation-PT-R003C100-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 1 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 LTL EXCL 14/211 12/2000 ResAllocation-PT-R003C100-LTLFireability-12 1513532 m, 87326 m/sec, 11980325 t fired, .
[lola][.]
[lola][.] Time elapsed: 16 secs. Pages in use: 12
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ResAllocation-PT-R003C100-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 1 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 LTL EXCL 19/211 15/2000 ResAllocation-PT-R003C100-LTLFireability-12 1940667 m, 85427 m/sec, 15968344 t fired, .
[lola][.]
[lola][.] Time elapsed: 21 secs. Pages in use: 15
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ResAllocation-PT-R003C100-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 1 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 LTL EXCL 24/211 19/2000 ResAllocation-PT-R003C100-LTLFireability-12 2371952 m, 86257 m/sec, 19950634 t fired, .
[lola][.]
[lola][.] Time elapsed: 26 secs. Pages in use: 19
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ResAllocation-PT-R003C100-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 1 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 LTL EXCL 29/211 22/2000 ResAllocation-PT-R003C100-LTLFireability-12 2786438 m, 82897 m/sec, 23838494 t fired, .
[lola][.]
[lola][.] Time elapsed: 31 secs. Pages in use: 22
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ResAllocation-PT-R003C100-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 1 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 2 0 0 2 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 49 LTL EXCL 34/211 25/2000 ResAllocation-PT-R003C100-LTLFireability-12 3203063 m, 83325 m/sec, 27694764 t fired, .
[lola][.]
[lola][.] Time elapsed: 36 secs. Pages in use: 25
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] ResAllocation-PT-R003C100-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ 0 2 0 0 2 0 0 0
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[lola][.] 49 LTL EXCL 39/211 28/2000 ResAllocation-PT-R003C100-LTLFireability-12 3620656 m, 83518 m/sec, 31508286 t fired, .
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[lola][.] 49 LTL EXCL 44/211 31/2000 ResAllocation-PT-R003C100-LTLFireability-12 4030941 m, 82057 m/sec, 35285396 t fired, .
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[lola][.] 49 LTL EXCL 49/211 34/2000 ResAllocation-PT-R003C100-LTLFireability-12 4428559 m, 79523 m/sec, 39025073 t fired, .
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[lola][.] 49 LTL EXCL 54/211 37/2000 ResAllocation-PT-R003C100-LTLFireability-12 4805298 m, 75347 m/sec, 42750997 t fired, .
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[lola][.] 49 LTL EXCL 59/211 40/2000 ResAllocation-PT-R003C100-LTLFireability-12 5172269 m, 73394 m/sec, 46466991 t fired, .
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[lola][.] 49 LTL EXCL 64/211 42/2000 ResAllocation-PT-R003C100-LTLFireability-12 5526938 m, 70933 m/sec, 50163676 t fired, .
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[lola][.] 49 LTL EXCL 69/211 45/2000 ResAllocation-PT-R003C100-LTLFireability-12 5881036 m, 70819 m/sec, 53851686 t fired, .
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[lola][.] 49 LTL EXCL 74/211 48/2000 ResAllocation-PT-R003C100-LTLFireability-12 6248661 m, 73525 m/sec, 57549120 t fired, .
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[lola][.] 49 LTL EXCL 79/211 50/2000 ResAllocation-PT-R003C100-LTLFireability-12 6600179 m, 70303 m/sec, 61199445 t fired, .
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[lola][.] 49 LTL EXCL 84/211 53/2000 ResAllocation-PT-R003C100-LTLFireability-12 6942004 m, 68365 m/sec, 64849018 t fired, .
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[lola][.] 49 LTL EXCL 89/211 55/2000 ResAllocation-PT-R003C100-LTLFireability-12 7305569 m, 72713 m/sec, 68499349 t fired, .
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[lola][.] 49 LTL EXCL 94/211 58/2000 ResAllocation-PT-R003C100-LTLFireability-12 7666470 m, 72180 m/sec, 72154476 t fired, .
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[lola][.] 49 LTL EXCL 99/211 61/2000 ResAllocation-PT-R003C100-LTLFireability-12 8018933 m, 70492 m/sec, 75800631 t fired, .
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[lola][.] 49 LTL EXCL 104/211 63/2000 ResAllocation-PT-R003C100-LTLFireability-12 8381340 m, 72481 m/sec, 79391135 t fired, .
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[lola][.] 49 LTL EXCL 109/211 66/2000 ResAllocation-PT-R003C100-LTLFireability-12 8766038 m, 76939 m/sec, 82936981 t fired, .
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[lola][.] 49 LTL EXCL 114/211 69/2000 ResAllocation-PT-R003C100-LTLFireability-12 9126791 m, 72150 m/sec, 86461627 t fired, .
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[lola][.] 49 LTL EXCL 119/211 71/2000 ResAllocation-PT-R003C100-LTLFireability-12 9481049 m, 70851 m/sec, 90072353 t fired, .
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[lola][.] 49 LTL EXCL 124/211 74/2000 ResAllocation-PT-R003C100-LTLFireability-12 9817105 m, 67211 m/sec, 93623804 t fired, .
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[lola][.] 49 LTL EXCL 129/211 76/2000 ResAllocation-PT-R003C100-LTLFireability-12 10178069 m, 72192 m/sec, 97231124 t fired, .
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[lola][.] 49 LTL EXCL 134/211 79/2000 ResAllocation-PT-R003C100-LTLFireability-12 10515546 m, 67495 m/sec, 100773101 t fired, .
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[lola][.] 49 LTL EXCL 139/211 81/2000 ResAllocation-PT-R003C100-LTLFireability-12 10868274 m, 70545 m/sec, 104360639 t fired, .
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[lola][.] 49 LTL EXCL 144/211 84/2000 ResAllocation-PT-R003C100-LTLFireability-12 11213780 m, 69101 m/sec, 107915722 t fired, .
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[lola][.] 49 LTL EXCL 149/211 86/2000 ResAllocation-PT-R003C100-LTLFireability-12 11560068 m, 69257 m/sec, 111443578 t fired, .
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[lola][.] 49 LTL EXCL 154/211 89/2000 ResAllocation-PT-R003C100-LTLFireability-12 11913644 m, 70715 m/sec, 115010999 t fired, .
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[lola][.] 49 LTL EXCL 159/211 91/2000 ResAllocation-PT-R003C100-LTLFireability-12 12255159 m, 68303 m/sec, 118537712 t fired, .
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[lola][.] 49 LTL EXCL 164/211 94/2000 ResAllocation-PT-R003C100-LTLFireability-12 12577183 m, 64404 m/sec, 122038314 t fired, .
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[lola][.] 49 LTL EXCL 169/211 96/2000 ResAllocation-PT-R003C100-LTLFireability-12 12907440 m, 66051 m/sec, 125615870 t fired, .
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[lola][.] 49 LTL EXCL 174/211 98/2000 ResAllocation-PT-R003C100-LTLFireability-12 13230535 m, 64619 m/sec, 129193189 t fired, .
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[lola][.] 49 LTL EXCL 179/211 101/2000 ResAllocation-PT-R003C100-LTLFireability-12 13541232 m, 62139 m/sec, 132733679 t fired, .
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[lola][.] 49 LTL EXCL 184/211 103/2000 ResAllocation-PT-R003C100-LTLFireability-12 13841441 m, 60041 m/sec, 136260968 t fired, .
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[lola][.] 49 LTL EXCL 189/211 105/2000 ResAllocation-PT-R003C100-LTLFireability-12 14168095 m, 65330 m/sec, 139828422 t fired, .
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[lola][.] 49 LTL EXCL 194/211 108/2000 ResAllocation-PT-R003C100-LTLFireability-12 14481642 m, 62709 m/sec, 143360813 t fired, .
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[lola][.] 49 LTL EXCL 199/211 110/2000 ResAllocation-PT-R003C100-LTLFireability-12 14793820 m, 62435 m/sec, 146890268 t fired, .
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[lola][.] 49 LTL EXCL 204/211 112/2000 ResAllocation-PT-R003C100-LTLFireability-12 15100697 m, 61375 m/sec, 150409731 t fired, .
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[lola][.] 49 LTL EXCL 209/211 114/2000 ResAllocation-PT-R003C100-LTLFireability-12 15423992 m, 64659 m/sec, 153985819 t fired, .
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[lola][.] 54 LTL EXCL 5/225 6/2000 ResAllocation-PT-R003C100-LTLFireability-13 647967 m, 129593 m/sec, 4229961 t fired, .
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[lola][.] 54 LTL EXCL 10/225 9/2000 ResAllocation-PT-R003C100-LTLFireability-13 1118009 m, 94008 m/sec, 8327914 t fired, .
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[lola][.] 54 LTL EXCL 15/225 13/2000 ResAllocation-PT-R003C100-LTLFireability-13 1553844 m, 87167 m/sec, 12352228 t fired, .
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[lola][.] 54 LTL EXCL 30/225 22/2000 ResAllocation-PT-R003C100-LTLFireability-13 2833860 m, 84735 m/sec, 24245947 t fired, .
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[lola][.] 54 LTL EXCL 35/225 25/2000 ResAllocation-PT-R003C100-LTLFireability-13 3243497 m, 81927 m/sec, 28075310 t fired, .
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[lola][.] 54 LTL EXCL 40/225 28/2000 ResAllocation-PT-R003C100-LTLFireability-13 3643145 m, 79929 m/sec, 31715007 t fired, .
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[lola][.] 54 LTL EXCL 45/225 31/2000 ResAllocation-PT-R003C100-LTLFireability-13 4036330 m, 78637 m/sec, 35346311 t fired, .
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[lola][.] 54 LTL EXCL 50/225 34/2000 ResAllocation-PT-R003C100-LTLFireability-13 4416691 m, 76072 m/sec, 38898290 t fired, .
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[lola][.] 54 LTL EXCL 55/225 37/2000 ResAllocation-PT-R003C100-LTLFireability-13 4771306 m, 70923 m/sec, 42405897 t fired, .
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[lola][.] 54 LTL EXCL 60/225 39/2000 ResAllocation-PT-R003C100-LTLFireability-13 5121440 m, 70026 m/sec, 45937247 t fired, .
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[lola][.] 54 LTL EXCL 65/225 42/2000 ResAllocation-PT-R003C100-LTLFireability-13 5461553 m, 68022 m/sec, 49462643 t fired, .
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[lola][.] 54 LTL EXCL 70/225 44/2000 ResAllocation-PT-R003C100-LTLFireability-13 5786069 m, 64903 m/sec, 52977049 t fired, .
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[lola][.] 54 LTL EXCL 85/225 52/2000 ResAllocation-PT-R003C100-LTLFireability-13 6825017 m, 67441 m/sec, 63527161 t fired, .
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[lola][.] 54 LTL EXCL 90/225 54/2000 ResAllocation-PT-R003C100-LTLFireability-13 7164121 m, 67820 m/sec, 67022116 t fired, .
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[lola][.] 54 LTL EXCL 95/225 57/2000 ResAllocation-PT-R003C100-LTLFireability-13 7509135 m, 69002 m/sec, 70524117 t fired, .
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[lola][.] 54 LTL EXCL 100/225 59/2000 ResAllocation-PT-R003C100-LTLFireability-13 7844825 m, 67138 m/sec, 73970106 t fired, .
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[lola][.] 54 LTL EXCL 105/225 62/2000 ResAllocation-PT-R003C100-LTLFireability-13 8155247 m, 62084 m/sec, 77348464 t fired, .
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[lola][.] 54 LTL EXCL 110/225 64/2000 ResAllocation-PT-R003C100-LTLFireability-13 8528142 m, 74579 m/sec, 80721068 t fired, .
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[lola][.] 54 LTL EXCL 115/225 67/2000 ResAllocation-PT-R003C100-LTLFireability-13 8881370 m, 70645 m/sec, 84048303 t fired, .
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[lola][.] 54 LTL EXCL 120/225 69/2000 ResAllocation-PT-R003C100-LTLFireability-13 9221976 m, 68121 m/sec, 87440640 t fired, .
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[lola][.] 54 LTL EXCL 125/225 72/2000 ResAllocation-PT-R003C100-LTLFireability-13 9557775 m, 67159 m/sec, 90870602 t fired, .
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[lola][.] 54 LTL EXCL 140/225 79/2000 ResAllocation-PT-R003C100-LTLFireability-13 10535549 m, 63991 m/sec, 100998158 t fired, .
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[lola][.] 54 LTL EXCL 145/225 81/2000 ResAllocation-PT-R003C100-LTLFireability-13 10873245 m, 67539 m/sec, 104415802 t fired, .
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[lola][.] 54 LTL EXCL 150/225 84/2000 ResAllocation-PT-R003C100-LTLFireability-13 11203087 m, 65968 m/sec, 107795752 t fired, .
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[lola][.] 54 LTL EXCL 155/225 86/2000 ResAllocation-PT-R003C100-LTLFireability-13 11538604 m, 67103 m/sec, 111221812 t fired, .
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[lola][.] 54 LTL EXCL 160/225 89/2000 ResAllocation-PT-R003C100-LTLFireability-13 11878966 m, 68072 m/sec, 114653304 t fired, .
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[lola][.] 54 LTL EXCL 165/225 91/2000 ResAllocation-PT-R003C100-LTLFireability-13 12204624 m, 65131 m/sec, 118022457 t fired, .
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[lola][.] 54 LTL EXCL 170/225 93/2000 ResAllocation-PT-R003C100-LTLFireability-13 12516168 m, 62308 m/sec, 121324186 t fired, .
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[lola][.] 54 LTL EXCL 175/225 96/2000 ResAllocation-PT-R003C100-LTLFireability-13 12826000 m, 61966 m/sec, 124683333 t fired, .
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[lola][.] 54 LTL EXCL 190/225 102/2000 ResAllocation-PT-R003C100-LTLFireability-13 13721384 m, 58132 m/sec, 134855480 t fired, .
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[lola][.] 54 LTL EXCL 195/225 104/2000 ResAllocation-PT-R003C100-LTLFireability-13 14029982 m, 61719 m/sec, 138271074 t fired, .
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[lola][.] 54 LTL EXCL 200/225 107/2000 ResAllocation-PT-R003C100-LTLFireability-13 14337842 m, 61572 m/sec, 141699933 t fired, .
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[lola][.] 54 LTL EXCL 205/225 109/2000 ResAllocation-PT-R003C100-LTLFireability-13 14637165 m, 59864 m/sec, 145095641 t fired, .
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[lola][.] 54 LTL EXCL 210/225 111/2000 ResAllocation-PT-R003C100-LTLFireability-13 14933688 m, 59304 m/sec, 148544671 t fired, .
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[lola][.] 56 LTL EXCL 4/523 6/2000 ResAllocation-PT-R003C100-LTLFireability-13 850725 m, 170145 m/sec, 2656141 t fired, .
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[lola][.] 56 LTL EXCL 9/523 12/2000 ResAllocation-PT-R003C100-LTLFireability-13 1782755 m, 186406 m/sec, 6118895 t fired, .
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[lola][.] 56 LTL EXCL 14/523 20/2000 ResAllocation-PT-R003C100-LTLFireability-13 2920787 m, 227606 m/sec, 9538996 t fired, .
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[lola][.] 56 LTL EXCL 19/523 25/2000 ResAllocation-PT-R003C100-LTLFireability-13 3736961 m, 163234 m/sec, 13081150 t fired, .
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[lola][.] 56 LTL EXCL 24/523 30/2000 ResAllocation-PT-R003C100-LTLFireability-13 4534437 m, 159495 m/sec, 16562552 t fired, .
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[lola][.] 56 LTL EXCL 29/523 34/2000 ResAllocation-PT-R003C100-LTLFireability-13 5196068 m, 132326 m/sec, 20180200 t fired, .
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[lola][.] 56 LTL EXCL 34/523 39/2000 ResAllocation-PT-R003C100-LTLFireability-13 5836142 m, 128014 m/sec, 23716123 t fired, .
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[lola][.] 56 LTL EXCL 44/523 48/2000 ResAllocation-PT-R003C100-LTLFireability-13 7241664 m, 134948 m/sec, 30727299 t fired, .
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[lola][.] 56 LTL EXCL 49/523 52/2000 ResAllocation-PT-R003C100-LTLFireability-13 7814057 m, 114478 m/sec, 34089336 t fired, .
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[lola][.] 56 LTL EXCL 104/523 105/2000 ResAllocation-PT-R003C100-LTLFireability-13 15976872 m, 161430 m/sec, 72105305 t fired, .
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[lola][.] 56 LTL EXCL 109/523 109/2000 ResAllocation-PT-R003C100-LTLFireability-13 16647759 m, 134177 m/sec, 75590915 t fired, .
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 0 0 1 0 1 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 0 1 0 2 0 1 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 56 LTL EXCL 269/523 256/2000 ResAllocation-PT-R003C100-LTLFireability-13 39191307 m, 211108 m/sec, 183862580 t fired, .
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL false LTL model checker
[lola][.]
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 0 0 1 0 1 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 0 1 0 2 0 1 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.]
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[lola][.] 56 LTL EXCL 274/523 263/2000 ResAllocation-PT-R003C100-LTLFireability-13 40198325 m, 201403 m/sec, 187152290 t fired, .
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 0 0 1 0 1 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 0 1 0 2 0 1 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 56 LTL EXCL 279/523 271/2000 ResAllocation-PT-R003C100-LTLFireability-13 41435651 m, 247465 m/sec, 190299816 t fired, .
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL false LTL model checker
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL false LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 0 0 1 0 1 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-13: CONJ 0 0 1 0 2 0 1 0
[lola][.] ResAllocation-PT-R003C100-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[lola][.]
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[lola][.] 56 LTL EXCL 284/523 276/2000 ResAllocation-PT-R003C100-LTLFireability-13 42200943 m, 153058 m/sec, 193548840 t fired, .
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-02: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-03: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-10: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL false LTL model checker
[lola][.]
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 0 0 1 0 1 0
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[lola][.] 56 LTL EXCL 289/523 281/2000 ResAllocation-PT-R003C100-LTLFireability-13 43038564 m, 167524 m/sec, 196914924 t fired, .
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-04: LTL false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-07: CONJ false state space
[lola][.] ResAllocation-PT-R003C100-LTLFireability-08: LTL true LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-09: LTL true LTL model checker
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-11: CONJ false LTL model checker
[lola][.] ResAllocation-PT-R003C100-LTLFireability-15: LTL false LTL model checker
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[lola][.] ResAllocation-PT-R003C100-LTLFireability-12: CONJ 0 0 0 0 1 0 1 0
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[lola][.] 56 LTL EXCL 294/523 287/2000 ResAllocation-PT-R003C100-LTLFireability-13 43826406 m, 157568 m/sec, 200036600 t fired, .
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/home/mcc/BenchKit/BenchKit_head.sh: line 23: 406 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C100"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is ResAllocation-PT-R003C100, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r313-tall-171662341300836"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C100.tgz
mv ResAllocation-PT-R003C100 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;