About the Execution of LoLA for Referendum-PT-0200
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 0.000 | 2095867.00 | 0.00 | 0.00 | [undef] | Cannot compute |
Execution Chart
Sorry, for this execution, no execution chart could be reported.
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r313-tall-171662340900618.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is Referendum-PT-0200, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r313-tall-171662340900618
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.5M
-rw-r--r-- 1 mcc users 119K Apr 11 16:49 CTLCardinality.txt
-rw-r--r-- 1 mcc users 570K Apr 11 16:49 CTLCardinality.xml
-rw-r--r-- 1 mcc users 85K Apr 11 16:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 626K Apr 11 16:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 125K Apr 23 07:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 417K Apr 23 07:47 LTLCardinality.xml
-rw-r--r-- 1 mcc users 39K Apr 23 07:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 206K Apr 23 07:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 195K Apr 11 17:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 939K Apr 11 17:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 233K Apr 11 17:15 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 1.7M Apr 11 17:15 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 22K Apr 23 07:47 UpperBounds.txt
-rw-r--r-- 1 mcc users 52K Apr 23 07:47 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 5 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 228K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-00
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-01
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-02
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-03
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-04
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-05
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-06
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-07
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-08
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-09
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-10
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-11
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-12
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-13
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-14
FORMULA_NAME Referendum-PT-0200-CTLFireability-2024-15
=== Now, execution of the tool begins
BK_START 1717347314257
BK_STOP 1717349410124
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 Referendum-PT-0200-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 133 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 55 (type EQUN) for 40 Referendum-PT-0200-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 57 (type EQUN) for 40 Referendum-PT-0200-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 55 (type EQUN) for Referendum-PT-0200-CTLFireability-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] FINISHED task # 57 (type EQUN) for Referendum-PT-0200-CTLFireability-2024-12
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 5/211 3/2000 Referendum-PT-0200-CTLFireability-2024-04 328198 m, 65639 m/sec, 5903537 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 10/211 4/2000 Referendum-PT-0200-CTLFireability-2024-04 619029 m, 58166 m/sec, 11681201 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 4
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 15/211 6/2000 Referendum-PT-0200-CTLFireability-2024-04 889500 m, 54094 m/sec, 17295520 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 6
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 20/211 8/2000 Referendum-PT-0200-CTLFireability-2024-04 1154546 m, 53009 m/sec, 22914435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 25/211 9/2000 Referendum-PT-0200-CTLFireability-2024-04 1419476 m, 52986 m/sec, 28430071 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 9
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 30/211 11/2000 Referendum-PT-0200-CTLFireability-2024-04 1671057 m, 50316 m/sec, 33973456 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 35/211 12/2000 Referendum-PT-0200-CTLFireability-2024-04 1918141 m, 49416 m/sec, 39572905 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 12
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 40/211 14/2000 Referendum-PT-0200-CTLFireability-2024-04 2157612 m, 47894 m/sec, 45105303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 45/211 15/2000 Referendum-PT-0200-CTLFireability-2024-04 2418570 m, 52191 m/sec, 50442417 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 15
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 50/211 17/2000 Referendum-PT-0200-CTLFireability-2024-04 2657015 m, 47689 m/sec, 55718655 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 17
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 55/211 18/2000 Referendum-PT-0200-CTLFireability-2024-04 2894895 m, 47576 m/sec, 61030588 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 60/211 20/2000 Referendum-PT-0200-CTLFireability-2024-04 3117637 m, 44548 m/sec, 66332620 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 20
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 65/211 21/2000 Referendum-PT-0200-CTLFireability-2024-04 3358862 m, 48245 m/sec, 71663699 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 70/211 22/2000 Referendum-PT-0200-CTLFireability-2024-04 3585752 m, 45378 m/sec, 76970527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 75/211 24/2000 Referendum-PT-0200-CTLFireability-2024-04 3806880 m, 44225 m/sec, 82296003 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 80/211 25/2000 Referendum-PT-0200-CTLFireability-2024-04 4022609 m, 43145 m/sec, 87634355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 85/211 26/2000 Referendum-PT-0200-CTLFireability-2024-04 4231851 m, 41848 m/sec, 92905994 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 90/211 28/2000 Referendum-PT-0200-CTLFireability-2024-04 4481939 m, 50017 m/sec, 97981952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 95/211 29/2000 Referendum-PT-0200-CTLFireability-2024-04 4710858 m, 45783 m/sec, 103070880 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 100/211 31/2000 Referendum-PT-0200-CTLFireability-2024-04 4947290 m, 47286 m/sec, 108209441 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 105/211 32/2000 Referendum-PT-0200-CTLFireability-2024-04 5165793 m, 43700 m/sec, 113325709 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 110/211 33/2000 Referendum-PT-0200-CTLFireability-2024-04 5391864 m, 45214 m/sec, 118449043 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 115/211 35/2000 Referendum-PT-0200-CTLFireability-2024-04 5615556 m, 44738 m/sec, 123587160 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 120/211 36/2000 Referendum-PT-0200-CTLFireability-2024-04 5827968 m, 42482 m/sec, 128716635 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 125/211 37/2000 Referendum-PT-0200-CTLFireability-2024-04 6041032 m, 42612 m/sec, 133938283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 37
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 130/211 39/2000 Referendum-PT-0200-CTLFireability-2024-04 6246703 m, 41134 m/sec, 139210719 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 135/211 40/2000 Referendum-PT-0200-CTLFireability-2024-04 6480698 m, 46799 m/sec, 144513497 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 140/211 41/2000 Referendum-PT-0200-CTLFireability-2024-04 6707747 m, 45409 m/sec, 149798039 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 41
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 145/211 43/2000 Referendum-PT-0200-CTLFireability-2024-04 6929124 m, 44275 m/sec, 155116356 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 150/211 44/2000 Referendum-PT-0200-CTLFireability-2024-04 7143407 m, 42856 m/sec, 160426944 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 155/211 45/2000 Referendum-PT-0200-CTLFireability-2024-04 7342510 m, 39820 m/sec, 165715050 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 160/211 47/2000 Referendum-PT-0200-CTLFireability-2024-04 7568826 m, 45263 m/sec, 171059636 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 165/211 48/2000 Referendum-PT-0200-CTLFireability-2024-04 7779343 m, 42103 m/sec, 176396864 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 170/211 49/2000 Referendum-PT-0200-CTLFireability-2024-04 7981777 m, 40486 m/sec, 181666165 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 175/211 50/2000 Referendum-PT-0200-CTLFireability-2024-04 8179561 m, 39556 m/sec, 186940964 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 180/211 52/2000 Referendum-PT-0200-CTLFireability-2024-04 8365029 m, 37093 m/sec, 192183351 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 185/211 53/2000 Referendum-PT-0200-CTLFireability-2024-04 8612771 m, 49548 m/sec, 197298938 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 190/211 55/2000 Referendum-PT-0200-CTLFireability-2024-04 8847838 m, 47013 m/sec, 202381149 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 195/211 56/2000 Referendum-PT-0200-CTLFireability-2024-04 9081605 m, 46753 m/sec, 207483020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 200/211 57/2000 Referendum-PT-0200-CTLFireability-2024-04 9298986 m, 43476 m/sec, 212530777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 205/211 59/2000 Referendum-PT-0200-CTLFireability-2024-04 9518116 m, 43826 m/sec, 217618099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 210/211 60/2000 Referendum-PT-0200-CTLFireability-2024-04 9744982 m, 45373 m/sec, 222733864 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 17 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-04 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 Referendum-PT-0200-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 17 (type EXCL) for 16 Referendum-PT-0200-CTLFireability-2024-04
[[35mlola[0m][I] time limit : 3385 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 5/3385 3/5 Referendum-PT-0200-CTLFireability-2024-04 341815 m, -1880633 m/sec, 6143091 t fired, .
[[35mlola[0m][.] 50 CTL EXCL 5/211 3/2000 Referendum-PT-0200-CTLFireability-2024-15 410224 m, 82044 m/sec, 5499161 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 17 CTL EXCL 10/3385 4/5 Referendum-PT-0200-CTLFireability-2024-04 638412 m, 59319 m/sec, 12074173 t fired, .
[[35mlola[0m][.] 50 CTL EXCL 10/199 5/2000 Referendum-PT-0200-CTLFireability-2024-15 781328 m, 74220 m/sec, 10873001 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 17 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-04 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 15/199 7/2000 Referendum-PT-0200-CTLFireability-2024-15 1125582 m, 68850 m/sec, 16161353 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 20/211 10/2000 Referendum-PT-0200-CTLFireability-2024-15 1496157 m, 74115 m/sec, 21525991 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 25/211 12/2000 Referendum-PT-0200-CTLFireability-2024-15 1825415 m, 65851 m/sec, 26766161 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 30/211 14/2000 Referendum-PT-0200-CTLFireability-2024-15 2145960 m, 64109 m/sec, 32031889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 35/211 16/2000 Referendum-PT-0200-CTLFireability-2024-15 2511380 m, 73084 m/sec, 37278009 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 40/211 18/2000 Referendum-PT-0200-CTLFireability-2024-15 2863646 m, 70453 m/sec, 42600809 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 45/211 20/2000 Referendum-PT-0200-CTLFireability-2024-15 3188134 m, 64897 m/sec, 47753455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 50/211 22/2000 Referendum-PT-0200-CTLFireability-2024-15 3486127 m, 59598 m/sec, 52576827 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 55/211 24/2000 Referendum-PT-0200-CTLFireability-2024-15 3771134 m, 57001 m/sec, 57418131 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 60/211 25/2000 Referendum-PT-0200-CTLFireability-2024-15 4050499 m, 55873 m/sec, 62283518 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 65/211 27/2000 Referendum-PT-0200-CTLFireability-2024-15 4356069 m, 61114 m/sec, 67146077 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 70/211 29/2000 Referendum-PT-0200-CTLFireability-2024-15 4680742 m, 64934 m/sec, 71936573 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 75/211 31/2000 Referendum-PT-0200-CTLFireability-2024-15 4996065 m, 63064 m/sec, 76712599 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 80/211 33/2000 Referendum-PT-0200-CTLFireability-2024-15 5303334 m, 61453 m/sec, 81530045 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 85/211 35/2000 Referendum-PT-0200-CTLFireability-2024-15 5619337 m, 63200 m/sec, 86365358 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 90/211 37/2000 Referendum-PT-0200-CTLFireability-2024-15 5922670 m, 60666 m/sec, 91218108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 95/211 38/2000 Referendum-PT-0200-CTLFireability-2024-15 6214307 m, 58327 m/sec, 96069151 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 100/211 40/2000 Referendum-PT-0200-CTLFireability-2024-15 6505029 m, 58144 m/sec, 100814529 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 105/211 42/2000 Referendum-PT-0200-CTLFireability-2024-15 6783137 m, 55621 m/sec, 105502920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 110/211 44/2000 Referendum-PT-0200-CTLFireability-2024-15 7058679 m, 55108 m/sec, 110199739 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 115/211 45/2000 Referendum-PT-0200-CTLFireability-2024-15 7321524 m, 52569 m/sec, 114908735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 120/211 47/2000 Referendum-PT-0200-CTLFireability-2024-15 7597168 m, 55128 m/sec, 119638695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 125/211 48/2000 Referendum-PT-0200-CTLFireability-2024-15 7860713 m, 52709 m/sec, 124376478 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 130/211 50/2000 Referendum-PT-0200-CTLFireability-2024-15 8124900 m, 52837 m/sec, 129135833 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 135/211 52/2000 Referendum-PT-0200-CTLFireability-2024-15 8377384 m, 50496 m/sec, 133910877 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 140/211 54/2000 Referendum-PT-0200-CTLFireability-2024-15 8705743 m, 65671 m/sec, 138597125 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 145/211 56/2000 Referendum-PT-0200-CTLFireability-2024-15 9017205 m, 62292 m/sec, 143252469 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 150/211 57/2000 Referendum-PT-0200-CTLFireability-2024-15 9315895 m, 59738 m/sec, 147878484 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 155/211 59/2000 Referendum-PT-0200-CTLFireability-2024-15 9617739 m, 60368 m/sec, 152521677 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 160/211 61/2000 Referendum-PT-0200-CTLFireability-2024-15 9910996 m, 58651 m/sec, 157144443 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 165/211 63/2000 Referendum-PT-0200-CTLFireability-2024-15 10198938 m, 57588 m/sec, 161772699 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 170/211 64/2000 Referendum-PT-0200-CTLFireability-2024-15 10471508 m, 54514 m/sec, 166390427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 175/211 66/2000 Referendum-PT-0200-CTLFireability-2024-15 10780215 m, 61741 m/sec, 171072941 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 66
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 180/211 68/2000 Referendum-PT-0200-CTLFireability-2024-15 11073535 m, 58664 m/sec, 175744627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 185/211 70/2000 Referendum-PT-0200-CTLFireability-2024-15 11360650 m, 57423 m/sec, 180408189 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 70
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 190/211 72/2000 Referendum-PT-0200-CTLFireability-2024-15 11642469 m, 56363 m/sec, 185093452 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 72
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 195/211 73/2000 Referendum-PT-0200-CTLFireability-2024-15 11926362 m, 56778 m/sec, 189773783 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 73
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 200/211 75/2000 Referendum-PT-0200-CTLFireability-2024-15 12202665 m, 55260 m/sec, 194466329 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 205/211 77/2000 Referendum-PT-0200-CTLFireability-2024-15 12470916 m, 53650 m/sec, 199170297 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 210/211 78/2000 Referendum-PT-0200-CTLFireability-2024-15 12746852 m, 55187 m/sec, 203812867 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 78
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 50 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-15 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 Referendum-PT-0200-CTLFireability-2024-14
[[35mlola[0m][I] time limit : 211 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 50 (type EXCL) for 49 Referendum-PT-0200-CTLFireability-2024-15
[[35mlola[0m][I] time limit : 3170 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 202
[[35mlola[0m][I] fired transitions : 404
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 5/211 3/5 Referendum-PT-0200-CTLFireability-2024-15 409919 m, -2467386 m/sec, 5494887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 50 CTL EXCL 10/211 5/5 Referendum-PT-0200-CTLFireability-2024-15 774563 m, 72928 m/sec, 10767932 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 50 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-15 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 44 (type EXCL) for 43 Referendum-PT-0200-CTLFireability-2024-13
[[35mlola[0m][I] time limit : 225 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 44 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 259
[[35mlola[0m][I] fired transitions : 419
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 38 (type EXCL) for 37 Referendum-PT-0200-CTLFireability-2024-11
[[35mlola[0m][I] time limit : 242 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 38 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-11
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 598
[[35mlola[0m][I] fired transitions : 801
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 Referendum-PT-0200-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 262 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 5/262 2/2000 Referendum-PT-0200-CTLFireability-2024-10 402872 m, 80574 m/sec, 3947747 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 10/262 4/2000 Referendum-PT-0200-CTLFireability-2024-10 757242 m, 70874 m/sec, 7799538 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 15/262 5/2000 Referendum-PT-0200-CTLFireability-2024-10 1085198 m, 65591 m/sec, 11559984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 20/262 6/2000 Referendum-PT-0200-CTLFireability-2024-10 1423038 m, 67568 m/sec, 15351383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 25/262 8/2000 Referendum-PT-0200-CTLFireability-2024-10 1745209 m, 64434 m/sec, 19094038 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 30/262 9/2000 Referendum-PT-0200-CTLFireability-2024-10 2053488 m, 61655 m/sec, 22754147 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 35/262 10/2000 Referendum-PT-0200-CTLFireability-2024-10 2346146 m, 58531 m/sec, 26359148 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 40/262 11/2000 Referendum-PT-0200-CTLFireability-2024-10 2669598 m, 64690 m/sec, 30152451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 45/262 12/2000 Referendum-PT-0200-CTLFireability-2024-10 2988206 m, 63721 m/sec, 33824726 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 50/262 14/2000 Referendum-PT-0200-CTLFireability-2024-10 3295891 m, 61537 m/sec, 37535168 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 55/262 15/2000 Referendum-PT-0200-CTLFireability-2024-10 3604472 m, 61716 m/sec, 41300972 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 60/262 16/2000 Referendum-PT-0200-CTLFireability-2024-10 3896649 m, 58435 m/sec, 44940590 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 65/262 17/2000 Referendum-PT-0200-CTLFireability-2024-10 4172148 m, 55099 m/sec, 48453223 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 70/262 18/2000 Referendum-PT-0200-CTLFireability-2024-10 4430213 m, 51613 m/sec, 51965302 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 75/262 20/2000 Referendum-PT-0200-CTLFireability-2024-10 4739082 m, 61773 m/sec, 55694002 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 80/262 21/2000 Referendum-PT-0200-CTLFireability-2024-10 5031612 m, 58506 m/sec, 59436314 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 85/262 22/2000 Referendum-PT-0200-CTLFireability-2024-10 5366027 m, 66883 m/sec, 63341738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 90/262 23/2000 Referendum-PT-0200-CTLFireability-2024-10 5689796 m, 64753 m/sec, 67176284 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 95/262 25/2000 Referendum-PT-0200-CTLFireability-2024-10 5996271 m, 61295 m/sec, 70929511 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 100/262 26/2000 Referendum-PT-0200-CTLFireability-2024-10 6300632 m, 60872 m/sec, 74759443 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 545 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 105/262 27/2000 Referendum-PT-0200-CTLFireability-2024-10 6588919 m, 57657 m/sec, 78373536 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 550 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 110/262 28/2000 Referendum-PT-0200-CTLFireability-2024-10 6864714 m, 55159 m/sec, 81942089 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 555 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 115/262 29/2000 Referendum-PT-0200-CTLFireability-2024-10 7146441 m, 56345 m/sec, 85506982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 560 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 120/262 30/2000 Referendum-PT-0200-CTLFireability-2024-10 7429173 m, 56546 m/sec, 89032394 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 565 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 125/262 32/2000 Referendum-PT-0200-CTLFireability-2024-10 7705610 m, 55287 m/sec, 92627743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 570 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 130/262 33/2000 Referendum-PT-0200-CTLFireability-2024-10 7960769 m, 51031 m/sec, 96094051 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 575 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 135/262 34/2000 Referendum-PT-0200-CTLFireability-2024-10 8223891 m, 52624 m/sec, 99517474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 580 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 140/262 35/2000 Referendum-PT-0200-CTLFireability-2024-10 8476191 m, 50460 m/sec, 102939128 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 585 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 145/262 35/2000 Referendum-PT-0200-CTLFireability-2024-10 8722329 m, 49227 m/sec, 106372140 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 590 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 150/262 36/2000 Referendum-PT-0200-CTLFireability-2024-10 8970064 m, 49547 m/sec, 109864973 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 595 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 155/262 38/2000 Referendum-PT-0200-CTLFireability-2024-10 9274511 m, 60889 m/sec, 113572437 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 600 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 160/262 39/2000 Referendum-PT-0200-CTLFireability-2024-10 9550851 m, 55268 m/sec, 117178111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 605 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 165/262 40/2000 Referendum-PT-0200-CTLFireability-2024-10 9825642 m, 54958 m/sec, 120705284 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 610 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 170/262 41/2000 Referendum-PT-0200-CTLFireability-2024-10 10083523 m, 51576 m/sec, 124226746 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 615 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 175/262 42/2000 Referendum-PT-0200-CTLFireability-2024-10 10379565 m, 59208 m/sec, 127930819 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 620 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 180/262 43/2000 Referendum-PT-0200-CTLFireability-2024-10 10698531 m, 63793 m/sec, 131665607 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 625 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 185/262 45/2000 Referendum-PT-0200-CTLFireability-2024-10 10997357 m, 59765 m/sec, 135288152 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 630 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 190/262 46/2000 Referendum-PT-0200-CTLFireability-2024-10 11274453 m, 55419 m/sec, 138901272 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 635 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 195/262 47/2000 Referendum-PT-0200-CTLFireability-2024-10 11569756 m, 59060 m/sec, 142433550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 640 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 200/262 48/2000 Referendum-PT-0200-CTLFireability-2024-10 11842339 m, 54516 m/sec, 145963725 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 645 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 205/262 49/2000 Referendum-PT-0200-CTLFireability-2024-10 12111009 m, 53734 m/sec, 149502422 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 650 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 210/262 50/2000 Referendum-PT-0200-CTLFireability-2024-10 12375384 m, 52875 m/sec, 153099764 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 655 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 215/262 51/2000 Referendum-PT-0200-CTLFireability-2024-10 12675282 m, 59979 m/sec, 156768403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 660 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 220/262 52/2000 Referendum-PT-0200-CTLFireability-2024-10 12946585 m, 54260 m/sec, 160299337 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 665 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 225/262 53/2000 Referendum-PT-0200-CTLFireability-2024-10 13206196 m, 51922 m/sec, 163766777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 670 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 230/262 54/2000 Referendum-PT-0200-CTLFireability-2024-10 13469915 m, 52743 m/sec, 167345281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 675 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 235/262 56/2000 Referendum-PT-0200-CTLFireability-2024-10 13739243 m, 53865 m/sec, 170924971 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 680 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 240/262 57/2000 Referendum-PT-0200-CTLFireability-2024-10 13988153 m, 49782 m/sec, 174410049 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 685 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 245/262 58/2000 Referendum-PT-0200-CTLFireability-2024-10 14285124 m, 59394 m/sec, 178100020 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 690 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 250/262 59/2000 Referendum-PT-0200-CTLFireability-2024-10 14557829 m, 54541 m/sec, 181640818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 695 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 255/262 60/2000 Referendum-PT-0200-CTLFireability-2024-10 14823051 m, 53044 m/sec, 185091613 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 700 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 260/262 61/2000 Referendum-PT-0200-CTLFireability-2024-10 15070622 m, 49514 m/sec, 188559877 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 705 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 35 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-10 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 710 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 32 (type EXCL) for 31 Referendum-PT-0200-CTLFireability-2024-09
[[35mlola[0m][I] time limit : 262 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 Referendum-PT-0200-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 2890 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 32 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 835
[[35mlola[0m][I] fired transitions : 914
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 5/262 2/5 Referendum-PT-0200-CTLFireability-2024-10 408363 m, -2932451 m/sec, 4005024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 715 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 10/262 4/5 Referendum-PT-0200-CTLFireability-2024-10 765251 m, 71377 m/sec, 7891241 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 720 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 35 CTL EXCL 15/262 5/5 Referendum-PT-0200-CTLFireability-2024-10 1094727 m, 65895 m/sec, 11679919 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 725 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 35 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-10 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 730 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 29 (type EXCL) for 28 Referendum-PT-0200-CTLFireability-2024-08
[[35mlola[0m][I] time limit : 287 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 29 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-08
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 113
[[35mlola[0m][I] fired transitions : 112
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 Referendum-PT-0200-CTLFireability-2024-07
[[35mlola[0m][I] time limit : 318 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 200
[[35mlola[0m][I] fired transitions : 199
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 Referendum-PT-0200-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 358 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 5/358 3/2000 Referendum-PT-0200-CTLFireability-2024-05 348872 m, 69774 m/sec, 6275895 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 735 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 10/358 4/2000 Referendum-PT-0200-CTLFireability-2024-05 651167 m, 60459 m/sec, 12346299 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 740 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 15/358 6/2000 Referendum-PT-0200-CTLFireability-2024-05 934997 m, 56766 m/sec, 18300926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 745 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 20/358 8/2000 Referendum-PT-0200-CTLFireability-2024-05 1216099 m, 56220 m/sec, 24145679 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 750 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 25/358 10/2000 Referendum-PT-0200-CTLFireability-2024-05 1485232 m, 53826 m/sec, 29875107 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 755 secs. Pages in use: 81
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 30/358 11/2000 Referendum-PT-0200-CTLFireability-2024-05 1745845 m, 52122 m/sec, 35609132 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 760 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 35/358 13/2000 Referendum-PT-0200-CTLFireability-2024-05 1993337 m, 49498 m/sec, 41369615 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 765 secs. Pages in use: 86
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 40/358 14/2000 Referendum-PT-0200-CTLFireability-2024-05 2251115 m, 51555 m/sec, 46941275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 770 secs. Pages in use: 88
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 45/358 16/2000 Referendum-PT-0200-CTLFireability-2024-05 2509198 m, 51616 m/sec, 52406010 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 775 secs. Pages in use: 91
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 50/358 17/2000 Referendum-PT-0200-CTLFireability-2024-05 2756609 m, 49482 m/sec, 57872397 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 780 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 55/358 19/2000 Referendum-PT-0200-CTLFireability-2024-05 2997142 m, 48106 m/sec, 63369427 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 785 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 60/358 20/2000 Referendum-PT-0200-CTLFireability-2024-05 3233426 m, 47256 m/sec, 68859576 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 790 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 65/358 22/2000 Referendum-PT-0200-CTLFireability-2024-05 3475475 m, 48409 m/sec, 74353040 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 795 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 70/358 23/2000 Referendum-PT-0200-CTLFireability-2024-05 3703116 m, 45528 m/sec, 79857920 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 800 secs. Pages in use: 103
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 75/358 24/2000 Referendum-PT-0200-CTLFireability-2024-05 3929921 m, 45361 m/sec, 85383708 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 805 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 80/358 26/2000 Referendum-PT-0200-CTLFireability-2024-05 4145850 m, 43185 m/sec, 90877676 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 810 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 85/358 27/2000 Referendum-PT-0200-CTLFireability-2024-05 4397134 m, 50256 m/sec, 96186034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 815 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 90/358 29/2000 Referendum-PT-0200-CTLFireability-2024-05 4643130 m, 49199 m/sec, 101458745 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 820 secs. Pages in use: 113
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 95/358 30/2000 Referendum-PT-0200-CTLFireability-2024-05 4883043 m, 47982 m/sec, 106732461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 825 secs. Pages in use: 116
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 100/358 32/2000 Referendum-PT-0200-CTLFireability-2024-05 5109726 m, 45336 m/sec, 112000640 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 830 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 105/358 33/2000 Referendum-PT-0200-CTLFireability-2024-05 5338321 m, 45719 m/sec, 117266995 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 835 secs. Pages in use: 121
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 110/358 35/2000 Referendum-PT-0200-CTLFireability-2024-05 5577043 m, 47744 m/sec, 122680297 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 840 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 115/358 36/2000 Referendum-PT-0200-CTLFireability-2024-05 5800327 m, 44656 m/sec, 128093400 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 845 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 120/358 37/2000 Referendum-PT-0200-CTLFireability-2024-05 6023809 m, 44696 m/sec, 133523485 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 850 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 125/358 39/2000 Referendum-PT-0200-CTLFireability-2024-05 6235631 m, 42364 m/sec, 138911117 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 855 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 130/358 40/2000 Referendum-PT-0200-CTLFireability-2024-05 6466908 m, 46255 m/sec, 144190975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 860 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 135/358 41/2000 Referendum-PT-0200-CTLFireability-2024-05 6693520 m, 45322 m/sec, 149471955 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 865 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 140/358 43/2000 Referendum-PT-0200-CTLFireability-2024-05 6918027 m, 44901 m/sec, 154845650 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 870 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 145/358 44/2000 Referendum-PT-0200-CTLFireability-2024-05 7134401 m, 43274 m/sec, 160182597 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 875 secs. Pages in use: 140
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 150/358 45/2000 Referendum-PT-0200-CTLFireability-2024-05 7334451 m, 40010 m/sec, 165491364 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 880 secs. Pages in use: 142
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 155/358 47/2000 Referendum-PT-0200-CTLFireability-2024-05 7562344 m, 45578 m/sec, 170883034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 885 secs. Pages in use: 145
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 160/358 48/2000 Referendum-PT-0200-CTLFireability-2024-05 7773102 m, 42151 m/sec, 176231304 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 890 secs. Pages in use: 147
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 165/358 49/2000 Referendum-PT-0200-CTLFireability-2024-05 7979469 m, 41273 m/sec, 181606476 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 895 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 170/358 50/2000 Referendum-PT-0200-CTLFireability-2024-05 8181361 m, 40378 m/sec, 186988114 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 900 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 175/358 52/2000 Referendum-PT-0200-CTLFireability-2024-05 8369502 m, 37628 m/sec, 192318348 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 905 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 180/358 53/2000 Referendum-PT-0200-CTLFireability-2024-05 8618108 m, 49721 m/sec, 197425534 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 910 secs. Pages in use: 156
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 185/358 55/2000 Referendum-PT-0200-CTLFireability-2024-05 8852319 m, 46842 m/sec, 202470107 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 915 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 190/358 56/2000 Referendum-PT-0200-CTLFireability-2024-05 9084704 m, 46477 m/sec, 207550351 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 920 secs. Pages in use: 161
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 195/358 57/2000 Referendum-PT-0200-CTLFireability-2024-05 9302292 m, 43517 m/sec, 212617369 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 925 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 200/358 59/2000 Referendum-PT-0200-CTLFireability-2024-05 9523486 m, 44238 m/sec, 217728755 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 930 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 205/358 60/2000 Referendum-PT-0200-CTLFireability-2024-05 9752756 m, 45854 m/sec, 222912549 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 935 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 210/358 61/2000 Referendum-PT-0200-CTLFireability-2024-05 9961192 m, 41687 m/sec, 228050024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 940 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 215/358 63/2000 Referendum-PT-0200-CTLFireability-2024-05 10181685 m, 44098 m/sec, 233218540 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 945 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 220/358 64/2000 Referendum-PT-0200-CTLFireability-2024-05 10383429 m, 40348 m/sec, 238334607 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 950 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 225/358 65/2000 Referendum-PT-0200-CTLFireability-2024-05 10597160 m, 42746 m/sec, 243446636 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 955 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 230/358 67/2000 Referendum-PT-0200-CTLFireability-2024-05 10822605 m, 45089 m/sec, 248568803 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 960 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 235/358 68/2000 Referendum-PT-0200-CTLFireability-2024-05 11033173 m, 42113 m/sec, 253692240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 965 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 240/358 69/2000 Referendum-PT-0200-CTLFireability-2024-05 11248679 m, 43101 m/sec, 258863429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 970 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 245/358 70/2000 Referendum-PT-0200-CTLFireability-2024-05 11451798 m, 40623 m/sec, 264020135 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 975 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 250/358 72/2000 Referendum-PT-0200-CTLFireability-2024-05 11659121 m, 41464 m/sec, 269173976 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 980 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 255/358 73/2000 Referendum-PT-0200-CTLFireability-2024-05 11867701 m, 41716 m/sec, 274323889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 985 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 260/358 74/2000 Referendum-PT-0200-CTLFireability-2024-05 12058638 m, 38187 m/sec, 279439473 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 990 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 265/358 75/2000 Referendum-PT-0200-CTLFireability-2024-05 12264180 m, 41108 m/sec, 284644287 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 995 secs. Pages in use: 196
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 270/358 76/2000 Referendum-PT-0200-CTLFireability-2024-05 12451315 m, 37427 m/sec, 289775672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1000 secs. Pages in use: 198
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 275/358 78/2000 Referendum-PT-0200-CTLFireability-2024-05 12648079 m, 39352 m/sec, 294897148 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1005 secs. Pages in use: 201
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 280/358 79/2000 Referendum-PT-0200-CTLFireability-2024-05 12877990 m, 45982 m/sec, 300056170 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1010 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 285/358 80/2000 Referendum-PT-0200-CTLFireability-2024-05 13091754 m, 42752 m/sec, 305218825 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1015 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 290/358 82/2000 Referendum-PT-0200-CTLFireability-2024-05 13310807 m, 43810 m/sec, 310400181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1020 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 295/358 83/2000 Referendum-PT-0200-CTLFireability-2024-05 13514830 m, 40804 m/sec, 315563098 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1025 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 300/358 84/2000 Referendum-PT-0200-CTLFireability-2024-05 13721126 m, 41259 m/sec, 320740098 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1030 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 305/358 86/2000 Referendum-PT-0200-CTLFireability-2024-05 13930415 m, 41857 m/sec, 325895563 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1035 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 310/358 87/2000 Referendum-PT-0200-CTLFireability-2024-05 14128621 m, 39641 m/sec, 331065314 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1040 secs. Pages in use: 216
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 315/358 88/2000 Referendum-PT-0200-CTLFireability-2024-05 14330961 m, 40468 m/sec, 336250060 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1045 secs. Pages in use: 218
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 320/358 89/2000 Referendum-PT-0200-CTLFireability-2024-05 14521016 m, 38011 m/sec, 341398242 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1050 secs. Pages in use: 220
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 325/358 90/2000 Referendum-PT-0200-CTLFireability-2024-05 14703586 m, 36514 m/sec, 346500082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1055 secs. Pages in use: 222
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 330/358 92/2000 Referendum-PT-0200-CTLFireability-2024-05 14918554 m, 42993 m/sec, 351658898 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1060 secs. Pages in use: 225
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 335/358 93/2000 Referendum-PT-0200-CTLFireability-2024-05 15120464 m, 40382 m/sec, 356781019 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1065 secs. Pages in use: 227
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 340/358 94/2000 Referendum-PT-0200-CTLFireability-2024-05 15319814 m, 39870 m/sec, 361968957 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1070 secs. Pages in use: 228
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 345/358 95/2000 Referendum-PT-0200-CTLFireability-2024-05 15514358 m, 38908 m/sec, 367154431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1075 secs. Pages in use: 230
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 350/358 96/2000 Referendum-PT-0200-CTLFireability-2024-05 15696079 m, 36344 m/sec, 372277867 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1080 secs. Pages in use: 232
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 355/358 98/2000 Referendum-PT-0200-CTLFireability-2024-05 15895937 m, 39971 m/sec, 377465580 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1085 secs. Pages in use: 235
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 20 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-05 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-02: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1090 secs. Pages in use: 237
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 11 (type EXCL) for 10 Referendum-PT-0200-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 358 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 20 (type EXCL) for 19 Referendum-PT-0200-CTLFireability-2024-05
[[35mlola[0m][I] time limit : 2510 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 11 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-02
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 202
[[35mlola[0m][I] fired transitions : 201
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 5/358 3/5 Referendum-PT-0200-CTLFireability-2024-05 333941 m, -3112399 m/sec, 5997199 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1095 secs. Pages in use: 242
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 20 CTL EXCL 10/358 4/5 Referendum-PT-0200-CTLFireability-2024-05 629000 m, 59011 m/sec, 11877713 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1100 secs. Pages in use: 245
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 20 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-05 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-01: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-12: EFEG 0 1 0 0 3 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1105 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 8 (type EXCL) for 3 Referendum-PT-0200-CTLFireability-2024-01
[[35mlola[0m][I] time limit : 415 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 8 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 201
[[35mlola[0m][I] fired transitions : 403
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 52 (type EXCL) for 40 Referendum-PT-0200-CTLFireability-2024-12
[[35mlola[0m][I] time limit : 623 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 52 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-12
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 4
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 23 (type EXCL) for 22 Referendum-PT-0200-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 831 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 23 (type EXCL) for Referendum-PT-0200-CTLFireability-2024-06
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 2
[[35mlola[0m][I] fired transitions : 3
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 Referendum-PT-0200-CTLFireability-2024-00
[[35mlola[0m][I] time limit : 1247 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 5/1247 2/2000 Referendum-PT-0200-CTLFireability-2024-00 326803 m, 65360 m/sec, 6199572 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1110 secs. Pages in use: 247
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 10/1247 4/2000 Referendum-PT-0200-CTLFireability-2024-00 613521 m, 57343 m/sec, 12181780 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1115 secs. Pages in use: 251
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 15/1247 6/2000 Referendum-PT-0200-CTLFireability-2024-00 881556 m, 53607 m/sec, 18002033 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1120 secs. Pages in use: 255
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 20/1247 7/2000 Referendum-PT-0200-CTLFireability-2024-00 1140657 m, 51820 m/sec, 23775593 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1125 secs. Pages in use: 258
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 25/1247 9/2000 Referendum-PT-0200-CTLFireability-2024-00 1398995 m, 51667 m/sec, 29377261 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1130 secs. Pages in use: 262
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 30/1247 11/2000 Referendum-PT-0200-CTLFireability-2024-00 1640600 m, 48321 m/sec, 34967054 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1135 secs. Pages in use: 266
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 35/1247 12/2000 Referendum-PT-0200-CTLFireability-2024-00 1881759 m, 48231 m/sec, 40614476 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1140 secs. Pages in use: 271
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 40/1247 13/2000 Referendum-PT-0200-CTLFireability-2024-00 2102510 m, 44150 m/sec, 46215077 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1145 secs. Pages in use: 274
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 45/1247 15/2000 Referendum-PT-0200-CTLFireability-2024-00 2358709 m, 51239 m/sec, 51619815 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1150 secs. Pages in use: 278
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 50/1247 16/2000 Referendum-PT-0200-CTLFireability-2024-00 2596462 m, 47550 m/sec, 57000125 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1155 secs. Pages in use: 281
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 55/1247 18/2000 Referendum-PT-0200-CTLFireability-2024-00 2834250 m, 47557 m/sec, 62429195 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1160 secs. Pages in use: 285
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 60/1247 19/2000 Referendum-PT-0200-CTLFireability-2024-00 3055765 m, 44303 m/sec, 67828984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1165 secs. Pages in use: 288
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 65/1247 21/2000 Referendum-PT-0200-CTLFireability-2024-00 3281938 m, 45234 m/sec, 73232082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1170 secs. Pages in use: 293
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 70/1247 22/2000 Referendum-PT-0200-CTLFireability-2024-00 3511354 m, 45883 m/sec, 78692474 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1175 secs. Pages in use: 296
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 75/1247 23/2000 Referendum-PT-0200-CTLFireability-2024-00 3727469 m, 43223 m/sec, 84129819 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1180 secs. Pages in use: 299
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 80/1247 25/2000 Referendum-PT-0200-CTLFireability-2024-00 3940443 m, 42594 m/sec, 89569000 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1185 secs. Pages in use: 303
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 85/1247 26/2000 Referendum-PT-0200-CTLFireability-2024-00 4144957 m, 40902 m/sec, 94998758 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1190 secs. Pages in use: 305
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 90/1247 27/2000 Referendum-PT-0200-CTLFireability-2024-00 4383258 m, 47660 m/sec, 100277113 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1195 secs. Pages in use: 309
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 95/1247 29/2000 Referendum-PT-0200-CTLFireability-2024-00 4616644 m, 46677 m/sec, 105481984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1200 secs. Pages in use: 313
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 100/1247 30/2000 Referendum-PT-0200-CTLFireability-2024-00 4843206 m, 45312 m/sec, 110710346 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1205 secs. Pages in use: 316
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 105/1247 31/2000 Referendum-PT-0200-CTLFireability-2024-00 5063792 m, 44117 m/sec, 115936768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1210 secs. Pages in use: 319
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 110/1247 33/2000 Referendum-PT-0200-CTLFireability-2024-00 5271192 m, 41480 m/sec, 121134571 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1215 secs. Pages in use: 323
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 115/1247 34/2000 Referendum-PT-0200-CTLFireability-2024-00 5496982 m, 45158 m/sec, 126385386 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1220 secs. Pages in use: 327
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 120/1247 35/2000 Referendum-PT-0200-CTLFireability-2024-00 5711695 m, 42942 m/sec, 131636041 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1225 secs. Pages in use: 329
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 125/1247 37/2000 Referendum-PT-0200-CTLFireability-2024-00 5922754 m, 42211 m/sec, 136881450 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1230 secs. Pages in use: 333
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 130/1247 38/2000 Referendum-PT-0200-CTLFireability-2024-00 6124415 m, 40332 m/sec, 142113218 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1235 secs. Pages in use: 336
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 135/1247 39/2000 Referendum-PT-0200-CTLFireability-2024-00 6318250 m, 38767 m/sec, 147316644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1240 secs. Pages in use: 340
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 140/1247 40/2000 Referendum-PT-0200-CTLFireability-2024-00 6548377 m, 46025 m/sec, 152673494 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1245 secs. Pages in use: 343
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 145/1247 42/2000 Referendum-PT-0200-CTLFireability-2024-00 6764935 m, 43311 m/sec, 157971697 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1250 secs. Pages in use: 348
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 150/1247 43/2000 Referendum-PT-0200-CTLFireability-2024-00 6978465 m, 42706 m/sec, 163278233 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1255 secs. Pages in use: 351
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 155/1247 44/2000 Referendum-PT-0200-CTLFireability-2024-00 7188251 m, 41957 m/sec, 168738811 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1260 secs. Pages in use: 354
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 160/1247 46/2000 Referendum-PT-0200-CTLFireability-2024-00 7389359 m, 40221 m/sec, 174112805 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1265 secs. Pages in use: 359
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 165/1247 47/2000 Referendum-PT-0200-CTLFireability-2024-00 7600068 m, 42141 m/sec, 179495359 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1270 secs. Pages in use: 362
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 170/1247 48/2000 Referendum-PT-0200-CTLFireability-2024-00 7806885 m, 41363 m/sec, 184950770 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1275 secs. Pages in use: 365
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 175/1247 49/2000 Referendum-PT-0200-CTLFireability-2024-00 8006515 m, 39926 m/sec, 190317308 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1280 secs. Pages in use: 368
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 180/1247 51/2000 Referendum-PT-0200-CTLFireability-2024-00 8199151 m, 38527 m/sec, 195671554 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1285 secs. Pages in use: 372
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 185/1247 52/2000 Referendum-PT-0200-CTLFireability-2024-00 8380340 m, 36237 m/sec, 201038919 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1290 secs. Pages in use: 376
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 190/1247 53/2000 Referendum-PT-0200-CTLFireability-2024-00 8626201 m, 49172 m/sec, 206221269 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1295 secs. Pages in use: 379
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 195/1247 55/2000 Referendum-PT-0200-CTLFireability-2024-00 8854034 m, 45566 m/sec, 211361175 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1300 secs. Pages in use: 384
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 200/1247 56/2000 Referendum-PT-0200-CTLFireability-2024-00 9082987 m, 45790 m/sec, 216594702 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1305 secs. Pages in use: 387
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 205/1247 57/2000 Referendum-PT-0200-CTLFireability-2024-00 9296758 m, 42754 m/sec, 221767896 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1310 secs. Pages in use: 390
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 210/1247 59/2000 Referendum-PT-0200-CTLFireability-2024-00 9509853 m, 42619 m/sec, 226955555 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1315 secs. Pages in use: 394
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 215/1247 60/2000 Referendum-PT-0200-CTLFireability-2024-00 9731532 m, 44335 m/sec, 232173587 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1320 secs. Pages in use: 397
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 220/1247 61/2000 Referendum-PT-0200-CTLFireability-2024-00 9936501 m, 40993 m/sec, 237305148 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1325 secs. Pages in use: 400
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 225/1247 62/2000 Referendum-PT-0200-CTLFireability-2024-00 10143967 m, 41493 m/sec, 242418758 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1330 secs. Pages in use: 403
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 230/1247 64/2000 Referendum-PT-0200-CTLFireability-2024-00 10336861 m, 38578 m/sec, 247463517 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1335 secs. Pages in use: 407
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 235/1247 65/2000 Referendum-PT-0200-CTLFireability-2024-00 10537643 m, 40156 m/sec, 252708824 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1340 secs. Pages in use: 410
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 240/1247 66/2000 Referendum-PT-0200-CTLFireability-2024-00 10764138 m, 45299 m/sec, 258022905 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1345 secs. Pages in use: 413
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 245/1247 67/2000 Referendum-PT-0200-CTLFireability-2024-00 10976648 m, 42502 m/sec, 263298144 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1350 secs. Pages in use: 416
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 250/1247 69/2000 Referendum-PT-0200-CTLFireability-2024-00 11191788 m, 43028 m/sec, 268613836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1355 secs. Pages in use: 421
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 255/1247 70/2000 Referendum-PT-0200-CTLFireability-2024-00 11392962 m, 40234 m/sec, 273888107 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1360 secs. Pages in use: 424
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 260/1247 71/2000 Referendum-PT-0200-CTLFireability-2024-00 11591534 m, 39714 m/sec, 279157728 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1365 secs. Pages in use: 427
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 265/1247 73/2000 Referendum-PT-0200-CTLFireability-2024-00 11797404 m, 41174 m/sec, 284440002 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1370 secs. Pages in use: 431
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 270/1247 74/2000 Referendum-PT-0200-CTLFireability-2024-00 11999374 m, 40394 m/sec, 289758240 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1375 secs. Pages in use: 434
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 275/1247 75/2000 Referendum-PT-0200-CTLFireability-2024-00 12195155 m, 39156 m/sec, 295033461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1380 secs. Pages in use: 437
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 280/1247 76/2000 Referendum-PT-0200-CTLFireability-2024-00 12381765 m, 37322 m/sec, 300204768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1385 secs. Pages in use: 441
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 285/1247 77/2000 Referendum-PT-0200-CTLFireability-2024-00 12556269 m, 34900 m/sec, 305309378 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1390 secs. Pages in use: 443
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 290/1247 78/2000 Referendum-PT-0200-CTLFireability-2024-00 12774706 m, 43687 m/sec, 310440095 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1395 secs. Pages in use: 446
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 295/1247 80/2000 Referendum-PT-0200-CTLFireability-2024-00 12985799 m, 42218 m/sec, 315566928 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1400 secs. Pages in use: 450
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 300/1247 81/2000 Referendum-PT-0200-CTLFireability-2024-00 13192085 m, 41257 m/sec, 320712875 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1405 secs. Pages in use: 453
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 305/1247 82/2000 Referendum-PT-0200-CTLFireability-2024-00 13398442 m, 41271 m/sec, 326002366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1410 secs. Pages in use: 456
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 310/1247 83/2000 Referendum-PT-0200-CTLFireability-2024-00 13595760 m, 39463 m/sec, 331316272 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1415 secs. Pages in use: 459
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 315/1247 85/2000 Referendum-PT-0200-CTLFireability-2024-00 13810207 m, 42889 m/sec, 336692334 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1420 secs. Pages in use: 463
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 320/1247 86/2000 Referendum-PT-0200-CTLFireability-2024-00 14008711 m, 39700 m/sec, 341889874 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1425 secs. Pages in use: 466
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 325/1247 87/2000 Referendum-PT-0200-CTLFireability-2024-00 14196828 m, 37623 m/sec, 347010635 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1430 secs. Pages in use: 470
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 330/1247 88/2000 Referendum-PT-0200-CTLFireability-2024-00 14389647 m, 38563 m/sec, 352241083 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1435 secs. Pages in use: 472
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 335/1247 89/2000 Referendum-PT-0200-CTLFireability-2024-00 14575843 m, 37239 m/sec, 357508423 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1440 secs. Pages in use: 476
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 340/1247 91/2000 Referendum-PT-0200-CTLFireability-2024-00 14771067 m, 39044 m/sec, 362806866 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1445 secs. Pages in use: 480
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 345/1247 92/2000 Referendum-PT-0200-CTLFireability-2024-00 14978741 m, 41534 m/sec, 368131293 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1450 secs. Pages in use: 483
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 350/1247 93/2000 Referendum-PT-0200-CTLFireability-2024-00 15172691 m, 38790 m/sec, 373381645 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1455 secs. Pages in use: 486
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 355/1247 94/2000 Referendum-PT-0200-CTLFireability-2024-00 15369627 m, 39387 m/sec, 378630506 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1460 secs. Pages in use: 489
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 360/1247 95/2000 Referendum-PT-0200-CTLFireability-2024-00 15555593 m, 37193 m/sec, 383823789 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1465 secs. Pages in use: 492
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 365/1247 96/2000 Referendum-PT-0200-CTLFireability-2024-00 15728652 m, 34611 m/sec, 389015318 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1470 secs. Pages in use: 496
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 370/1247 98/2000 Referendum-PT-0200-CTLFireability-2024-00 15931782 m, 40626 m/sec, 394360025 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1475 secs. Pages in use: 500
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 375/1247 99/2000 Referendum-PT-0200-CTLFireability-2024-00 16117663 m, 37176 m/sec, 399624975 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1480 secs. Pages in use: 502
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 380/1247 100/2000 Referendum-PT-0200-CTLFireability-2024-00 16298117 m, 36090 m/sec, 404875991 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1485 secs. Pages in use: 505
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 385/1247 101/2000 Referendum-PT-0200-CTLFireability-2024-00 16479442 m, 36265 m/sec, 410153034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1490 secs. Pages in use: 508
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 390/1247 102/2000 Referendum-PT-0200-CTLFireability-2024-00 16651440 m, 34399 m/sec, 415374461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1495 secs. Pages in use: 511
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 395/1247 103/2000 Referendum-PT-0200-CTLFireability-2024-00 16837228 m, 37157 m/sec, 420545093 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1500 secs. Pages in use: 514
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 400/1247 105/2000 Referendum-PT-0200-CTLFireability-2024-00 17074195 m, 47393 m/sec, 425624276 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1505 secs. Pages in use: 518
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 405/1247 106/2000 Referendum-PT-0200-CTLFireability-2024-00 17289662 m, 43093 m/sec, 430631100 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1510 secs. Pages in use: 521
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 410/1247 107/2000 Referendum-PT-0200-CTLFireability-2024-00 17515890 m, 45245 m/sec, 435758016 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1515 secs. Pages in use: 524
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 415/1247 109/2000 Referendum-PT-0200-CTLFireability-2024-00 17722938 m, 41409 m/sec, 440798111 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1520 secs. Pages in use: 528
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 420/1247 110/2000 Referendum-PT-0200-CTLFireability-2024-00 17933814 m, 42175 m/sec, 445853499 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1525 secs. Pages in use: 531
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 425/1247 111/2000 Referendum-PT-0200-CTLFireability-2024-00 18146976 m, 42632 m/sec, 450906753 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1530 secs. Pages in use: 534
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 430/1247 112/2000 Referendum-PT-0200-CTLFireability-2024-00 18343579 m, 39320 m/sec, 455926216 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1535 secs. Pages in use: 538
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 435/1247 114/2000 Referendum-PT-0200-CTLFireability-2024-00 18551582 m, 41600 m/sec, 461022657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1540 secs. Pages in use: 542
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 440/1247 115/2000 Referendum-PT-0200-CTLFireability-2024-00 18741980 m, 38079 m/sec, 466043226 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1545 secs. Pages in use: 545
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 445/1247 116/2000 Referendum-PT-0200-CTLFireability-2024-00 18937442 m, 39092 m/sec, 471069733 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1550 secs. Pages in use: 548
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 450/1247 117/2000 Referendum-PT-0200-CTLFireability-2024-00 19155577 m, 43627 m/sec, 476185451 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1555 secs. Pages in use: 551
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 455/1247 119/2000 Referendum-PT-0200-CTLFireability-2024-00 19360175 m, 40919 m/sec, 481257812 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1560 secs. Pages in use: 555
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 460/1247 120/2000 Referendum-PT-0200-CTLFireability-2024-00 19565917 m, 41148 m/sec, 486349684 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1565 secs. Pages in use: 558
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 465/1247 121/2000 Referendum-PT-0200-CTLFireability-2024-00 19761862 m, 39189 m/sec, 491450967 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1570 secs. Pages in use: 562
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 470/1247 122/2000 Referendum-PT-0200-CTLFireability-2024-00 19948326 m, 37292 m/sec, 496513415 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1575 secs. Pages in use: 565
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 475/1247 124/2000 Referendum-PT-0200-CTLFireability-2024-00 20153350 m, 41004 m/sec, 501631806 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1580 secs. Pages in use: 569
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 480/1247 125/2000 Referendum-PT-0200-CTLFireability-2024-00 20346035 m, 38537 m/sec, 506698938 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1585 secs. Pages in use: 572
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 485/1247 126/2000 Referendum-PT-0200-CTLFireability-2024-00 20533345 m, 37462 m/sec, 511755971 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1590 secs. Pages in use: 576
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 490/1247 127/2000 Referendum-PT-0200-CTLFireability-2024-00 20714488 m, 36228 m/sec, 516798982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1595 secs. Pages in use: 579
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 495/1247 128/2000 Referendum-PT-0200-CTLFireability-2024-00 20893630 m, 35828 m/sec, 521859322 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1600 secs. Pages in use: 582
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 500/1247 129/2000 Referendum-PT-0200-CTLFireability-2024-00 21094345 m, 40143 m/sec, 526951917 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1605 secs. Pages in use: 585
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 505/1247 131/2000 Referendum-PT-0200-CTLFireability-2024-00 21313664 m, 43863 m/sec, 532146877 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1610 secs. Pages in use: 589
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 510/1247 132/2000 Referendum-PT-0200-CTLFireability-2024-00 21513974 m, 40062 m/sec, 537246149 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1615 secs. Pages in use: 593
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 515/1247 133/2000 Referendum-PT-0200-CTLFireability-2024-00 21722284 m, 41662 m/sec, 542415807 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1620 secs. Pages in use: 596
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 520/1247 134/2000 Referendum-PT-0200-CTLFireability-2024-00 21916843 m, 38911 m/sec, 547535804 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1625 secs. Pages in use: 599
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 525/1247 135/2000 Referendum-PT-0200-CTLFireability-2024-00 22114016 m, 39434 m/sec, 552672515 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1630 secs. Pages in use: 602
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 530/1247 137/2000 Referendum-PT-0200-CTLFireability-2024-00 22314289 m, 40054 m/sec, 557816181 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1635 secs. Pages in use: 606
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 535/1247 138/2000 Referendum-PT-0200-CTLFireability-2024-00 22504660 m, 38074 m/sec, 562933738 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1640 secs. Pages in use: 610
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 540/1247 139/2000 Referendum-PT-0200-CTLFireability-2024-00 22697050 m, 38478 m/sec, 568077033 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1645 secs. Pages in use: 613
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 545/1247 140/2000 Referendum-PT-0200-CTLFireability-2024-00 22880341 m, 36658 m/sec, 573191392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1650 secs. Pages in use: 616
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 550/1247 141/2000 Referendum-PT-0200-CTLFireability-2024-00 23051667 m, 34265 m/sec, 578245021 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1655 secs. Pages in use: 619
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 555/1247 142/2000 Referendum-PT-0200-CTLFireability-2024-00 23259061 m, 41478 m/sec, 583414788 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1660 secs. Pages in use: 622
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 560/1247 144/2000 Referendum-PT-0200-CTLFireability-2024-00 23454381 m, 39064 m/sec, 588542984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1665 secs. Pages in use: 626
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 565/1247 145/2000 Referendum-PT-0200-CTLFireability-2024-00 23644163 m, 37956 m/sec, 593685889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1670 secs. Pages in use: 630
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 570/1247 146/2000 Referendum-PT-0200-CTLFireability-2024-00 23832981 m, 37763 m/sec, 598833203 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1675 secs. Pages in use: 632
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 575/1247 147/2000 Referendum-PT-0200-CTLFireability-2024-00 24013422 m, 36088 m/sec, 603934833 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1680 secs. Pages in use: 635
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 580/1247 148/2000 Referendum-PT-0200-CTLFireability-2024-00 24194837 m, 36283 m/sec, 609051255 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1685 secs. Pages in use: 638
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 585/1247 149/2000 Referendum-PT-0200-CTLFireability-2024-00 24378743 m, 36781 m/sec, 614174175 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1690 secs. Pages in use: 641
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 590/1247 150/2000 Referendum-PT-0200-CTLFireability-2024-00 24561823 m, 36616 m/sec, 619322935 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1695 secs. Pages in use: 644
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 595/1247 151/2000 Referendum-PT-0200-CTLFireability-2024-00 24738289 m, 35293 m/sec, 624436460 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1700 secs. Pages in use: 648
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 600/1247 153/2000 Referendum-PT-0200-CTLFireability-2024-00 24907806 m, 33903 m/sec, 629505854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1705 secs. Pages in use: 652
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 605/1247 154/2000 Referendum-PT-0200-CTLFireability-2024-00 25076334 m, 33705 m/sec, 634581108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1710 secs. Pages in use: 654
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 610/1247 155/2000 Referendum-PT-0200-CTLFireability-2024-00 25266869 m, 38107 m/sec, 639682779 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1715 secs. Pages in use: 657
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 615/1247 156/2000 Referendum-PT-0200-CTLFireability-2024-00 25484392 m, 43504 m/sec, 644828214 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1720 secs. Pages in use: 660
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 620/1247 157/2000 Referendum-PT-0200-CTLFireability-2024-00 25684832 m, 40088 m/sec, 649948100 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1725 secs. Pages in use: 663
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 625/1247 159/2000 Referendum-PT-0200-CTLFireability-2024-00 25897125 m, 42458 m/sec, 655146759 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1730 secs. Pages in use: 667
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 630/1247 160/2000 Referendum-PT-0200-CTLFireability-2024-00 26091293 m, 38833 m/sec, 660263758 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1735 secs. Pages in use: 670
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 635/1247 161/2000 Referendum-PT-0200-CTLFireability-2024-00 26286690 m, 39079 m/sec, 665396424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1740 secs. Pages in use: 672
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 640/1247 162/2000 Referendum-PT-0200-CTLFireability-2024-00 26488207 m, 40303 m/sec, 670556169 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1745 secs. Pages in use: 676
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 645/1247 163/2000 Referendum-PT-0200-CTLFireability-2024-00 26681373 m, 38633 m/sec, 675687941 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1750 secs. Pages in use: 679
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 650/1247 165/2000 Referendum-PT-0200-CTLFireability-2024-00 26870685 m, 37862 m/sec, 680803253 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1755 secs. Pages in use: 683
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 655/1247 166/2000 Referendum-PT-0200-CTLFireability-2024-00 27055192 m, 36901 m/sec, 685887997 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1760 secs. Pages in use: 686
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 660/1247 167/2000 Referendum-PT-0200-CTLFireability-2024-00 27228176 m, 34596 m/sec, 690936345 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1765 secs. Pages in use: 688
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 665/1247 168/2000 Referendum-PT-0200-CTLFireability-2024-00 27431080 m, 40580 m/sec, 696086388 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1770 secs. Pages in use: 691
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 670/1247 169/2000 Referendum-PT-0200-CTLFireability-2024-00 27629254 m, 39634 m/sec, 701246086 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1775 secs. Pages in use: 694
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 675/1247 170/2000 Referendum-PT-0200-CTLFireability-2024-00 27815876 m, 37324 m/sec, 706360680 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1780 secs. Pages in use: 697
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 680/1247 171/2000 Referendum-PT-0200-CTLFireability-2024-00 28007602 m, 38345 m/sec, 711509166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1785 secs. Pages in use: 700
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 685/1247 173/2000 Referendum-PT-0200-CTLFireability-2024-00 28187637 m, 36007 m/sec, 716617389 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1790 secs. Pages in use: 704
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 690/1247 174/2000 Referendum-PT-0200-CTLFireability-2024-00 28367911 m, 36054 m/sec, 721747033 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1795 secs. Pages in use: 707
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 695/1247 175/2000 Referendum-PT-0200-CTLFireability-2024-00 28556473 m, 37712 m/sec, 726908347 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1800 secs. Pages in use: 710
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 700/1247 176/2000 Referendum-PT-0200-CTLFireability-2024-00 28738437 m, 36392 m/sec, 732054748 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1805 secs. Pages in use: 713
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 705/1247 177/2000 Referendum-PT-0200-CTLFireability-2024-00 28914987 m, 35310 m/sec, 737175792 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1810 secs. Pages in use: 716
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 710/1247 178/2000 Referendum-PT-0200-CTLFireability-2024-00 29087169 m, 34436 m/sec, 742280583 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1815 secs. Pages in use: 720
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 715/1247 179/2000 Referendum-PT-0200-CTLFireability-2024-00 29256754 m, 33917 m/sec, 747396067 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1820 secs. Pages in use: 722
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 720/1247 180/2000 Referendum-PT-0200-CTLFireability-2024-00 29436485 m, 35946 m/sec, 752521782 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1825 secs. Pages in use: 725
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 725/1247 181/2000 Referendum-PT-0200-CTLFireability-2024-00 29637452 m, 40193 m/sec, 757673764 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1830 secs. Pages in use: 728
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 730/1247 183/2000 Referendum-PT-0200-CTLFireability-2024-00 29832068 m, 38923 m/sec, 762853977 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1835 secs. Pages in use: 732
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 735/1247 184/2000 Referendum-PT-0200-CTLFireability-2024-00 30024229 m, 38432 m/sec, 768024429 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1840 secs. Pages in use: 734
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 740/1247 185/2000 Referendum-PT-0200-CTLFireability-2024-00 30210046 m, 37163 m/sec, 773187805 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1845 secs. Pages in use: 737
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 745/1247 186/2000 Referendum-PT-0200-CTLFireability-2024-00 30384599 m, 34910 m/sec, 778297209 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1850 secs. Pages in use: 740
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 750/1247 187/2000 Referendum-PT-0200-CTLFireability-2024-00 30577784 m, 38637 m/sec, 783478321 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1855 secs. Pages in use: 743
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 755/1247 188/2000 Referendum-PT-0200-CTLFireability-2024-00 30762244 m, 36892 m/sec, 788640957 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1860 secs. Pages in use: 747
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 760/1247 189/2000 Referendum-PT-0200-CTLFireability-2024-00 30932528 m, 34056 m/sec, 793747903 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1865 secs. Pages in use: 749
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 765/1247 190/2000 Referendum-PT-0200-CTLFireability-2024-00 31118161 m, 37126 m/sec, 798972426 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1870 secs. Pages in use: 752
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 770/1247 191/2000 Referendum-PT-0200-CTLFireability-2024-00 31289552 m, 34278 m/sec, 804123608 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1875 secs. Pages in use: 755
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 775/1247 192/2000 Referendum-PT-0200-CTLFireability-2024-00 31449600 m, 32009 m/sec, 809216306 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1880 secs. Pages in use: 758
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 780/1247 194/2000 Referendum-PT-0200-CTLFireability-2024-00 31647134 m, 39506 m/sec, 814466355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1885 secs. Pages in use: 761
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 785/1247 195/2000 Referendum-PT-0200-CTLFireability-2024-00 31831092 m, 36791 m/sec, 819639557 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1890 secs. Pages in use: 764
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 790/1247 196/2000 Referendum-PT-0200-CTLFireability-2024-00 32005303 m, 34842 m/sec, 824774027 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1895 secs. Pages in use: 767
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 795/1247 197/2000 Referendum-PT-0200-CTLFireability-2024-00 32185657 m, 36070 m/sec, 829952952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1900 secs. Pages in use: 770
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 800/1247 198/2000 Referendum-PT-0200-CTLFireability-2024-00 32333243 m, 29517 m/sec, 834378979 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1905 secs. Pages in use: 773
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 812/1247 198/2000 Referendum-PT-0200-CTLFireability-2024-00 32372635 m, 7878 m/sec, 835631218 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1917 secs. Pages in use: 773
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 838/1247 198/2000 Referendum-PT-0200-CTLFireability-2024-00 32372810 m, 35 m/sec, 835637539 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1945 secs. Pages in use: 773
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 885/1247 198/2000 Referendum-PT-0200-CTLFireability-2024-00 32374353 m, 308 m/sec, 835692098 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1993 secs. Pages in use: 773
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 915/1247 198/2000 Referendum-PT-0200-CTLFireability-2024-00 32376862 m, 501 m/sec, 835764018 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2021 secs. Pages in use: 774
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 935/1247 198/2000 Referendum-PT-0200-CTLFireability-2024-00 32376918 m, 11 m/sec, 835765691 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2043 secs. Pages in use: 774
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-01: CONJ false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-02: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-06: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-07: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-08: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-09: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[31mReferendum-PT-0200-CTLFireability-2024-11: CTL false CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-12: EFEG true state space /EFEG[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-13: CTL true CTL model checker[0m
[[35mlola[0m][.] [1m[32mReferendum-PT-0200-CTLFireability-2024-14: CTL true CTL model checker[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-00: CTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-04: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-05: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-10: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] Referendum-PT-0200-CTLFireability-2024-15: CTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 CTL EXCL 979/1247 198/2000 Referendum-PT-0200-CTLFireability-2024-00 32376992 m, 14 m/sec, 835767923 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 2086 secs. Pages in use: 774
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
/home/mcc/BenchKit/BenchKit_head.sh: line 23: 409 Killed $BK_TOOL --conf=/home/mcc/BenchKit/bin/myconf --formula=$BK_EXAMINATION.xml $LOLA_TIMELIMIT $LOLA_MEMLIMIT model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Referendum-PT-0200"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is Referendum-PT-0200, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r313-tall-171662340900618"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Referendum-PT-0200.tgz
mv Referendum-PT-0200 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;