About the Execution of LoLA for Railroad-PT-010
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
1390.031 | 153278.00 | 155160.00 | 482.80 | FFFFTTFTFTFFFFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r313-tall-171662340600482.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is Railroad-PT-010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r313-tall-171662340600482
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 544K
-rw-r--r-- 1 mcc users 7.3K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 56K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Apr 23 07:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 23 07:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 23 07:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 12 14:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 135K Apr 12 14:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.9K Apr 12 14:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Apr 12 14:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 82K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-00
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-01
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-02
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-03
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-04
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-05
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-06
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-07
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-08
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-09
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-10
FORMULA_NAME Railroad-PT-010-CTLFireability-2024-11
FORMULA_NAME Railroad-PT-010-CTLFireability-2023-12
FORMULA_NAME Railroad-PT-010-CTLFireability-2023-13
FORMULA_NAME Railroad-PT-010-CTLFireability-2023-14
FORMULA_NAME Railroad-PT-010-CTLFireability-2023-15
=== Now, execution of the tool begins
BK_START 1717331524219
FORMULA Railroad-PT-010-CTLFireability-2023-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2023-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2023-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2023-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-010-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[[35mlola[0m] [1mFINAL RESULTS[0m
[[35mlola[0m] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m] [1m[31mRailroad-PT-010-CTLFireability-2024-00: CTL false CTL model checker[0m
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[[35mlola[0m] [1m[31mRailroad-PT-010-CTLFireability-2024-02: CONJ false CTL model checker[0m
[[35mlola[0m] [1m[31mRailroad-PT-010-CTLFireability-2024-03: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mRailroad-PT-010-CTLFireability-2024-04: CTL true CTL model checker[0m
[[35mlola[0m] [1m[32mRailroad-PT-010-CTLFireability-2024-05: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mRailroad-PT-010-CTLFireability-2024-06: CTL false CTL model checker[0m
[[35mlola[0m] [1m[32mRailroad-PT-010-CTLFireability-2024-07: CTL true CTL model checker[0m
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[[35mlola[0m] [1m[31mRailroad-PT-010-CTLFireability-2023-13: AR false state space /EU[0m
[[35mlola[0m] [1m[32mRailroad-PT-010-CTLFireability-2023-14: CTL true CTL model checker[0m
[[35mlola[0m] [1m[31mRailroad-PT-010-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m]
[[35mlola[0m] Time elapsed: 153 secs. Pages in use: 9
BK_STOP 1717331677497
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains place/transition net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading formula.
[[35mlola[0m][I] Using XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading XML formula
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mCTLFireability.xml[0m
[[35mlola[0m][I] Rule S: 10 transitions removed,31 places removed
[[35mlola[0m][I] LAUNCH task # 62 (type CNST) for 61 Railroad-PT-010-CTLFireability-2023-15
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 62 (type CNST) for Railroad-PT-010-CTLFireability-2023-15
[[35mlola[0m][I] result : false
[[35mlola[0m][I] LAUNCH task # 21 (type EXCL) for 6 Railroad-PT-010-CTLFireability-2024-02
[[35mlola[0m][I] time limit : 189 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 21 (type EXCL) for Railroad-PT-010-CTLFireability-2024-02
[[35mlola[0m][I] result : true
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 35 (type EXCL) for 34 Railroad-PT-010-CTLFireability-2024-06
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 73 (type EQUN) for 55 Railroad-PT-010-CTLFireability-2023-13
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 73 (type EQUN) for Railroad-PT-010-CTLFireability-2023-13
[[35mlola[0m][I] result : true
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mRailroad-PT-010-CTLFireability-2023-15: INITIAL false preprocessing[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-02: CONJ 0 2 0 0 6 0 0 4
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-06: CTL 0 0 1 0 1 0 0 0
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[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-11: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2023-13: AR 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 35 CTL EXCL 5/224 4/2000 Railroad-PT-010-CTLFireability-2024-06 762079 m, 152415 m/sec, 4960860 t fired, .
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[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-01: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-02: CONJ 0 2 0 0 6 0 0 4
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2023-12: CTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2023-13: AR 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 35 CTL EXCL 10/224 6/2000 Railroad-PT-010-CTLFireability-2024-06 1223155 m, 92215 m/sec, 9859386 t fired, .
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[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] 35 CTL EXCL 15/224 7/2000 Railroad-PT-010-CTLFireability-2024-06 1548326 m, 65034 m/sec, 14700369 t fired, .
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[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-02: CONJ 0 2 0 0 6 0 0 4
[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
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[[35mlola[0m][.] Railroad-PT-010-CTLFireability-2023-13: AR 0 1 0 0 2 0 0 0
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[[35mlola[0m][.] 35 CTL EXCL 20/224 8/2000 Railroad-PT-010-CTLFireability-2024-06 1778778 m, 46090 m/sec, 19423984 t fired, .
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[[35mlola[0m][.] 35 CTL EXCL 25/224 9/2000 Railroad-PT-010-CTLFireability-2024-06 1932055 m, 30655 m/sec, 24171852 t fired, .
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[[35mlola[0m][I] markings : 155991
[[35mlola[0m][I] fired transitions : 1427290
[[35mlola[0m][I] time used : 1
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 59 (type EXCL) for 58 Railroad-PT-010-CTLFireability-2023-14
[[35mlola[0m][I] time limit : 1723 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 59 (type EXCL) for Railroad-PT-010-CTLFireability-2023-14
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 12
[[35mlola[0m][I] fired transitions : 72
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 47 (type EXCL) for 46 Railroad-PT-010-CTLFireability-2024-10
[[35mlola[0m][I] time limit : 3447 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 47 (type EXCL) for Railroad-PT-010-CTLFireability-2024-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 51046
[[35mlola[0m][I] fired transitions : 163883
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] Portfolio finished: no open formulas
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Railroad-PT-010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is Railroad-PT-010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r313-tall-171662340600482"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Railroad-PT-010.tgz
mv Railroad-PT-010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;