fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r313-tall-171662340500474
Last Updated
July 7, 2024

About the Execution of LoLA for Railroad-PT-005

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
201.728 1247.00 1145.00 10.10 TTTTFFTTTFFFTTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r313-tall-171662340500474.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is Railroad-PT-005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r313-tall-171662340500474
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 532K
-rw-r--r-- 1 mcc users 9.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 92K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.6K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Apr 23 07:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 23 07:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 23 07:46 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:46 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Apr 12 13:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 128K Apr 12 13:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Apr 12 13:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 90K Apr 12 13:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 23 07:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 23 07:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 4 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 32K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-00
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-01
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-02
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-03
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-04
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-05
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-06
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-07
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-08
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-09
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-10
FORMULA_NAME Railroad-PT-005-CTLFireability-2024-11
FORMULA_NAME Railroad-PT-005-CTLFireability-2023-12
FORMULA_NAME Railroad-PT-005-CTLFireability-2023-13
FORMULA_NAME Railroad-PT-005-CTLFireability-2023-14
FORMULA_NAME Railroad-PT-005-CTLFireability-2023-15

=== Now, execution of the tool begins

BK_START 1717331457209

FORMULA Railroad-PT-005-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2023-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2023-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2024-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2023-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Railroad-PT-005-CTLFireability-2023-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] Railroad-PT-005-CTLFireability-2024-00: EF true state space
[lola] Railroad-PT-005-CTLFireability-2024-01: CTL true CTL model checker
[lola] Railroad-PT-005-CTLFireability-2024-02: EF true findpath
[lola] Railroad-PT-005-CTLFireability-2024-03: F true state space / EG
[lola] Railroad-PT-005-CTLFireability-2024-04: CTL false CTL model checker
[lola] Railroad-PT-005-CTLFireability-2024-05: AG false findpath
[lola] Railroad-PT-005-CTLFireability-2024-06: DISJ true CTL model checker
[lola] Railroad-PT-005-CTLFireability-2024-07: CONJ true CONJ
[lola] Railroad-PT-005-CTLFireability-2024-08: DISJ true findpath
[lola] Railroad-PT-005-CTLFireability-2024-09: AXAG false state space /EXEF
[lola] Railroad-PT-005-CTLFireability-2024-10: CTL false CTL model checker
[lola] Railroad-PT-005-CTLFireability-2024-11: CONJ false CTL model checker
[lola] Railroad-PT-005-CTLFireability-2023-12: CTL true CTL model checker
[lola] Railroad-PT-005-CTLFireability-2023-13: CTL true CTL model checker
[lola] Railroad-PT-005-CTLFireability-2023-14: EFAG false tscc_search
[lola] Railroad-PT-005-CTLFireability-2023-15: CTL true CTL model checker
[lola]
[lola] Time elapsed: 1 secs. Pages in use: 1

BK_STOP 1717331458456

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from CTLFireability.xml
[lola][I] Rule S: 5 transitions removed,16 places removed
[lola][I] LAUNCH task # 90 (type EXCL) for 0 Railroad-PT-005-CTLFireability-2024-00
[lola][I] time limit : 92 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 88 (type FNDP) for 0 Railroad-PT-005-CTLFireability-2024-00
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 89 (type EQUN) for 0 Railroad-PT-005-CTLFireability-2024-00
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 90 (type EXCL) for Railroad-PT-005-CTLFireability-2024-00
[lola][I] result : true
[lola][I] markings : 12
[lola][I] fired transitions : 11
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 88 (type FNDP) for Railroad-PT-005-CTLFireability-2024-00 (obsolete)
[lola][W] CANCELED task # 89 (type EQUN) for Railroad-PT-005-CTLFireability-2024-00 (obsolete)
[lola][I] LAUNCH task # 4 (type EXCL) for 3 Railroad-PT-005-CTLFireability-2024-01
[lola][I] time limit : 94 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 4 (type EXCL) for Railroad-PT-005-CTLFireability-2024-01
[lola][I] result : true
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 92 (type EXCL) for 9 Railroad-PT-005-CTLFireability-2024-03
[lola][I] time limit : 97 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 95 (type EQUN) for 9 Railroad-PT-005-CTLFireability-2024-03
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 99 (type EQUN) for 55 Railroad-PT-005-CTLFireability-2024-09
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 92 (type EXCL) for Railroad-PT-005-CTLFireability-2024-03
[lola][I] result : false
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 95 (type EQUN) for Railroad-PT-005-CTLFireability-2024-03 (obsolete)
[lola][I] LAUNCH task # 97 (type EXCL) for 55 Railroad-PT-005-CTLFireability-2024-09
[lola][I] time limit : 99 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 100 (type FNDP) for 6 Railroad-PT-005-CTLFireability-2024-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 101 (type EQUN) for 6 Railroad-PT-005-CTLFireability-2024-02
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 100 (type FNDP) for Railroad-PT-005-CTLFireability-2024-02
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 101 (type EQUN) for Railroad-PT-005-CTLFireability-2024-02 (obsolete)
[lola][I] FINISHED task # 97 (type EXCL) for Railroad-PT-005-CTLFireability-2024-09
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 99 (type EQUN) for Railroad-PT-005-CTLFireability-2024-09 (obsolete)
[lola][I] FINISHED task # 88 (type FNDP) for Railroad-PT-005-CTLFireability-2024-00
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 89 (type EQUN) for Railroad-PT-005-CTLFireability-2024-00
[lola][I] result : true
[lola][I] LAUNCH task # 23 (type EXCL) for 18 Railroad-PT-005-CTLFireability-2024-06
[lola][I] time limit : 133 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 23 (type EXCL) for Railroad-PT-005-CTLFireability-2024-06
[lola][I] result : false
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 39 (type EXCL) for 18 Railroad-PT-005-CTLFireability-2024-06
[lola][I] time limit : 156 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 95 (type EQUN) for Railroad-PT-005-CTLFireability-2024-03
[lola][I] result : true
[lola][I] LAUNCH task # 110 (type FNDP) for 48 Railroad-PT-005-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 111 (type EQUN) for 48 Railroad-PT-005-CTLFireability-2024-08
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 101 (type EQUN) for Railroad-PT-005-CTLFireability-2024-02
[lola][I] result : true
[lola][I] LAUNCH task # 109 (type FNDP) for 15 Railroad-PT-005-CTLFireability-2024-05
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 39 (type EXCL) for Railroad-PT-005-CTLFireability-2024-06
[lola][I] result : false
[lola][I] markings : 1838
[lola][I] fired transitions : 11375
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 68 (type EXCL) for 61 Railroad-PT-005-CTLFireability-2024-11
[lola][I] time limit : 199 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 68 (type EXCL) for Railroad-PT-005-CTLFireability-2024-11
[lola][I] result : true
[lola][I] markings : 6
[lola][I] fired transitions : 5
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 64 (type EXCL) for 61 Railroad-PT-005-CTLFireability-2024-11
[lola][I] time limit : 257 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 64 (type EXCL) for Railroad-PT-005-CTLFireability-2024-11
[lola][I] result : false
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 46 (type EXCL) for 41 Railroad-PT-005-CTLFireability-2024-07
[lola][I] time limit : 276 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 99 (type EQUN) for Railroad-PT-005-CTLFireability-2024-09
[lola][I] result : true
[lola][I] FINISHED task # 109 (type FNDP) for Railroad-PT-005-CTLFireability-2024-05
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] FINISHED task # 46 (type EXCL) for Railroad-PT-005-CTLFireability-2024-07
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 33 (type EXCL) for 18 Railroad-PT-005-CTLFireability-2024-06
[lola][I] time limit : 327 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 33 (type EXCL) for Railroad-PT-005-CTLFireability-2024-06
[lola][I] result : true
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 13 (type EXCL) for 12 Railroad-PT-005-CTLFireability-2024-04
[lola][I] time limit : 399 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 13 (type EXCL) for Railroad-PT-005-CTLFireability-2024-04
[lola][I] result : false
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 112 (type EXCL) for 48 Railroad-PT-005-CTLFireability-2024-08
[lola][I] time limit : 449 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 110 (type FNDP) for Railroad-PT-005-CTLFireability-2024-08
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 111 (type EQUN) for Railroad-PT-005-CTLFireability-2024-08 (obsolete)
[lola][W] CANCELED task # 112 (type EXCL) for Railroad-PT-005-CTLFireability-2024-08 (obsolete)
[lola][I] LAUNCH task # 80 (type EXCL) for 79 Railroad-PT-005-CTLFireability-2023-13
[lola][I] time limit : 599 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 80 (type EXCL) for Railroad-PT-005-CTLFireability-2023-13
[lola][I] result : true
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 77 (type EXCL) for 76 Railroad-PT-005-CTLFireability-2023-12
[lola][I] time limit : 719 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 77 (type EXCL) for Railroad-PT-005-CTLFireability-2023-12
[lola][I] result : true
[lola][I] markings : 72
[lola][I] fired transitions : 127
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 44 (type EXCL) for 41 Railroad-PT-005-CTLFireability-2024-07
[lola][I] time limit : 899 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 44 (type EXCL) for Railroad-PT-005-CTLFireability-2024-07
[lola][I] result : true
[lola][I] markings : 5
[lola][I] fired transitions : 9
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 59 (type EXCL) for 58 Railroad-PT-005-CTLFireability-2024-10
[lola][I] time limit : 1799 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 111 (type EQUN) for Railroad-PT-005-CTLFireability-2024-08
[lola][I] result : true
[lola][I] LAUNCH task # 125 (type EQUN) for 82 Railroad-PT-005-CTLFireability-2023-14
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 127 (type EQUN) for 82 Railroad-PT-005-CTLFireability-2023-14
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 125 (type EQUN) for Railroad-PT-005-CTLFireability-2023-14
[lola][I] result : true
[lola][I] FINISHED task # 59 (type EXCL) for Railroad-PT-005-CTLFireability-2024-10
[lola][I] result : false
[lola][I] markings : 1838
[lola][I] fired transitions : 19882
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 86 (type EXCL) for 85 Railroad-PT-005-CTLFireability-2023-15
[lola][I] time limit : 1799 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 127 (type EQUN) for Railroad-PT-005-CTLFireability-2023-14
[lola][I] result : unknown
[lola][I] FINISHED task # 86 (type EXCL) for Railroad-PT-005-CTLFireability-2023-15
[lola][I] result : true
[lola][I] markings : 39
[lola][I] fired transitions : 112
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 122 (type EXCL) for 82 Railroad-PT-005-CTLFireability-2023-14
[lola][I] time limit : 3599 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 122 (type EXCL) for Railroad-PT-005-CTLFireability-2023-14
[lola][I] result : true
[lola][I] markings : 633
[lola][I] fired transitions : 2406
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Railroad-PT-005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is Railroad-PT-005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r313-tall-171662340500474"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Railroad-PT-005.tgz
mv Railroad-PT-005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;