fond
Model Checking Contest 2024
14th edition, Geneva, Switzerland, June 25, 2024
Execution of r313-tall-171662339800115
Last Updated
July 7, 2024

About the Execution of LoLA for RERS17pb113-PT-1

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16165.659 3600000.00 13226234.00 536.00 FFF?T?F??FTFFTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r313-tall-171662339800115.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is RERS17pb113-PT-1, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r313-tall-171662339800115
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 7.0K May 14 13:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 74K May 14 13:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K May 14 13:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 50K May 14 13:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.1K May 19 07:12 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 19 16:13 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Apr 23 07:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 23 07:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K May 14 13:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 124K May 14 13:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K May 14 13:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 78K May 14 13:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 19 07:14 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 19 15:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 18 16:43 equiv_col
-rw-r--r-- 1 mcc users 2 May 18 16:43 instance
-rw-r--r-- 1 mcc users 6 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 15M May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-00
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-01
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-02
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-03
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-04
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-05
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-06
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-07
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-08
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-09
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-10
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-11
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-12
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-13
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-14
FORMULA_NAME RERS17pb113-PT-1-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1717249444053

FORMULA RERS17pb113-PT-1-LTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RERS17pb113-PT-1-LTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains place/transition net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading formula.
[lola][I] Using XML format (--xmlformula)
[lola][I] reading XML formula
[lola][I] reading formula from LTLCardinality.xml
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 0 0 0 0 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 0 0 0 0 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 0 0 0 0 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 0 0 0 0 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 0 0 0 0 0 0 0
[lola][.]
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 0 0 0 0 0 0 0
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 0 0 0 0 0 0 0
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 0 0 0 0 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 0 0 0 0 0 0 0
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 0 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.]
[lola][.] Time elapsed: 478 secs. Pages in use: 1
[lola][.] # running tasks: 0 of 4. Visible: 16
[lola][I] LAUNCH task # 50 (type EXCL) for 45 RERS17pb113-PT-1-LTLCardinality-15
[lola][I] time limit : 259 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 0 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 0 1 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 50 LTL EXCL 2/259 1/2000 RERS17pb113-PT-1-LTLCardinality-15 79 m, 15 m/sec, 78 t fired, .
[lola][.]
[lola][.] Time elapsed: 483 secs. Pages in use: 1
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I] LAUNCH task # 53 (type FNDP) for 45 RERS17pb113-PT-1-LTLCardinality-15
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 54 (type EQUN) for 45 RERS17pb113-PT-1-LTLCardinality-15
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 57 (type FNDP) for 3 RERS17pb113-PT-1-LTLCardinality-01
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 2 1 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 2 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ 0 1 3 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 50 LTL EXCL 7/259 1/2000 RERS17pb113-PT-1-LTLCardinality-15 268 m, 37 m/sec, 267 t fired, .
[lola][.] 53 EF FNDP 1/1556 0/5 RERS17pb113-PT-1-LTLCardinality-15 1 attempts, .
[lola][.] 54 EF STEQ 1/1556 0/5 RERS17pb113-PT-1-LTLCardinality-15 sara not yet started (preprocessing).
[lola][.] 57 EF FNDP 1/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 1 attempts, .
[lola][.]
[lola][.] Time elapsed: 488 secs. Pages in use: 1
[lola][.] # running tasks: 4 of 4. Visible: 16
[lola][I] FINISHED task # 53 (type FNDP) for RERS17pb113-PT-1-LTLCardinality-15
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 2
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 50 (type EXCL) for RERS17pb113-PT-1-LTLCardinality-15 (obsolete)
[lola][W] CANCELED task # 54 (type EQUN) for RERS17pb113-PT-1-LTLCardinality-15 (obsolete)
[lola][I] LAUNCH task # 43 (type EXCL) for 42 RERS17pb113-PT-1-LTLCardinality-14
[lola][I] time limit : 311 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 64 (type EQUN) for 30 RERS17pb113-PT-1-LTLCardinality-10
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 58 (type EQUN) for 3 RERS17pb113-PT-1-LTLCardinality-01
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 43 (type EXCL) for RERS17pb113-PT-1-LTLCardinality-14
[lola][I] result : true
[lola][I] markings : 4
[lola][I] fired transitions : 3
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 37 (type EXCL) for 36 RERS17pb113-PT-1-LTLCardinality-12
[lola][I] time limit : 345 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 64 (type EQUN) for RERS17pb113-PT-1-LTLCardinality-10
[lola][I] result : unknown
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 1 2 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 4/345 1/2000 RERS17pb113-PT-1-LTLCardinality-12 81448 m, 16289 m/sec, 497070 t fired, .
[lola][.] 57 EF FNDP 6/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 1 attempts, .
[lola][.] 58 EF STEQ 4/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.]
[lola][.] Time elapsed: 493 secs. Pages in use: 2
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 1 2 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 9/345 2/2000 RERS17pb113-PT-1-LTLCardinality-12 212508 m, 26212 m/sec, 1447997 t fired, .
[lola][.] 57 EF FNDP 11/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 1 attempts, .
[lola][.] 58 EF STEQ 9/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.]
[lola][.] Time elapsed: 498 secs. Pages in use: 2
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 1 2 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 14/345 3/2000 RERS17pb113-PT-1-LTLCardinality-12 337098 m, 24918 m/sec, 2424095 t fired, .
[lola][.] 57 EF FNDP 16/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 1 attempts, .
[lola][.] 58 EF STEQ 14/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.]
[lola][.] Time elapsed: 503 secs. Pages in use: 3
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 1 2 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 19/345 4/2000 RERS17pb113-PT-1-LTLCardinality-12 465745 m, 25729 m/sec, 3347663 t fired, .
[lola][.] 57 EF FNDP 21/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 1 attempts, .
[lola][.] 58 EF STEQ 19/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.]
[lola][.] Time elapsed: 508 secs. Pages in use: 4
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 1 2 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 24/345 5/2000 RERS17pb113-PT-1-LTLCardinality-12 589733 m, 24797 m/sec, 4332940 t fired, .
[lola][.] 57 EF FNDP 26/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 2 attempts, .
[lola][.] 58 EF STEQ 24/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.]
[lola][.] Time elapsed: 513 secs. Pages in use: 5
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 1 2 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 29/345 6/2000 RERS17pb113-PT-1-LTLCardinality-12 706677 m, 23388 m/sec, 5371955 t fired, .
[lola][.] 57 EF FNDP 31/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 2 attempts, .
[lola][.] 58 EF STEQ 29/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.]
[lola][.] Time elapsed: 518 secs. Pages in use: 6
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 1 2 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 37 LTL EXCL 34/345 7/2000 RERS17pb113-PT-1-LTLCardinality-12 828074 m, 24279 m/sec, 6342819 t fired, .
[lola][.] 57 EF FNDP 36/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 2 attempts, .
[lola][.] 58 EF STEQ 34/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.]
[lola][.] Time elapsed: 523 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I] FINISHED task # 37 (type EXCL) for RERS17pb113-PT-1-LTLCardinality-12
[lola][I] result : false
[lola][I] markings : 836362
[lola][I] fired transitions : 6400996
[lola][I] time used : 34
[lola][I] memory pages used : 7
[lola][I] LAUNCH task # 13 (type EXCL) for 12 RERS17pb113-PT-1-LTLCardinality-04
[lola][I] time limit : 384 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 13 (type EXCL) for RERS17pb113-PT-1-LTLCardinality-04
[lola][I] result : true
[lola][I] markings : 2
[lola][I] fired transitions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 1 (type EXCL) for 0 RERS17pb113-PT-1-LTLCardinality-00
[lola][I] time limit : 439 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 1 (type EXCL) for RERS17pb113-PT-1-LTLCardinality-00
[lola][I] result : false
[lola][I] markings : 1810
[lola][I] fired transitions : 1810
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 59 (type EXCL) for 3 RERS17pb113-PT-1-LTLCardinality-01
[lola][I] time limit : 512 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 41/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 3 attempts, .
[lola][.] 58 EF STEQ 39/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 5/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 1363 m, 272 m/sec, 1386 t fired, .
[lola][.]
[lola][.] Time elapsed: 528 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 46/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 3 attempts, .
[lola][.] 58 EF STEQ 44/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 10/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 2872 m, 301 m/sec, 2897 t fired, .
[lola][.]
[lola][.] Time elapsed: 533 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 51/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 4 attempts, .
[lola][.] 58 EF STEQ 49/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 15/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 4378 m, 301 m/sec, 4421 t fired, .
[lola][.]
[lola][.] Time elapsed: 538 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 56/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 4 attempts, .
[lola][.] 58 EF STEQ 54/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 20/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 5888 m, 302 m/sec, 5949 t fired, .
[lola][.]
[lola][.] Time elapsed: 543 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 61/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 4 attempts, .
[lola][.] 58 EF STEQ 59/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 25/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 7384 m, 299 m/sec, 7470 t fired, .
[lola][.]
[lola][.] Time elapsed: 548 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 66/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 4 attempts, .
[lola][.] 58 EF STEQ 64/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 30/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 8891 m, 301 m/sec, 8997 t fired, .
[lola][.]
[lola][.] Time elapsed: 553 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 71/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 5 attempts, .
[lola][.] 58 EF STEQ 69/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 35/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 10408 m, 303 m/sec, 11783 t fired, .
[lola][.]
[lola][.] Time elapsed: 558 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 76/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 6 attempts, .
[lola][.] 58 EF STEQ 74/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 40/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 11918 m, 302 m/sec, 17805 t fired, .
[lola][.]
[lola][.] Time elapsed: 563 secs. Pages in use: 7
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 81/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 6 attempts, .
[lola][.] 58 EF STEQ 79/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 45/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 13428 m, 302 m/sec, 23886 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 86/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 6 attempts, .
[lola][.] 58 EF STEQ 84/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 50/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 14935 m, 301 m/sec, 30086 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 91/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 6 attempts, .
[lola][.] 58 EF STEQ 89/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 55/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 16463 m, 305 m/sec, 36556 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 96/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 7 attempts, .
[lola][.] 58 EF STEQ 94/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 60/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 17973 m, 302 m/sec, 44355 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 101/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 7 attempts, .
[lola][.] 58 EF STEQ 99/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 65/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 19491 m, 303 m/sec, 52255 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 106/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 8 attempts, .
[lola][.] 58 EF STEQ 104/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 70/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 21019 m, 305 m/sec, 59534 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 111/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 9 attempts, .
[lola][.] 58 EF STEQ 109/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 75/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 22549 m, 306 m/sec, 66949 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 116/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 9 attempts, .
[lola][.] 58 EF STEQ 114/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 80/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 24075 m, 305 m/sec, 73582 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 121/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 10 attempts, .
[lola][.] 58 EF STEQ 119/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 85/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 25600 m, 305 m/sec, 80076 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 126/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 11 attempts, .
[lola][.] 58 EF STEQ 124/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 90/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 27118 m, 303 m/sec, 87563 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 131/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 11 attempts, .
[lola][.] 58 EF STEQ 129/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 95/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 28642 m, 304 m/sec, 94565 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 136/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 11 attempts, .
[lola][.] 58 EF STEQ 134/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 100/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 30157 m, 303 m/sec, 101351 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 141/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 11 attempts, .
[lola][.] 58 EF STEQ 139/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 105/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 31664 m, 301 m/sec, 108795 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 146/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 12 attempts, .
[lola][.] 58 EF STEQ 144/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 110/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 33159 m, 299 m/sec, 116030 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 151/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 12 attempts, .
[lola][.] 58 EF STEQ 149/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 115/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 34667 m, 301 m/sec, 123136 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 156/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 13 attempts, .
[lola][.] 58 EF STEQ 154/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 120/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 36185 m, 303 m/sec, 129475 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 161/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 13 attempts, .
[lola][.] 58 EF STEQ 159/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 125/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 37713 m, 305 m/sec, 136721 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 166/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 13 attempts, .
[lola][.] 58 EF STEQ 164/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 130/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 39230 m, 303 m/sec, 143624 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 171/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 14 attempts, .
[lola][.] 58 EF STEQ 169/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 135/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 40712 m, 296 m/sec, 151082 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 176/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 14 attempts, .
[lola][.] 58 EF STEQ 174/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 140/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 42218 m, 301 m/sec, 157729 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 181/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 15 attempts, .
[lola][.] 58 EF STEQ 179/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 145/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 43737 m, 303 m/sec, 164711 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 186/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 15 attempts, .
[lola][.] 58 EF STEQ 184/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 150/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 45245 m, 301 m/sec, 170879 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 191/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 16 attempts, .
[lola][.] 58 EF STEQ 189/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 155/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 46765 m, 304 m/sec, 178269 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 196/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 17 attempts, .
[lola][.] 58 EF STEQ 194/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 160/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 48286 m, 304 m/sec, 185337 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 201/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 17 attempts, .
[lola][.] 58 EF STEQ 199/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 165/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 49809 m, 304 m/sec, 191888 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 206/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 18 attempts, .
[lola][.] 58 EF STEQ 204/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 170/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 51324 m, 303 m/sec, 198982 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 211/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 18 attempts, .
[lola][.] 58 EF STEQ 209/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 175/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 52846 m, 304 m/sec, 205458 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 216/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 19 attempts, .
[lola][.] 58 EF STEQ 214/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 180/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 54361 m, 303 m/sec, 212454 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 221/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 19 attempts, .
[lola][.] 58 EF STEQ 219/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 185/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 55879 m, 303 m/sec, 218885 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 226/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 20 attempts, .
[lola][.] 58 EF STEQ 224/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 190/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 57409 m, 306 m/sec, 224774 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 231/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 20 attempts, .
[lola][.] 58 EF STEQ 229/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 195/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 58930 m, 304 m/sec, 232022 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 236/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 20 attempts, .
[lola][.] 58 EF STEQ 234/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 200/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 60429 m, 299 m/sec, 238932 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 241/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 21 attempts, .
[lola][.] 58 EF STEQ 239/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 205/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 61917 m, 297 m/sec, 247613 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 246/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 22 attempts, .
[lola][.] 58 EF STEQ 244/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 210/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 63430 m, 302 m/sec, 255708 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 251/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 22 attempts, .
[lola][.] 58 EF STEQ 249/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 215/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 64940 m, 302 m/sec, 263652 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 256/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 23 attempts, .
[lola][.] 58 EF STEQ 254/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 220/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 66469 m, 305 m/sec, 271261 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 261/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 24 attempts, .
[lola][.] 58 EF STEQ 259/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 225/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 67957 m, 297 m/sec, 278232 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 266/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 24 attempts, .
[lola][.] 58 EF STEQ 264/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 230/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 69466 m, 301 m/sec, 286727 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 271/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 24 attempts, .
[lola][.] 58 EF STEQ 269/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 235/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 70967 m, 300 m/sec, 294304 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 276/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 25 attempts, .
[lola][.] 58 EF STEQ 274/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 240/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 72495 m, 305 m/sec, 302925 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 281/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 26 attempts, .
[lola][.] 58 EF STEQ 279/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 245/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 74000 m, 301 m/sec, 311266 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 286/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 26 attempts, .
[lola][.] 58 EF STEQ 284/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 250/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 75492 m, 298 m/sec, 321092 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 291/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 26 attempts, .
[lola][.] 58 EF STEQ 289/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 255/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 77007 m, 303 m/sec, 330528 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 296/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 26 attempts, .
[lola][.] 58 EF STEQ 294/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 260/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 78515 m, 301 m/sec, 340393 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 301/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 27 attempts, .
[lola][.] 58 EF STEQ 299/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 265/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 80039 m, 304 m/sec, 349354 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 306/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 27 attempts, .
[lola][.] 58 EF STEQ 304/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 270/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 81550 m, 302 m/sec, 358199 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 311/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 27 attempts, .
[lola][.] 58 EF STEQ 309/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 275/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 83076 m, 305 m/sec, 368008 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 316/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 27 attempts, .
[lola][.] 58 EF STEQ 314/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 280/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 84583 m, 301 m/sec, 377605 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 321/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 28 attempts, .
[lola][.] 58 EF STEQ 319/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 285/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 86129 m, 309 m/sec, 385904 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 326/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 29 attempts, .
[lola][.] 58 EF STEQ 324/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 290/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 87643 m, 302 m/sec, 394002 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 331/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 29 attempts, .
[lola][.] 58 EF STEQ 329/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 295/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 89140 m, 299 m/sec, 402328 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 336/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 30 attempts, .
[lola][.] 58 EF STEQ 334/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 300/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 90641 m, 300 m/sec, 410280 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 341/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 31 attempts, .
[lola][.] 58 EF STEQ 339/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 305/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 92168 m, 305 m/sec, 419312 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 346/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 31 attempts, .
[lola][.] 58 EF STEQ 344/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 310/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 93693 m, 305 m/sec, 428684 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 351/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 32 attempts, .
[lola][.] 58 EF STEQ 349/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 315/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 95215 m, 304 m/sec, 437944 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 356/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 32 attempts, .
[lola][.] 58 EF STEQ 354/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 320/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 96729 m, 302 m/sec, 446415 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 361/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 33 attempts, .
[lola][.] 58 EF STEQ 359/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 325/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 98259 m, 306 m/sec, 454024 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 366/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 33 attempts, .
[lola][.] 58 EF STEQ 364/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 330/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 99740 m, 296 m/sec, 461376 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 371/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 34 attempts, .
[lola][.] 58 EF STEQ 369/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 335/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 101256 m, 303 m/sec, 469119 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 376/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 34 attempts, .
[lola][.] 58 EF STEQ 374/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 340/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 102762 m, 301 m/sec, 477855 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 381/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 34 attempts, .
[lola][.] 58 EF STEQ 379/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 345/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 104287 m, 305 m/sec, 484621 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 386/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 34 attempts, .
[lola][.] 58 EF STEQ 384/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 350/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 105781 m, 298 m/sec, 492382 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 391/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 34 attempts, .
[lola][.] 58 EF STEQ 389/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 355/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 107289 m, 301 m/sec, 500073 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 396/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 35 attempts, .
[lola][.] 58 EF STEQ 394/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 360/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 108803 m, 302 m/sec, 507656 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 401/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 35 attempts, .
[lola][.] 58 EF STEQ 399/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 365/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 110311 m, 301 m/sec, 515275 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 406/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 36 attempts, .
[lola][.] 58 EF STEQ 404/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 370/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 111816 m, 301 m/sec, 523374 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 411/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 37 attempts, .
[lola][.] 58 EF STEQ 409/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 375/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 113289 m, 294 m/sec, 531166 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 416/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 37 attempts, .
[lola][.] 58 EF STEQ 414/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 380/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 114759 m, 294 m/sec, 538613 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 421/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 38 attempts, .
[lola][.] 58 EF STEQ 419/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 385/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 116245 m, 297 m/sec, 546402 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 426/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 38 attempts, .
[lola][.] 58 EF STEQ 424/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 390/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 117762 m, 303 m/sec, 553520 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 431/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 39 attempts, .
[lola][.] 58 EF STEQ 429/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 395/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 119291 m, 305 m/sec, 562122 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 436/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 40 attempts, .
[lola][.] 58 EF STEQ 434/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 400/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 120778 m, 297 m/sec, 570393 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 441/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 40 attempts, .
[lola][.] 58 EF STEQ 439/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 405/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 122273 m, 299 m/sec, 580267 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 446/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 40 attempts, .
[lola][.] 58 EF STEQ 444/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 410/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 123787 m, 302 m/sec, 589730 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 451/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 40 attempts, .
[lola][.] 58 EF STEQ 449/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 415/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 125288 m, 300 m/sec, 599570 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 456/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 40 attempts, .
[lola][.] 58 EF STEQ 454/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 420/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 126815 m, 305 m/sec, 608739 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 461/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 40 attempts, .
[lola][.] 58 EF STEQ 459/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 425/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 128309 m, 298 m/sec, 617226 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 466/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 41 attempts, .
[lola][.] 58 EF STEQ 464/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 430/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 129816 m, 301 m/sec, 626941 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 471/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 41 attempts, .
[lola][.] 58 EF STEQ 469/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 435/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 131314 m, 299 m/sec, 636498 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 476/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 42 attempts, .
[lola][.] 58 EF STEQ 474/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 440/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 132865 m, 310 m/sec, 643146 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 481/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 42 attempts, .
[lola][.] 58 EF STEQ 479/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 445/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 134382 m, 303 m/sec, 649949 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 486/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 43 attempts, .
[lola][.] 58 EF STEQ 484/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 450/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 135877 m, 299 m/sec, 658184 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 491/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 44 attempts, .
[lola][.] 58 EF STEQ 489/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 455/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 137375 m, 299 m/sec, 666141 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 496/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 45 attempts, .
[lola][.] 58 EF STEQ 494/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 460/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 138887 m, 302 m/sec, 674544 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 501/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 46 attempts, .
[lola][.] 58 EF STEQ 499/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 465/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 140400 m, 302 m/sec, 682058 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 506/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 46 attempts, .
[lola][.] 58 EF STEQ 504/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 470/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 141905 m, 301 m/sec, 689421 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 511/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 46 attempts, .
[lola][.] 58 EF STEQ 509/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 475/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 143417 m, 302 m/sec, 696966 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 516/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 46 attempts, .
[lola][.] 58 EF STEQ 514/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 480/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 144914 m, 299 m/sec, 705571 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 521/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 46 attempts, .
[lola][.] 58 EF STEQ 519/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 485/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 146447 m, 306 m/sec, 711950 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 526/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 47 attempts, .
[lola][.] 58 EF STEQ 524/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 490/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 147965 m, 303 m/sec, 719153 t fired, .
[lola][.]
[lola][.] Time elapsed: 1013 secs. Pages in use: 7
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 531/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 47 attempts, .
[lola][.] 58 EF STEQ 529/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 495/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 149456 m, 298 m/sec, 726556 t fired, .
[lola][.]
[lola][.] Time elapsed: 1018 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 536/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 48 attempts, .
[lola][.] 58 EF STEQ 534/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 500/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 150938 m, 296 m/sec, 734949 t fired, .
[lola][.]
[lola][.] Time elapsed: 1023 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 541/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 48 attempts, .
[lola][.] 58 EF STEQ 539/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 505/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 152462 m, 304 m/sec, 743026 t fired, .
[lola][.]
[lola][.] Time elapsed: 1028 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 546/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 49 attempts, .
[lola][.] 58 EF STEQ 544/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 510/512 1/2000 RERS17pb113-PT-1-LTLCardinality-01 153976 m, 302 m/sec, 751010 t fired, .
[lola][.]
[lola][.] Time elapsed: 1033 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][W] CANCELED task # 59 (type EXCL) for RERS17pb113-PT-1-LTLCardinality-01 (local timeout)
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 2 0 1 1 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F 0 1 0 0 2 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 551/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 49 attempts, .
[lola][.] 58 EF STEQ 549/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.]
[lola][.] Time elapsed: 1038 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I] LAUNCH task # 61 (type EXCL) for 30 RERS17pb113-PT-1-LTLCardinality-10
[lola][I] time limit : 512 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 59 (type EXCL) for 3 RERS17pb113-PT-1-LTLCardinality-01
[lola][I] time limit : 2562 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 61 (type EXCL) for RERS17pb113-PT-1-LTLCardinality-10
[lola][I] result : false
[lola][I] markings : 1
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 556/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 50 attempts, .
[lola][.] 58 EF STEQ 554/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 5/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 1161 m, -30563 m/sec, 1181 t fired, .
[lola][.]
[lola][.] Time elapsed: 1043 secs. Pages in use: 7
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 561/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 50 attempts, .
[lola][.] 58 EF STEQ 559/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 10/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 2301 m, 228 m/sec, 2324 t fired, .
[lola][.]
[lola][.] Time elapsed: 1048 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 566/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 50 attempts, .
[lola][.] 58 EF STEQ 564/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 15/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 3481 m, 236 m/sec, 3506 t fired, .
[lola][.]
[lola][.] Time elapsed: 1053 secs. Pages in use: 7
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 571/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 51 attempts, .
[lola][.] 58 EF STEQ 569/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 20/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 4702 m, 244 m/sec, 4745 t fired, .
[lola][.]
[lola][.] Time elapsed: 1058 secs. Pages in use: 7
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 576/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 51 attempts, .
[lola][.] 58 EF STEQ 574/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 25/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 5893 m, 238 m/sec, 5954 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 581/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 51 attempts, .
[lola][.] 58 EF STEQ 579/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 30/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 7118 m, 245 m/sec, 7197 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 586/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 51 attempts, .
[lola][.] 58 EF STEQ 584/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 35/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 8332 m, 242 m/sec, 8438 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 591/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 52 attempts, .
[lola][.] 58 EF STEQ 589/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 40/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 9519 m, 237 m/sec, 9625 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 596/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 53 attempts, .
[lola][.] 58 EF STEQ 594/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 45/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 10696 m, 235 m/sec, 12749 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 601/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 53 attempts, .
[lola][.] 58 EF STEQ 599/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 50/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 11929 m, 246 m/sec, 17833 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 606/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 54 attempts, .
[lola][.] 58 EF STEQ 604/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 55/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 13208 m, 255 m/sec, 22902 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 611/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 55 attempts, .
[lola][.] 58 EF STEQ 609/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 60/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 14394 m, 237 m/sec, 28130 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 616/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 55 attempts, .
[lola][.] 58 EF STEQ 614/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 65/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 15614 m, 244 m/sec, 32689 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 621/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 55 attempts, .
[lola][.] 58 EF STEQ 619/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 70/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 16847 m, 246 m/sec, 38741 t fired, .
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 626/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 55 attempts, .
[lola][.] 58 EF STEQ 624/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 75/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 18047 m, 240 m/sec, 44712 t fired, .
[lola][.]
[lola][.] Time elapsed: 1113 secs. Pages in use: 7
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 631/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 56 attempts, .
[lola][.] 58 EF STEQ 629/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 80/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 19277 m, 246 m/sec, 51097 t fired, .
[lola][.]
[lola][.] Time elapsed: 1118 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 636/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 57 attempts, .
[lola][.] 58 EF STEQ 634/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 85/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 20391 m, 222 m/sec, 56728 t fired, .
[lola][.]
[lola][.] Time elapsed: 1123 secs. Pages in use: 7
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 641/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 57 attempts, .
[lola][.] 58 EF STEQ 639/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 90/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 21628 m, 247 m/sec, 62217 t fired, .
[lola][.]
[lola][.] Time elapsed: 1128 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 646/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 57 attempts, .
[lola][.] 58 EF STEQ 644/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 95/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 22818 m, 238 m/sec, 68127 t fired, .
[lola][.]
[lola][.] Time elapsed: 1133 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 651/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 58 attempts, .
[lola][.] 58 EF STEQ 649/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 100/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 24023 m, 241 m/sec, 73386 t fired, .
[lola][.]
[lola][.] Time elapsed: 1138 secs. Pages in use: 7
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 656/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 58 attempts, .
[lola][.] 58 EF STEQ 654/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 105/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 25177 m, 230 m/sec, 78162 t fired, .
[lola][.]
[lola][.] Time elapsed: 1143 secs. Pages in use: 7
[lola][.] # running tasks: 3 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 661/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 59 attempts, .
[lola][.] 58 EF STEQ 659/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 110/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 26371 m, 238 m/sec, 83891 t fired, .
[lola][.]
[lola][.] Time elapsed: 1148 secs. Pages in use: 7
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG 0 0 3 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 57 EF FNDP 666/3113 0/5 RERS17pb113-PT-1-LTLCardinality-01 59 attempts, .
[lola][.] 58 EF STEQ 664/3111 0/5 RERS17pb113-PT-1-LTLCardinality-01 sara not yet started (preprocessing).
[lola][.] 59 EF EXCL 115/512 1/5 RERS17pb113-PT-1-LTLCardinality-01 27542 m, 234 m/sec, 89206 t fired, .
[lola][.]
[lola][.] Time elapsed: 1153 secs. Pages in use: 7
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[lola][I] FINISHED task # 57 (type FNDP) for RERS17pb113-PT-1-LTLCardinality-01
[lola][I] result : true
[lola][I] tried executions : 60
[lola][I] time used : 671
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 58 (type EQUN) for RERS17pb113-PT-1-LTLCardinality-01 (obsolete)
[lola][W] CANCELED task # 59 (type EXCL) for RERS17pb113-PT-1-LTLCardinality-01 (obsolete)
[lola][I] LAUNCH task # 25 (type EXCL) for 24 RERS17pb113-PT-1-LTLCardinality-08
[lola][I] time limit : 610 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 0/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 9 m, 1 m/sec, 8 t fired, .
[lola][.]
[lola][.] Time elapsed: 1158 secs. Pages in use: 7
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 5/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 371 m, 72 m/sec, 370 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 10/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 772 m, 80 m/sec, 771 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 15/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 1251 m, 95 m/sec, 1378 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 20/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 1718 m, 93 m/sec, 2079 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 25/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 2190 m, 94 m/sec, 2786 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 30/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 2666 m, 95 m/sec, 3596 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 35/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 3137 m, 94 m/sec, 4302 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 40/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 3607 m, 94 m/sec, 5101 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 45/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 4080 m, 94 m/sec, 5823 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 50/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 4534 m, 90 m/sec, 6585 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 55/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 5011 m, 95 m/sec, 7310 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 60/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 5487 m, 95 m/sec, 8111 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 65/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 5967 m, 96 m/sec, 8934 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 70/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 6432 m, 93 m/sec, 9803 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 75/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 6905 m, 94 m/sec, 10621 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 80/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 7363 m, 91 m/sec, 11476 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 25 LTL EXCL 85/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 7815 m, 90 m/sec, 12269 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 90/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 8289 m, 94 m/sec, 13150 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 95/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 8756 m, 93 m/sec, 13899 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 100/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 9224 m, 93 m/sec, 14674 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 105/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 9689 m, 93 m/sec, 15404 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 110/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 10156 m, 93 m/sec, 16172 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 115/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 10606 m, 90 m/sec, 16869 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 120/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 11055 m, 89 m/sec, 17599 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 125/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 11496 m, 88 m/sec, 18312 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 130/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 11937 m, 88 m/sec, 19008 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 135/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 12390 m, 90 m/sec, 19788 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 140/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 12831 m, 88 m/sec, 20567 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 145/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 13278 m, 89 m/sec, 21396 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 150/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 13722 m, 88 m/sec, 22172 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 155/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 14159 m, 87 m/sec, 23012 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 160/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 14584 m, 85 m/sec, 23750 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 25 LTL EXCL 165/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 15017 m, 86 m/sec, 24574 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 170/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 15458 m, 88 m/sec, 25318 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 175/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 15897 m, 87 m/sec, 26140 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 180/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 16334 m, 87 m/sec, 26976 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 185/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 16771 m, 87 m/sec, 27858 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 190/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 17205 m, 86 m/sec, 28724 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 195/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 17647 m, 88 m/sec, 29605 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 200/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 18087 m, 88 m/sec, 30498 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 205/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 18522 m, 87 m/sec, 31355 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 25 LTL EXCL 210/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 18960 m, 87 m/sec, 32238 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 25 LTL EXCL 215/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 19403 m, 88 m/sec, 33010 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.]
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[lola][.] 25 LTL EXCL 220/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 19842 m, 87 m/sec, 33857 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
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[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 225/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 20279 m, 87 m/sec, 34610 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 230/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 20718 m, 87 m/sec, 35454 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 235/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 21158 m, 88 m/sec, 36188 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 240/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 21601 m, 88 m/sec, 37015 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 245/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 22054 m, 90 m/sec, 37731 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 250/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 22503 m, 89 m/sec, 38473 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 255/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 22951 m, 89 m/sec, 39235 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 260/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 23401 m, 90 m/sec, 40057 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 25 LTL EXCL 265/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 23848 m, 89 m/sec, 40860 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 270/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 24300 m, 90 m/sec, 41681 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 25 LTL EXCL 275/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 24749 m, 89 m/sec, 42493 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 25 LTL EXCL 280/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 25185 m, 87 m/sec, 43260 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 285/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 25627 m, 88 m/sec, 44123 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 290/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 26068 m, 88 m/sec, 44979 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 295/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 26510 m, 88 m/sec, 45901 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 300/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 26948 m, 87 m/sec, 46744 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 305/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 27388 m, 88 m/sec, 47688 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 310/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 27838 m, 90 m/sec, 48370 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 315/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 28274 m, 87 m/sec, 49091 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 320/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 28715 m, 88 m/sec, 49852 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 325/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 29146 m, 86 m/sec, 50639 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 330/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 29583 m, 87 m/sec, 51407 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 335/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 30030 m, 89 m/sec, 52222 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 340/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 30473 m, 88 m/sec, 52979 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 345/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 30917 m, 88 m/sec, 53689 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 350/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 31358 m, 88 m/sec, 54437 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 355/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 31794 m, 87 m/sec, 55211 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 25 LTL EXCL 360/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 32240 m, 89 m/sec, 56044 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 365/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 32681 m, 88 m/sec, 56810 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 25 LTL EXCL 370/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 33122 m, 88 m/sec, 57668 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 375/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 33552 m, 86 m/sec, 58500 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 380/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 33988 m, 87 m/sec, 59398 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 385/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 34426 m, 87 m/sec, 60170 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 390/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 34852 m, 85 m/sec, 60954 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 395/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 35292 m, 88 m/sec, 61667 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 400/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 35725 m, 86 m/sec, 62369 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 405/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 36162 m, 87 m/sec, 63114 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 410/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 36591 m, 85 m/sec, 63873 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 415/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 37024 m, 86 m/sec, 64682 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 420/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 37446 m, 84 m/sec, 65417 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 425/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 37870 m, 84 m/sec, 66242 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 25 LTL EXCL 430/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 38291 m, 84 m/sec, 66973 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 435/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 38714 m, 84 m/sec, 67766 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 440/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 39148 m, 86 m/sec, 68428 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 445/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 39577 m, 85 m/sec, 69140 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 450/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 40012 m, 87 m/sec, 69822 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 25 LTL EXCL 455/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 40436 m, 84 m/sec, 70510 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 460/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 40869 m, 86 m/sec, 71203 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 25 LTL EXCL 465/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 41303 m, 86 m/sec, 71881 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 25 LTL EXCL 470/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 41738 m, 87 m/sec, 72607 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 25 LTL EXCL 475/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 42167 m, 85 m/sec, 73269 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 480/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 42597 m, 86 m/sec, 74023 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 485/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 43034 m, 87 m/sec, 74761 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 490/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 43462 m, 85 m/sec, 75561 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 495/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 43908 m, 89 m/sec, 76331 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 500/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 44361 m, 90 m/sec, 77174 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 505/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 44816 m, 91 m/sec, 77983 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 510/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 45271 m, 91 m/sec, 78816 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 515/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 45722 m, 90 m/sec, 79622 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 25 LTL EXCL 520/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 46165 m, 88 m/sec, 80418 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 25 LTL EXCL 525/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 46609 m, 88 m/sec, 81263 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 25 LTL EXCL 530/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 47045 m, 87 m/sec, 82122 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 25 LTL EXCL 535/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 47478 m, 86 m/sec, 83015 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 540/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 47910 m, 86 m/sec, 83849 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 545/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 48351 m, 88 m/sec, 84791 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 550/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 48773 m, 84 m/sec, 85614 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 555/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 49211 m, 87 m/sec, 86537 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 560/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 49674 m, 92 m/sec, 87331 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 565/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 50140 m, 93 m/sec, 88214 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 570/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 50604 m, 92 m/sec, 89009 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 575/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 51055 m, 90 m/sec, 89854 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 580/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 51503 m, 89 m/sec, 90634 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 585/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 51941 m, 87 m/sec, 91449 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 590/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 52396 m, 91 m/sec, 92166 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 595/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 52817 m, 84 m/sec, 92851 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 600/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 53248 m, 86 m/sec, 93598 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 605/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 53683 m, 87 m/sec, 94361 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 25 LTL EXCL 610/610 1/2000 RERS17pb113-PT-1-LTLCardinality-08 54114 m, 86 m/sec, 95163 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][I] LAUNCH task # 16 (type EXCL) for 15 RERS17pb113-PT-1-LTLCardinality-05
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[lola][I] LAUNCH task # 25 (type EXCL) for 24 RERS17pb113-PT-1-LTLCardinality-08
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[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] 16 LTL EXCL 5/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 220 m, 44 m/sec, 219 t fired, .
[lola][.] 25 LTL EXCL 5/1827 1/5 RERS17pb113-PT-1-LTLCardinality-08 214 m, -10780 m/sec, 213 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 10/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 511 m, 58 m/sec, 510 t fired, .
[lola][.] 25 LTL EXCL 10/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 453 m, 47 m/sec, 452 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] 16 LTL EXCL 15/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 749 m, 47 m/sec, 748 t fired, .
[lola][.] 25 LTL EXCL 15/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 670 m, 43 m/sec, 669 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] 16 LTL EXCL 20/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 988 m, 47 m/sec, 987 t fired, .
[lola][.] 25 LTL EXCL 20/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 983 m, 62 m/sec, 1001 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 25/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 1215 m, 45 m/sec, 1214 t fired, .
[lola][.] 25 LTL EXCL 25/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 1273 m, 58 m/sec, 1415 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 30/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 1511 m, 59 m/sec, 1510 t fired, .
[lola][.] 25 LTL EXCL 30/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 1559 m, 57 m/sec, 1809 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 35/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 1740 m, 45 m/sec, 1739 t fired, .
[lola][.] 25 LTL EXCL 35/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 1858 m, 59 m/sec, 2271 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 40/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 1976 m, 47 m/sec, 1975 t fired, .
[lola][.] 25 LTL EXCL 40/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 2184 m, 65 m/sec, 2777 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 45/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 2206 m, 46 m/sec, 2205 t fired, .
[lola][.] 25 LTL EXCL 45/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 2448 m, 52 m/sec, 3202 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 50/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 2438 m, 46 m/sec, 2437 t fired, .
[lola][.] 25 LTL EXCL 50/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 2739 m, 58 m/sec, 3702 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 55/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 2695 m, 51 m/sec, 2694 t fired, .
[lola][.] 25 LTL EXCL 55/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 3019 m, 56 m/sec, 4103 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] 16 LTL EXCL 60/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 2916 m, 44 m/sec, 2915 t fired, .
[lola][.] 25 LTL EXCL 60/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 3321 m, 60 m/sec, 4588 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] 16 LTL EXCL 65/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 3153 m, 47 m/sec, 3152 t fired, .
[lola][.] 25 LTL EXCL 65/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 3597 m, 55 m/sec, 5082 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 70/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 3404 m, 50 m/sec, 3403 t fired, .
[lola][.] 25 LTL EXCL 70/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 3881 m, 56 m/sec, 5506 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 75/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 3645 m, 48 m/sec, 3644 t fired, .
[lola][.] 25 LTL EXCL 75/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 4151 m, 54 m/sec, 5937 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 80/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 3847 m, 40 m/sec, 3847 t fired, .
[lola][.] 25 LTL EXCL 80/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 4435 m, 56 m/sec, 6400 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] 16 LTL EXCL 85/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 4091 m, 48 m/sec, 4092 t fired, .
[lola][.] 25 LTL EXCL 85/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 4712 m, 55 m/sec, 6852 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 90/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 4379 m, 57 m/sec, 4380 t fired, .
[lola][.] 25 LTL EXCL 90/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 5016 m, 60 m/sec, 7319 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 95/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 4624 m, 49 m/sec, 4625 t fired, .
[lola][.] 25 LTL EXCL 95/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 5291 m, 55 m/sec, 7761 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 100/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 4860 m, 47 m/sec, 4894 t fired, .
[lola][.] 25 LTL EXCL 100/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 5580 m, 57 m/sec, 8280 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 105/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 5080 m, 44 m/sec, 5616 t fired, .
[lola][.] 25 LTL EXCL 105/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 5903 m, 64 m/sec, 8814 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 110/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 5370 m, 58 m/sec, 6809 t fired, .
[lola][.] 25 LTL EXCL 110/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 6217 m, 62 m/sec, 9380 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 115/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 5671 m, 60 m/sec, 8182 t fired, .
[lola][.] 25 LTL EXCL 115/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 6519 m, 60 m/sec, 9980 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 120/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 5884 m, 42 m/sec, 9138 t fired, .
[lola][.] 25 LTL EXCL 120/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 6799 m, 56 m/sec, 10426 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 125/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 6217 m, 66 m/sec, 10876 t fired, .
[lola][.] 25 LTL EXCL 125/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 7099 m, 60 m/sec, 10964 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 130/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 6501 m, 56 m/sec, 12277 t fired, .
[lola][.] 25 LTL EXCL 130/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 7376 m, 55 m/sec, 11503 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 135/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 6726 m, 45 m/sec, 13405 t fired, .
[lola][.] 25 LTL EXCL 135/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 7702 m, 65 m/sec, 12072 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 140/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 6982 m, 51 m/sec, 14671 t fired, .
[lola][.] 25 LTL EXCL 140/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 8044 m, 68 m/sec, 12678 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 145/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 7226 m, 48 m/sec, 16024 t fired, .
[lola][.] 25 LTL EXCL 145/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 8307 m, 52 m/sec, 13186 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 150/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 7434 m, 41 m/sec, 17201 t fired, .
[lola][.] 25 LTL EXCL 150/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 8596 m, 57 m/sec, 13646 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 155/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 7678 m, 48 m/sec, 18732 t fired, .
[lola][.] 25 LTL EXCL 155/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 8894 m, 59 m/sec, 14124 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 160/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 7925 m, 49 m/sec, 20259 t fired, .
[lola][.] 25 LTL EXCL 160/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 9190 m, 59 m/sec, 14612 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 165/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 8154 m, 45 m/sec, 21244 t fired, .
[lola][.] 25 LTL EXCL 165/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 9466 m, 55 m/sec, 15065 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 170/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 8398 m, 48 m/sec, 22487 t fired, .
[lola][.] 25 LTL EXCL 170/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 9746 m, 56 m/sec, 15498 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 175/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 8634 m, 47 m/sec, 23911 t fired, .
[lola][.] 25 LTL EXCL 175/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 10017 m, 54 m/sec, 15930 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 180/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 8992 m, 71 m/sec, 25818 t fired, .
[lola][.] 25 LTL EXCL 180/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 10297 m, 56 m/sec, 16437 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 185/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 9334 m, 68 m/sec, 27989 t fired, .
[lola][.] 25 LTL EXCL 185/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 10624 m, 65 m/sec, 16898 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 190/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 9581 m, 49 m/sec, 29383 t fired, .
[lola][.] 25 LTL EXCL 190/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 10944 m, 64 m/sec, 17408 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 195/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 9795 m, 42 m/sec, 30698 t fired, .
[lola][.] 25 LTL EXCL 195/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 11236 m, 58 m/sec, 17949 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 200/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 10041 m, 49 m/sec, 32165 t fired, .
[lola][.] 25 LTL EXCL 200/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 11502 m, 53 m/sec, 18321 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 205/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 10284 m, 48 m/sec, 33754 t fired, .
[lola][.] 25 LTL EXCL 205/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 11781 m, 55 m/sec, 18756 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] 16 LTL EXCL 210/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 10509 m, 45 m/sec, 35243 t fired, .
[lola][.] 25 LTL EXCL 210/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 12061 m, 56 m/sec, 19219 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 215/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 10761 m, 50 m/sec, 37060 t fired, .
[lola][.] 25 LTL EXCL 215/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 12339 m, 55 m/sec, 19704 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 220/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 10981 m, 44 m/sec, 38631 t fired, .
[lola][.] 25 LTL EXCL 220/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 12634 m, 59 m/sec, 20234 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 225/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 11227 m, 49 m/sec, 39675 t fired, .
[lola][.] 25 LTL EXCL 225/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 12916 m, 56 m/sec, 20732 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 230/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 11508 m, 56 m/sec, 41126 t fired, .
[lola][.] 25 LTL EXCL 230/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 13200 m, 56 m/sec, 21273 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 235/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 11816 m, 61 m/sec, 42850 t fired, .
[lola][.] 25 LTL EXCL 235/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 13473 m, 54 m/sec, 21731 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 240/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 12039 m, 44 m/sec, 44060 t fired, .
[lola][.] 25 LTL EXCL 240/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 13766 m, 58 m/sec, 22252 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 245/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 12361 m, 64 m/sec, 46060 t fired, .
[lola][.] 25 LTL EXCL 245/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 14054 m, 57 m/sec, 22821 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 250/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 12540 m, 35 m/sec, 47233 t fired, .
[lola][.] 25 LTL EXCL 250/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 14256 m, 40 m/sec, 23162 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 255/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 12751 m, 42 m/sec, 48353 t fired, .
[lola][.] 25 LTL EXCL 255/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 14471 m, 43 m/sec, 23547 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 260/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 12977 m, 45 m/sec, 49710 t fired, .
[lola][.] 25 LTL EXCL 260/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 14639 m, 33 m/sec, 23837 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 265/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 13223 m, 49 m/sec, 51380 t fired, .
[lola][.] 25 LTL EXCL 265/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 14932 m, 58 m/sec, 24392 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 270/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 13432 m, 41 m/sec, 52681 t fired, .
[lola][.] 25 LTL EXCL 270/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 15265 m, 66 m/sec, 24974 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 275/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 13640 m, 41 m/sec, 54152 t fired, .
[lola][.] 25 LTL EXCL 275/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 15559 m, 58 m/sec, 25502 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 280/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 13963 m, 64 m/sec, 56535 t fired, .
[lola][.] 25 LTL EXCL 280/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 15855 m, 59 m/sec, 26054 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 285/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 14215 m, 50 m/sec, 57973 t fired, .
[lola][.] 25 LTL EXCL 285/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 16162 m, 61 m/sec, 26639 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 290/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 14506 m, 58 m/sec, 59670 t fired, .
[lola][.] 25 LTL EXCL 290/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 16480 m, 63 m/sec, 27275 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 295/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 14818 m, 62 m/sec, 61713 t fired, .
[lola][.] 25 LTL EXCL 295/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 16795 m, 63 m/sec, 27912 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 300/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 15051 m, 46 m/sec, 63180 t fired, .
[lola][.] 25 LTL EXCL 300/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 17134 m, 67 m/sec, 28578 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 305/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 15351 m, 60 m/sec, 65355 t fired, .
[lola][.] 25 LTL EXCL 305/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 17431 m, 59 m/sec, 29179 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 310/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 15617 m, 53 m/sec, 67285 t fired, .
[lola][.] 25 LTL EXCL 310/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 17752 m, 64 m/sec, 29832 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] 16 LTL EXCL 315/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 15825 m, 41 m/sec, 68609 t fired, .
[lola][.] 25 LTL EXCL 315/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 18049 m, 59 m/sec, 30428 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 320/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 16068 m, 48 m/sec, 70315 t fired, .
[lola][.] 25 LTL EXCL 320/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 18301 m, 50 m/sec, 30919 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 325/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 16306 m, 47 m/sec, 72226 t fired, .
[lola][.] 25 LTL EXCL 325/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 18556 m, 51 m/sec, 31424 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 330/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 16522 m, 43 m/sec, 73741 t fired, .
[lola][.] 25 LTL EXCL 330/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 18839 m, 56 m/sec, 32056 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 335/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 16750 m, 45 m/sec, 75544 t fired, .
[lola][.] 25 LTL EXCL 335/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 19115 m, 55 m/sec, 32497 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 340/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 17009 m, 51 m/sec, 77729 t fired, .
[lola][.] 25 LTL EXCL 340/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 19402 m, 57 m/sec, 33009 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 345/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 17240 m, 46 m/sec, 79002 t fired, .
[lola][.] 25 LTL EXCL 345/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 19689 m, 57 m/sec, 33560 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 350/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 17461 m, 44 m/sec, 80100 t fired, .
[lola][.] 25 LTL EXCL 350/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 19960 m, 54 m/sec, 34036 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 355/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 17826 m, 73 m/sec, 82055 t fired, .
[lola][.] 25 LTL EXCL 355/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 20232 m, 54 m/sec, 34524 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 360/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 18055 m, 45 m/sec, 83279 t fired, .
[lola][.] 25 LTL EXCL 360/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 20510 m, 55 m/sec, 35027 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 365/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 18319 m, 52 m/sec, 84813 t fired, .
[lola][.] 25 LTL EXCL 365/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 20803 m, 58 m/sec, 35579 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 370/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 18609 m, 58 m/sec, 86767 t fired, .
[lola][.] 25 LTL EXCL 370/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 21070 m, 53 m/sec, 36023 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 375/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 18827 m, 43 m/sec, 87928 t fired, .
[lola][.] 25 LTL EXCL 375/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 21378 m, 61 m/sec, 36572 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 380/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 19069 m, 48 m/sec, 89331 t fired, .
[lola][.] 25 LTL EXCL 380/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 21664 m, 57 m/sec, 37160 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 385/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 19361 m, 58 m/sec, 91237 t fired, .
[lola][.] 25 LTL EXCL 385/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 21958 m, 58 m/sec, 37582 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 390/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 19610 m, 49 m/sec, 92792 t fired, .
[lola][.] 25 LTL EXCL 390/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 22236 m, 55 m/sec, 38017 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 395/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 19881 m, 54 m/sec, 94692 t fired, .
[lola][.] 25 LTL EXCL 395/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 22519 m, 56 m/sec, 38504 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 400/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 20135 m, 50 m/sec, 96656 t fired, .
[lola][.] 25 LTL EXCL 400/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 22819 m, 60 m/sec, 39011 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 405/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 20372 m, 47 m/sec, 97931 t fired, .
[lola][.] 25 LTL EXCL 405/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 23102 m, 56 m/sec, 39520 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 410/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 20621 m, 49 m/sec, 99397 t fired, .
[lola][.] 25 LTL EXCL 410/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 23412 m, 62 m/sec, 40078 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
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[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 415/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 20898 m, 55 m/sec, 101242 t fired, .
[lola][.] 25 LTL EXCL 415/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 23689 m, 55 m/sec, 40587 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 420/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 21133 m, 47 m/sec, 102723 t fired, .
[lola][.] 25 LTL EXCL 420/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 23989 m, 60 m/sec, 41105 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] 16 LTL EXCL 425/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 21380 m, 49 m/sec, 104400 t fired, .
[lola][.] 25 LTL EXCL 425/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 24307 m, 63 m/sec, 41696 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] 16 LTL EXCL 430/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 21638 m, 51 m/sec, 106359 t fired, .
[lola][.] 25 LTL EXCL 430/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 24600 m, 58 m/sec, 42256 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 435/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 21879 m, 48 m/sec, 107925 t fired, .
[lola][.] 25 LTL EXCL 435/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 24887 m, 57 m/sec, 42735 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 440/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 22090 m, 42 m/sec, 109443 t fired, .
[lola][.] 25 LTL EXCL 440/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 25208 m, 64 m/sec, 43305 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 445/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 22362 m, 54 m/sec, 111377 t fired, .
[lola][.] 25 LTL EXCL 445/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 25488 m, 56 m/sec, 43877 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 450/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 22612 m, 50 m/sec, 113247 t fired, .
[lola][.] 25 LTL EXCL 450/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 25743 m, 51 m/sec, 44342 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 455/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 22830 m, 43 m/sec, 114952 t fired, .
[lola][.] 25 LTL EXCL 455/456 1/5 RERS17pb113-PT-1-LTLCardinality-08 26023 m, 56 m/sec, 44897 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 460/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 23099 m, 53 m/sec, 117135 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 465/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 23314 m, 43 m/sec, 118713 t fired, .
[lola][.] 25 LTL EXCL 5/1367 1/5 RERS17pb113-PT-1-LTLCardinality-08 170 m, -5170 m/sec, 169 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
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[lola][.] 16 LTL EXCL 470/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 23499 m, 37 m/sec, 119707 t fired, .
[lola][.] 25 LTL EXCL 10/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 365 m, 39 m/sec, 364 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 475/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 23691 m, 38 m/sec, 120858 t fired, .
[lola][.] 25 LTL EXCL 15/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 561 m, 39 m/sec, 560 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 480/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 23867 m, 35 m/sec, 122001 t fired, .
[lola][.] 25 LTL EXCL 20/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 770 m, 41 m/sec, 769 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] 16 LTL EXCL 485/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 24049 m, 36 m/sec, 123220 t fired, .
[lola][.] 25 LTL EXCL 25/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 1051 m, 56 m/sec, 1098 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 490/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 24241 m, 38 m/sec, 124423 t fired, .
[lola][.] 25 LTL EXCL 30/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 1320 m, 53 m/sec, 1468 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 495/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 24417 m, 35 m/sec, 125674 t fired, .
[lola][.] 25 LTL EXCL 35/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 1608 m, 57 m/sec, 1888 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 500/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 24597 m, 36 m/sec, 126948 t fired, .
[lola][.] 25 LTL EXCL 40/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 1885 m, 55 m/sec, 2309 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 505/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 24817 m, 44 m/sec, 128616 t fired, .
[lola][.] 25 LTL EXCL 45/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 2177 m, 58 m/sec, 2761 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 510/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 25102 m, 57 m/sec, 130494 t fired, .
[lola][.] 25 LTL EXCL 50/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 2451 m, 54 m/sec, 3206 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.] 16 LTL EXCL 515/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 25391 m, 57 m/sec, 132577 t fired, .
[lola][.] 25 LTL EXCL 55/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 2702 m, 50 m/sec, 3662 t fired, .
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[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 520/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 25663 m, 54 m/sec, 134591 t fired, .
[lola][.] 25 LTL EXCL 60/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 3000 m, 59 m/sec, 4071 t fired, .
[lola][.]
[lola][.] Time elapsed: 2293 secs. Pages in use: 9
[lola][.] # running tasks: 2 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 16 LTL EXCL 525/609 1/2000 RERS17pb113-PT-1-LTLCardinality-05 25899 m, 47 m/sec, 136497 t fired, .
[lola][.] 25 LTL EXCL 65/341 1/5 RERS17pb113-PT-1-LTLCardinality-08 3285 m, 57 m/sec, 4526 t fired, .
[lola][.]
[lola][.] Time elapsed: 2298 secs. Pages in use: 9
[lola][.] # running tasks: 2 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] RERS17pb113-PT-1-LTLCardinality-00: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-01: AG false findpath
[lola][.] RERS17pb113-PT-1-LTLCardinality-02: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-04: LTL/CTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-06: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-09: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-10: F true state space / EG
[lola][.] RERS17pb113-PT-1-LTLCardinality-11: INITIAL false preprocessing
[lola][.] RERS17pb113-PT-1-LTLCardinality-12: LTL false LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-13: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-14: LTL true LTL model checker
[lola][.] RERS17pb113-PT-1-LTLCardinality-15: CONJ false findpath
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] RERS17pb113-PT-1-LTLCardinality-03: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-05: LTL 0 0 1 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-07: LTL 0 1 0 0 1 0 0 0
[lola][.] RERS17pb113-PT-1-LTLCardinality-08: LTL 0 0 1 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

========== file over 1MB has been truncated ======
retrieve it from the run archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb113-PT-1"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is RERS17pb113-PT-1, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r313-tall-171662339800115"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb113-PT-1.tgz
mv RERS17pb113-PT-1 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;