About the Execution of LoLA for QuasiCertifProtocol-COL-32
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16208.552 | 3000036.00 | 3012460.00 | 9366.70 | ?????F???F?T???F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2024-input.r313-tall-171662339600052.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is QuasiCertifProtocol-COL-32, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r313-tall-171662339600052
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 620K
-rw-r--r-- 1 mcc users 6.5K Apr 13 04:08 CTLCardinality.txt
-rw-r--r-- 1 mcc users 67K Apr 13 04:08 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Apr 13 03:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 52K Apr 13 03:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Apr 23 07:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 23 07:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 23 07:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Apr 13 04:33 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 165K Apr 13 04:33 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.4K Apr 13 04:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 66K Apr 13 04:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 131K May 18 16:43 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-00
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-01
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-02
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-03
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-04
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-05
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-06
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-07
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-08
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-09
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-10
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-11
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-12
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-13
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-14
FORMULA_NAME QuasiCertifProtocol-COL-32-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1717237748215
FORMULA QuasiCertifProtocol-COL-32-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-32-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-32-LTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-32-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1717240748251
--------------------
content from stderr:
[[35mlola[0m][I] LoLA will run for 3600 seconds at most ([1m[36m--timelimit[0m)
[[35mlola[0m][W] [1m[33munknown unit in memory specification: using default[0m
[[35mlola[0m][I] MEM LIMIT 5
[[35mlola[0m][I] NET
[[35mlola[0m][I] reading [1m[34mnet[0m from [4m[34mmodel.pnml[0m
[[35mlola[0m][I] input: PNML file ([1m[36m--pnmlnet[0m)
[[35mlola[0m][I] reading pnml
[[35mlola[0m][I] PNML file contains High-Level net
[[35mlola[0m][I] closed [1m[34mnet[0m file [4m[34mmodel.pnml[0m
[[35mlola[0m][I] finished parsing
[[35mlola[0m][I] Reading HL formula in XML format ([1m[36m--xmlformula[0m)
[[35mlola[0m][I] reading [1m[34mformula[0m from [4m[34mLTLFireability.xml[0m
[[35mlola[0m][I] Places: 3806, Transitions: 506
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] NOTDEADLOCKFREE
[[35mlola[0m][I] LAUNCH task # 60 (type SKEL/CNST) for 15 QuasiCertifProtocol-COL-32-LTLFireability-05
[[35mlola[0m][I] time limit : 0 sec
[[35mlola[0m][I] memory limit: 0 pages
[[35mlola[0m][I] FINISHED task # 60 (type SKEL/CNST) for QuasiCertifProtocol-COL-32-LTLFireability-05
[[35mlola[0m][I] result : false
[[35mlola[0m][W] findlow criterion violated for transition 22
[[35mlola[0m][W] findlow criterion violated for transition 21
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] nonmoderate token usage
[[35mlola[0m][I] Rule S: 0 transitions removed,0 places removed
[[35mlola[0m][W] findlow criterion violated for transition 16
[*** LOG ERROR #0001 ***] [2024-06-01 10:29:09] [status_logger] string pointer is null
[[35mlola[0m][I] LAUNCH task # 64 (type EXCL) for 57 QuasiCertifProtocol-COL-32-LTLFireability-15
[[35mlola[0m][I] time limit : 171 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 62 (type FNDP) for 57 QuasiCertifProtocol-COL-32-LTLFireability-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] LAUNCH task # 63 (type EQUN) for 57 QuasiCertifProtocol-COL-32-LTLFireability-15
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 63 (type EQUN) for QuasiCertifProtocol-COL-32-LTLFireability-15
[[35mlola[0m][I] result : true
[[35mlola[0m][W] CANCELED task # 62 (type FNDP) for QuasiCertifProtocol-COL-32-LTLFireability-15 (obsolete)
[[35mlola[0m][W] CANCELED task # 64 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-15 (obsolete)
[[35mlola[0m][I] FINISHED task # 62 (type FNDP) for QuasiCertifProtocol-COL-32-LTLFireability-15
[[35mlola[0m][I] result : true
[[35mlola[0m][I] tried executions : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 0
[[35mlola[0m][W] findlow criterion violated for 9 clusters
[[35mlola[0m][I] Time for checking findlow: 1
[[35mlola[0m][I] LAUNCH task # 46 (type EXCL) for 45 QuasiCertifProtocol-COL-32-LTLFireability-11
[[35mlola[0m][I] time limit : 224 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 46 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-11
[[35mlola[0m][I] result : true
[[35mlola[0m][I] markings : 1
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 36 (type EXCL) for 35 QuasiCertifProtocol-COL-32-LTLFireability-09
[[35mlola[0m][I] time limit : 239 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 36 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-09
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 36
[[35mlola[0m][I] fired transitions : 36
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 QuasiCertifProtocol-COL-32-LTLFireability-12
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 69 (type EQUN) for 28 QuasiCertifProtocol-COL-32-LTLFireability-08
[[35mlola[0m][I] time limit : 32000000 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 69 (type EQUN) for QuasiCertifProtocol-COL-32-LTLFireability-08
[[35mlola[0m][I] result : unknown
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 2/256 2/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 129201 m, 25840 m/sec, 901123 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 5 secs. Pages in use: 2
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 7/256 3/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 360951 m, 46350 m/sec, 2622793 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 10 secs. Pages in use: 3
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 12/256 5/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 539498 m, 35709 m/sec, 4281813 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 15 secs. Pages in use: 5
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 17/256 7/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 789428 m, 49986 m/sec, 6017753 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 20 secs. Pages in use: 7
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 22/256 8/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 976392 m, 37392 m/sec, 7666384 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 25 secs. Pages in use: 8
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 27/256 10/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 1196987 m, 44119 m/sec, 9392610 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 30 secs. Pages in use: 10
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 32/256 11/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 1405338 m, 41670 m/sec, 11044958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 35 secs. Pages in use: 11
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 37/256 13/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 1603006 m, 39533 m/sec, 12740702 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 40 secs. Pages in use: 13
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 42/256 14/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 1830358 m, 45470 m/sec, 14419885 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 45 secs. Pages in use: 14
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 47/256 16/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 2005780 m, 35084 m/sec, 16066666 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 50 secs. Pages in use: 16
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 52/256 18/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 2247169 m, 48277 m/sec, 17778846 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 55 secs. Pages in use: 18
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 57/256 19/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 2427895 m, 36145 m/sec, 19421685 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 60 secs. Pages in use: 19
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 62/256 21/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 2656484 m, 45717 m/sec, 21119641 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 65 secs. Pages in use: 21
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 67/256 22/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 2843048 m, 37312 m/sec, 22764156 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 70 secs. Pages in use: 22
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 72/256 24/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 3058018 m, 42994 m/sec, 24448142 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 75 secs. Pages in use: 24
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 77/256 25/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 3252551 m, 38906 m/sec, 26090811 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 80 secs. Pages in use: 25
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 82/256 26/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 3458181 m, 41126 m/sec, 27760306 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 85 secs. Pages in use: 26
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 87/256 28/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 3656059 m, 39575 m/sec, 29404495 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 90 secs. Pages in use: 28
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 92/256 29/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 3858237 m, 40435 m/sec, 31066402 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 95 secs. Pages in use: 29
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 97/256 31/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 4053435 m, 39039 m/sec, 32708461 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 100 secs. Pages in use: 31
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 102/256 32/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 4256822 m, 40677 m/sec, 34358694 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 105 secs. Pages in use: 32
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 107/256 33/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 4443919 m, 37419 m/sec, 35996251 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 110 secs. Pages in use: 33
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 112/256 35/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 4650115 m, 41239 m/sec, 37639603 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 115 secs. Pages in use: 35
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 117/256 36/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 4831127 m, 36202 m/sec, 39272453 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 120 secs. Pages in use: 36
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 122/256 38/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 5035539 m, 40882 m/sec, 40909014 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 125 secs. Pages in use: 38
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 127/256 39/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 5207742 m, 34440 m/sec, 42534023 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 130 secs. Pages in use: 39
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 132/256 40/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 5410586 m, 40568 m/sec, 44157054 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 135 secs. Pages in use: 40
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 137/256 42/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 5594840 m, 36850 m/sec, 45762102 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 140 secs. Pages in use: 42
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 142/256 43/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 5782696 m, 37571 m/sec, 47377974 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 145 secs. Pages in use: 43
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 147/256 44/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 5970232 m, 37507 m/sec, 48977958 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 150 secs. Pages in use: 44
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 152/256 45/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 6139155 m, 33784 m/sec, 50564984 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 155 secs. Pages in use: 45
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 157/256 47/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 6329027 m, 37974 m/sec, 52150215 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 160 secs. Pages in use: 47
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 162/256 48/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 6507887 m, 35772 m/sec, 53739567 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 165 secs. Pages in use: 48
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 167/256 49/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 6683873 m, 35197 m/sec, 55344234 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 170 secs. Pages in use: 49
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 172/256 50/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 6872966 m, 37818 m/sec, 56951463 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 175 secs. Pages in use: 50
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 177/256 51/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 7047566 m, 34920 m/sec, 58548529 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 180 secs. Pages in use: 51
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 182/256 52/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 7201101 m, 30707 m/sec, 60146946 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 185 secs. Pages in use: 52
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 187/256 53/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 7339261 m, 27632 m/sec, 61749301 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 190 secs. Pages in use: 53
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 192/256 54/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 7505261 m, 33200 m/sec, 63346212 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 195 secs. Pages in use: 54
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 197/256 55/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 7645470 m, 28041 m/sec, 64942519 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 200 secs. Pages in use: 55
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 202/256 56/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 7782875 m, 27481 m/sec, 66533462 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 205 secs. Pages in use: 56
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 207/256 57/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 7931380 m, 29701 m/sec, 68121983 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 210 secs. Pages in use: 57
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 212/256 58/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 8099225 m, 33569 m/sec, 69708976 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 215 secs. Pages in use: 58
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 217/256 59/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 8239720 m, 28099 m/sec, 71310078 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 220 secs. Pages in use: 59
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 222/256 60/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 8378310 m, 27718 m/sec, 72907565 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 225 secs. Pages in use: 60
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 227/256 61/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 8513705 m, 27079 m/sec, 74496862 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 230 secs. Pages in use: 61
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 232/256 62/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 8656627 m, 28584 m/sec, 76082404 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 235 secs. Pages in use: 62
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 237/256 63/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 8785194 m, 25713 m/sec, 77668124 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 240 secs. Pages in use: 63
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 242/256 64/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 8912715 m, 25504 m/sec, 79258701 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 245 secs. Pages in use: 64
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 247/256 65/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 9084692 m, 34395 m/sec, 80955620 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 250 secs. Pages in use: 65
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 252/256 67/2000 QuasiCertifProtocol-COL-32-LTLFireability-12 9312743 m, 45610 m/sec, 82632951 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 255 secs. Pages in use: 67
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 49 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-12 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 260 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 QuasiCertifProtocol-COL-32-LTLFireability-14
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 49 (type EXCL) for 48 QuasiCertifProtocol-COL-32-LTLFireability-12
[[35mlola[0m][I] time limit : 3340 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 5/3340 3/5 QuasiCertifProtocol-COL-32-LTLFireability-12 243190 m, -1813910 m/sec, 1698296 t fired, .
[[35mlola[0m][.] 55 LTL EXCL 5/256 3/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 257332 m, 51466 m/sec, 1796069 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 265 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 49 LTL EXCL 10/3340 4/5 QuasiCertifProtocol-COL-32-LTLFireability-12 441528 m, 39667 m/sec, 3339329 t fired, .
[[35mlola[0m][.] 55 LTL EXCL 10/238 4/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 459179 m, 40369 m/sec, 3515314 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 270 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 49 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-12 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 15/238 6/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 687426 m, 45649 m/sec, 5318029 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 275 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 20/256 8/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 905782 m, 43671 m/sec, 7036415 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 280 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 25/256 9/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 1111723 m, 41188 m/sec, 8794031 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 285 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 30/256 11/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 1351398 m, 47935 m/sec, 10554108 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 290 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 35/256 12/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 1535081 m, 36736 m/sec, 12264027 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 295 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 40/256 14/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 1787401 m, 50464 m/sec, 14052152 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 300 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 45/256 15/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 1973178 m, 37155 m/sec, 15741207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 305 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 50/256 17/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 2212317 m, 47827 m/sec, 17501801 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 310 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 55/256 19/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 2404995 m, 38535 m/sec, 19191405 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 315 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 60/256 20/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 2627940 m, 44589 m/sec, 20929664 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 320 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 65/256 22/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 2828681 m, 40148 m/sec, 22619904 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 325 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 70/256 24/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 3042996 m, 42863 m/sec, 24343657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 330 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 75/256 25/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 3246868 m, 40774 m/sec, 26033525 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 335 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 80/256 27/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 3455857 m, 41797 m/sec, 27743943 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 340 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 85/256 28/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 3657618 m, 40352 m/sec, 29420338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 345 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 90/256 30/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 3863630 m, 41202 m/sec, 31104569 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 350 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 95/256 31/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 4062406 m, 39755 m/sec, 32796465 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 355 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 100/256 32/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 4275668 m, 42652 m/sec, 34495104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 360 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 105/256 34/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 4465013 m, 37869 m/sec, 36183776 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 365 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 110/256 35/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 4672874 m, 41572 m/sec, 37846947 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 370 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 115/256 37/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 4850592 m, 35543 m/sec, 39470867 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 375 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 120/256 38/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 5056336 m, 41148 m/sec, 41096034 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 380 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 125/256 39/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 5230437 m, 34820 m/sec, 42703730 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 385 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 130/256 41/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 5431066 m, 40125 m/sec, 44312580 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 390 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 135/256 42/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 5614559 m, 36698 m/sec, 45898384 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 395 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 140/256 43/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 5794712 m, 36030 m/sec, 47490392 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 400 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 145/256 44/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 5983957 m, 37849 m/sec, 49107068 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 405 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 150/256 46/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 6155557 m, 34320 m/sec, 50702554 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 410 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 155/256 47/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 6346836 m, 38255 m/sec, 52315889 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 415 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 160/256 48/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 6533262 m, 37285 m/sec, 53944239 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 420 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 165/256 49/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 6706129 m, 34573 m/sec, 55572340 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 425 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 170/256 51/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 6904493 m, 39672 m/sec, 57214159 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 430 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 175/256 52/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 7073216 m, 33744 m/sec, 58844219 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 435 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 180/256 53/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 7230132 m, 31383 m/sec, 60470719 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 440 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 185/256 54/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 7379895 m, 29952 m/sec, 62100817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 445 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 190/256 55/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 7539332 m, 31887 m/sec, 63717872 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 450 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 195/256 56/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 7684020 m, 28937 m/sec, 65342370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 455 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 200/256 57/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 7816196 m, 26435 m/sec, 66964033 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 460 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 205/256 58/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 7976243 m, 32009 m/sec, 68583611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 465 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 210/256 59/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 8144839 m, 33719 m/sec, 70213918 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 470 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 215/256 60/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 8288369 m, 28706 m/sec, 71837313 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 475 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 220/256 61/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 8426324 m, 27591 m/sec, 73466424 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 480 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 225/256 62/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 8571417 m, 29018 m/sec, 75083911 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 485 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 230/256 63/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 8709507 m, 27618 m/sec, 76715191 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 490 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 235/256 63/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 8840639 m, 26226 m/sec, 78335894 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 495 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 240/256 64/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 8962282 m, 24328 m/sec, 79961130 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 500 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 245/256 66/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 9199162 m, 47376 m/sec, 81756657 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 505 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 250/256 68/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 9405449 m, 41257 m/sec, 83460955 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 510 secs. Pages in use: 68
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 255/256 69/2000 QuasiCertifProtocol-COL-32-LTLFireability-14 9624252 m, 43760 m/sec, 85239637 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 515 secs. Pages in use: 69
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 55 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-14 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-10: CONJ 0 2 0 0 2 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 520 secs. Pages in use: 71
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 43 (type EXCL) for 38 QuasiCertifProtocol-COL-32-LTLFireability-10
[[35mlola[0m][I] time limit : 256 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 55 (type EXCL) for 54 QuasiCertifProtocol-COL-32-LTLFireability-14
[[35mlola[0m][I] time limit : 3080 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 43 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-10
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 36
[[35mlola[0m][I] fired transitions : 36
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 5/280 3/5 QuasiCertifProtocol-COL-32-LTLFireability-14 265209 m, -1871808 m/sec, 1852211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 525 secs. Pages in use: 74
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 55 LTL EXCL 10/280 4/5 QuasiCertifProtocol-COL-32-LTLFireability-14 466514 m, 40261 m/sec, 3587860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 530 secs. Pages in use: 75
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 55 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-14 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-08: CONJ 0 2 0 0 3 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 535 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 31 (type EXCL) for 28 QuasiCertifProtocol-COL-32-LTLFireability-08
[[35mlola[0m][I] time limit : 306 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 31 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-08
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 36
[[35mlola[0m][I] fired transitions : 36
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 26 (type EXCL) for 25 QuasiCertifProtocol-COL-32-LTLFireability-07
[[35mlola[0m][I] time limit : 383 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 26 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-07
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 36
[[35mlola[0m][I] fired transitions : 36
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 13 (type EXCL) for 12 QuasiCertifProtocol-COL-32-LTLFireability-04
[[35mlola[0m][I] time limit : 437 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] FINISHED task # 13 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-04
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 37
[[35mlola[0m][I] fired transitions : 37
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 QuasiCertifProtocol-COL-32-LTLFireability-03
[[35mlola[0m][I] time limit : 510 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 5/510 3/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 263061 m, 52612 m/sec, 1839323 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 540 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 10/510 4/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 464463 m, 40280 m/sec, 3570873 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 545 secs. Pages in use: 76
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 15/510 6/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 698217 m, 46750 m/sec, 5389951 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 550 secs. Pages in use: 77
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 20/510 8/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 917952 m, 43947 m/sec, 7122562 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 555 secs. Pages in use: 79
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 25/510 9/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 1126882 m, 41786 m/sec, 8899490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 560 secs. Pages in use: 80
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 30/510 11/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 1362626 m, 47148 m/sec, 10658255 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 565 secs. Pages in use: 82
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 35/510 12/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 1553612 m, 38197 m/sec, 12394777 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 570 secs. Pages in use: 83
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 40/510 14/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 1801532 m, 49584 m/sec, 14177885 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 575 secs. Pages in use: 85
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 45/510 16/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 1988293 m, 37352 m/sec, 15897110 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 580 secs. Pages in use: 87
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 50/510 18/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 2235581 m, 49457 m/sec, 17689161 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 585 secs. Pages in use: 89
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 55/510 19/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 2426778 m, 38239 m/sec, 19408431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 590 secs. Pages in use: 90
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 60/510 21/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 2664727 m, 47589 m/sec, 21183722 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 595 secs. Pages in use: 92
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 65/510 22/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 2858139 m, 38682 m/sec, 22902836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 600 secs. Pages in use: 93
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 70/510 24/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 3090116 m, 46395 m/sec, 24668420 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 605 secs. Pages in use: 95
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 75/510 25/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 3283359 m, 38648 m/sec, 26383828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 610 secs. Pages in use: 96
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 80/510 27/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 3511475 m, 45623 m/sec, 28139551 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 615 secs. Pages in use: 98
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 85/510 28/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 3702850 m, 38275 m/sec, 29857376 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 620 secs. Pages in use: 99
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 90/510 30/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 3928837 m, 45197 m/sec, 31602993 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 625 secs. Pages in use: 101
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 95/510 31/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 4115209 m, 37274 m/sec, 33317338 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 630 secs. Pages in use: 102
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 100/510 33/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 4341236 m, 45205 m/sec, 35053208 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 635 secs. Pages in use: 104
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 105/510 34/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 4528069 m, 37366 m/sec, 36770370 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 640 secs. Pages in use: 105
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 110/510 36/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 4745819 m, 43550 m/sec, 38491100 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 645 secs. Pages in use: 107
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 115/510 37/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 4945800 m, 39996 m/sec, 40204271 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 650 secs. Pages in use: 108
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 120/510 39/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 5145597 m, 39959 m/sec, 41910395 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 655 secs. Pages in use: 110
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 125/510 40/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 5351205 m, 41121 m/sec, 43613644 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 660 secs. Pages in use: 111
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 130/510 41/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 5532773 m, 36313 m/sec, 45303703 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 665 secs. Pages in use: 112
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 135/510 43/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 5741835 m, 41812 m/sec, 46994355 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 670 secs. Pages in use: 114
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 140/510 44/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 5934655 m, 38564 m/sec, 48672609 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 675 secs. Pages in use: 115
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 145/510 46/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 6116886 m, 36446 m/sec, 50332285 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 680 secs. Pages in use: 117
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 150/510 47/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 6312063 m, 39035 m/sec, 51997210 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 685 secs. Pages in use: 118
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 155/510 48/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 6500324 m, 37652 m/sec, 53664086 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 690 secs. Pages in use: 119
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 160/510 49/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 6683871 m, 36709 m/sec, 55344220 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 695 secs. Pages in use: 120
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 165/510 51/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 6880734 m, 39372 m/sec, 57021702 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 700 secs. Pages in use: 122
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 170/510 52/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 7060408 m, 35934 m/sec, 58684632 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 705 secs. Pages in use: 123
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 175/510 53/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 7219271 m, 31772 m/sec, 60343672 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 710 secs. Pages in use: 124
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 180/510 54/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 7367078 m, 29561 m/sec, 61986386 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 715 secs. Pages in use: 125
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 185/510 55/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 7531658 m, 32916 m/sec, 63644028 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 720 secs. Pages in use: 126
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 190/510 56/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 7680961 m, 29860 m/sec, 65301166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 725 secs. Pages in use: 127
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 195/510 57/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 7816112 m, 27030 m/sec, 66963065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 730 secs. Pages in use: 128
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 200/510 58/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 7982736 m, 33324 m/sec, 68631055 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 735 secs. Pages in use: 129
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 205/510 59/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 8150831 m, 33619 m/sec, 70292639 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 740 secs. Pages in use: 130
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 210/510 60/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 8300871 m, 30008 m/sec, 71957336 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 745 secs. Pages in use: 131
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 215/510 61/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 8438993 m, 27624 m/sec, 73631365 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 750 secs. Pages in use: 132
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 220/510 62/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 8593128 m, 30827 m/sec, 75299142 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 755 secs. Pages in use: 133
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 225/510 63/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 8729672 m, 27308 m/sec, 76970224 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 760 secs. Pages in use: 134
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 230/510 64/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 8864405 m, 26946 m/sec, 78641207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 765 secs. Pages in use: 135
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 235/510 65/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 8996044 m, 26327 m/sec, 80337188 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 770 secs. Pages in use: 136
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 240/510 67/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 9256285 m, 52048 m/sec, 82155701 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 775 secs. Pages in use: 138
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 245/510 68/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 9449647 m, 38672 m/sec, 83882577 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 780 secs. Pages in use: 139
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 250/510 70/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 9689435 m, 47957 m/sec, 85695937 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 785 secs. Pages in use: 141
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 255/510 72/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 9899399 m, 41992 m/sec, 87430751 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 790 secs. Pages in use: 143
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 260/510 73/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 10120246 m, 44169 m/sec, 89219813 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 795 secs. Pages in use: 144
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 265/510 75/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 10340092 m, 43969 m/sec, 90954541 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 800 secs. Pages in use: 146
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 270/510 77/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 10548325 m, 41646 m/sec, 92725291 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 805 secs. Pages in use: 148
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 275/510 78/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 10774213 m, 45177 m/sec, 94471818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 810 secs. Pages in use: 149
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 280/510 80/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 10975408 m, 40239 m/sec, 96223823 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 815 secs. Pages in use: 151
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 285/510 81/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 11206403 m, 46199 m/sec, 97974082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 820 secs. Pages in use: 152
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 290/510 83/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 11401593 m, 39038 m/sec, 99715153 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 825 secs. Pages in use: 154
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 295/510 85/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 11632435 m, 46168 m/sec, 101464303 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 830 secs. Pages in use: 156
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 300/510 86/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 11827185 m, 38950 m/sec, 103202082 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 835 secs. Pages in use: 157
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 305/510 88/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 12052040 m, 44971 m/sec, 104939735 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 840 secs. Pages in use: 159
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 310/510 89/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 12250661 m, 39724 m/sec, 106672660 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 845 secs. Pages in use: 160
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 315/510 91/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 12468543 m, 43576 m/sec, 108391550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 850 secs. Pages in use: 162
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 320/510 92/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 12670806 m, 40452 m/sec, 110121104 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 855 secs. Pages in use: 163
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 325/510 94/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 12879385 m, 41715 m/sec, 111842344 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 860 secs. Pages in use: 165
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 330/510 95/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 13090617 m, 42246 m/sec, 113566916 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 865 secs. Pages in use: 166
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 335/510 97/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 13282260 m, 38328 m/sec, 115278386 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 870 secs. Pages in use: 168
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 340/510 98/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 13494746 m, 42497 m/sec, 116990859 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 875 secs. Pages in use: 169
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 345/510 99/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 13677473 m, 36545 m/sec, 118692633 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 880 secs. Pages in use: 170
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 350/510 101/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 13889909 m, 42487 m/sec, 120393611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 885 secs. Pages in use: 172
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 355/510 102/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 14087083 m, 39434 m/sec, 122081550 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 890 secs. Pages in use: 173
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 360/510 104/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 14272842 m, 37151 m/sec, 123763828 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 895 secs. Pages in use: 175
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 365/510 105/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 14468810 m, 39193 m/sec, 125439193 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 900 secs. Pages in use: 176
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 370/510 106/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 14658550 m, 37948 m/sec, 127098470 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 905 secs. Pages in use: 177
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 375/510 107/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 14842041 m, 36698 m/sec, 128749099 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 910 secs. Pages in use: 178
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 380/510 109/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 15035501 m, 38692 m/sec, 130426231 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 915 secs. Pages in use: 180
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 385/510 110/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 15222867 m, 37473 m/sec, 132106576 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 920 secs. Pages in use: 181
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 390/510 111/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 15421472 m, 39721 m/sec, 133783588 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 925 secs. Pages in use: 182
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 395/510 112/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 15579456 m, 31596 m/sec, 135441563 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 930 secs. Pages in use: 183
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 400/510 113/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 15738583 m, 31825 m/sec, 137108022 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 935 secs. Pages in use: 184
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 405/510 115/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 15905091 m, 33301 m/sec, 138777455 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 940 secs. Pages in use: 186
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 410/510 116/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 16052127 m, 29407 m/sec, 140443499 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 945 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 415/510 116/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 16197058 m, 28986 m/sec, 142116972 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 950 secs. Pages in use: 187
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 420/510 117/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 16346996 m, 29987 m/sec, 143793312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 955 secs. Pages in use: 188
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 425/510 119/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 16523934 m, 35387 m/sec, 145460389 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 960 secs. Pages in use: 190
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 430/510 120/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 16675520 m, 30317 m/sec, 147117566 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 965 secs. Pages in use: 191
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 435/510 121/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 16821500 m, 29196 m/sec, 148786705 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 970 secs. Pages in use: 192
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 440/510 122/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 16959683 m, 27636 m/sec, 150456221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 975 secs. Pages in use: 193
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 445/510 123/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 17110611 m, 30185 m/sec, 152118172 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 980 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 450/510 123/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 17246925 m, 27262 m/sec, 153783379 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 985 secs. Pages in use: 194
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 455/510 124/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 17378748 m, 26364 m/sec, 155458754 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 990 secs. Pages in use: 195
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 460/510 126/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 17574220 m, 39094 m/sec, 157241078 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 995 secs. Pages in use: 197
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 465/510 128/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 17795094 m, 44174 m/sec, 158980048 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1000 secs. Pages in use: 199
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 470/510 129/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 18001795 m, 41340 m/sec, 160743010 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1005 secs. Pages in use: 200
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 475/510 131/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 18237020 m, 47045 m/sec, 162494221 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1010 secs. Pages in use: 202
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 480/510 132/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 18426447 m, 37885 m/sec, 164222522 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1015 secs. Pages in use: 203
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 485/510 134/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 18670602 m, 48831 m/sec, 165997499 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1020 secs. Pages in use: 205
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 490/510 135/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 18854500 m, 36779 m/sec, 167711351 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1025 secs. Pages in use: 206
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 495/510 137/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 19100402 m, 49180 m/sec, 169491275 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1030 secs. Pages in use: 208
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 500/510 139/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 19286637 m, 37247 m/sec, 171203675 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1035 secs. Pages in use: 210
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 505/510 140/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 19525235 m, 47719 m/sec, 172969907 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1040 secs. Pages in use: 211
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 10 LTL EXCL 510/510 142/2000 QuasiCertifProtocol-COL-32-LTLFireability-03 19711757 m, 37304 m/sec, 174683318 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1045 secs. Pages in use: 213
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 10 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-03 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1050 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 QuasiCertifProtocol-COL-32-LTLFireability-02
[[35mlola[0m][I] time limit : 510 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 10 (type EXCL) for 9 QuasiCertifProtocol-COL-32-LTLFireability-03
[[35mlola[0m][I] time limit : 2550 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 5/510 3/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 271626 m, 54325 m/sec, 1891009 t fired, .
[[35mlola[0m][.] 10 LTL EXCL 5/2550 3/5 QuasiCertifProtocol-COL-32-LTLFireability-03 262007 m, -3889950 m/sec, 1833378 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1055 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 10/510 4/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 524136 m, 50502 m/sec, 3667986 t fired, .
[[35mlola[0m][.] 10 LTL EXCL 10/425 4/5 QuasiCertifProtocol-COL-32-LTLFireability-03 462783 m, 40155 m/sec, 3558059 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1060 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 10 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-03 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 15/510 6/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 737930 m, 42758 m/sec, 5387887 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1065 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 2 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 20/510 7/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 924498 m, 37313 m/sec, 7102112 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1070 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 25/510 9/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 1122916 m, 39683 m/sec, 8866630 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1075 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 30/510 11/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 1387932 m, 53003 m/sec, 10720253 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1080 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 35/510 12/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 1632070 m, 48827 m/sec, 12458904 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1085 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 40/510 14/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 1824464 m, 38478 m/sec, 14169420 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1090 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 45/510 15/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 2008548 m, 36816 m/sec, 15879180 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1095 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 50/510 16/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 2240187 m, 46327 m/sec, 17702036 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1100 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 55/510 18/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 2496128 m, 51188 m/sec, 19496081 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1105 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 60/510 20/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 2715522 m, 43878 m/sec, 21222283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1110 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 65/510 21/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 2905614 m, 38018 m/sec, 22933177 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1115 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 70/510 22/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 3090322 m, 36941 m/sec, 24669191 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1120 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 75/510 24/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 3353482 m, 52632 m/sec, 26510821 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1125 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 80/510 26/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 3590992 m, 47502 m/sec, 28243663 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1130 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 85/510 27/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 3785890 m, 38979 m/sec, 29952581 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1135 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 90/510 28/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 3963702 m, 35562 m/sec, 31655529 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1140 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 95/510 30/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 4203552 m, 47970 m/sec, 33478326 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1145 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 100/510 32/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 4454482 m, 50186 m/sec, 35231743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1150 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 105/510 33/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 4647292 m, 38562 m/sec, 36942585 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1155 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 110/510 34/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 4838168 m, 38175 m/sec, 38653488 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1160 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 115/510 36/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 5052206 m, 42807 m/sec, 40436193 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1165 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 120/510 38/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 5307266 m, 51012 m/sec, 42201094 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1170 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 125/510 39/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 5508308 m, 40208 m/sec, 43910060 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1175 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 130/510 40/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 5697086 m, 37755 m/sec, 45613842 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1180 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 135/510 42/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 5896842 m, 39951 m/sec, 47369312 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1185 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 140/510 44/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 6150994 m, 50830 m/sec, 49134914 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1190 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 145/510 45/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 6355644 m, 40930 m/sec, 50841330 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1195 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 150/510 46/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 6542550 m, 37381 m/sec, 52541441 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1200 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 155/510 48/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 6740760 m, 39642 m/sec, 54285951 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1205 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 160/510 50/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 6993588 m, 50565 m/sec, 56038137 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1210 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 165/510 51/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 7190114 m, 39305 m/sec, 57741947 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1215 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 170/510 52/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 7378752 m, 37727 m/sec, 59442858 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1220 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 175/510 54/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 7581928 m, 40635 m/sec, 61189552 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1225 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 180/510 55/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 7825320 m, 48678 m/sec, 62922866 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1230 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 185/510 56/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 8016418 m, 38219 m/sec, 64624075 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1235 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 190/510 58/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 8199688 m, 36654 m/sec, 66323245 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1240 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 195/510 59/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 8419142 m, 43890 m/sec, 68071818 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1245 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 200/510 61/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 8645954 m, 45362 m/sec, 69782860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1250 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 205/510 62/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 8835884 m, 37986 m/sec, 71478516 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1255 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 210/510 63/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 9006336 m, 34090 m/sec, 73171997 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1260 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 215/510 65/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 9255390 m, 49810 m/sec, 74918932 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1265 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 220/510 66/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 9451312 m, 39184 m/sec, 76618658 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1270 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 225/510 68/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 9639590 m, 37655 m/sec, 78315490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1275 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 230/510 69/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 9837544 m, 39590 m/sec, 80028207 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1280 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 235/510 70/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 10061582 m, 44807 m/sec, 81735868 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1285 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 240/510 72/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 10251814 m, 38046 m/sec, 83428187 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1290 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 245/510 73/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 10419112 m, 33459 m/sec, 85115283 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1295 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 250/510 75/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 10656998 m, 47577 m/sec, 86827768 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1300 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 255/510 76/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 10849172 m, 38434 m/sec, 88514241 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1305 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 260/510 77/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 11027372 m, 35640 m/sec, 90195982 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1310 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 265/510 78/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 11242146 m, 42954 m/sec, 91894805 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1315 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 270/510 80/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 11431214 m, 37813 m/sec, 93575660 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1320 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 275/510 81/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 11618945 m, 37546 m/sec, 95255244 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1325 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 280/510 82/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 11819022 m, 40015 m/sec, 96942435 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1330 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 285/510 84/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 12011272 m, 38450 m/sec, 98615902 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1335 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 290/510 85/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 12197184 m, 37182 m/sec, 100287494 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1340 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 295/510 86/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 12389752 m, 38513 m/sec, 101961797 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1345 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 300/510 87/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 12576642 m, 37378 m/sec, 103619366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1350 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 305/510 89/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 12760900 m, 36851 m/sec, 105274907 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1355 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 310/510 90/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 12955550 m, 38930 m/sec, 106951914 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1360 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 315/510 91/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 13143328 m, 37555 m/sec, 108630850 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1365 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 320/510 92/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 13330462 m, 37426 m/sec, 110308287 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1370 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 325/510 94/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 13522302 m, 38368 m/sec, 111990281 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1375 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 330/510 95/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 13716796 m, 38898 m/sec, 113667611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1380 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 335/510 96/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 13917732 m, 40187 m/sec, 115333706 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1385 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 340/510 97/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 14086276 m, 33708 m/sec, 116996517 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1390 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 345/510 98/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 14231470 m, 29038 m/sec, 118661196 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1395 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 350/510 99/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 14405581 m, 34822 m/sec, 120325368 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1400 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 355/510 100/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 14555998 m, 30083 m/sec, 121992813 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1405 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 360/510 101/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 14700250 m, 28850 m/sec, 123660825 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1410 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 365/510 103/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 14883506 m, 36651 m/sec, 125323274 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1415 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 370/510 103/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 15035232 m, 30345 m/sec, 126985341 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1420 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 375/510 104/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 15184036 m, 29760 m/sec, 128652061 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1425 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 380/510 105/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 15336854 m, 30563 m/sec, 130319257 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1430 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 385/510 106/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 15474610 m, 27551 m/sec, 131991726 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1435 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 390/510 107/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 15612020 m, 27482 m/sec, 133664381 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1440 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 395/510 108/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 15767128 m, 31021 m/sec, 135341411 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1445 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 400/510 109/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 15935622 m, 33698 m/sec, 137015627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1450 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 405/510 111/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 16119878 m, 36851 m/sec, 138682940 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1455 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 410/510 112/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 16281966 m, 32417 m/sec, 140349120 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1460 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 415/510 113/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 16429154 m, 29437 m/sec, 142017741 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1465 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 420/510 114/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 16577976 m, 29764 m/sec, 143688030 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1470 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 425/510 115/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 16723675 m, 29139 m/sec, 145363252 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1475 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 430/510 115/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 16860170 m, 27299 m/sec, 147039515 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1480 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 435/510 116/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 16999634 m, 27892 m/sec, 148711954 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1485 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 440/510 117/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 17165004 m, 33074 m/sec, 150378492 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1490 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 445/510 118/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 17305224 m, 28044 m/sec, 152054817 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1495 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 450/510 119/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 17442076 m, 27370 m/sec, 153731819 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1500 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 455/510 120/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 17577372 m, 27059 m/sec, 155402902 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1505 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 460/510 121/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 17714944 m, 27514 m/sec, 157079743 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1510 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 465/510 122/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 17842468 m, 25504 m/sec, 158757211 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1515 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 470/510 123/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 17959936 m, 23493 m/sec, 160448627 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1520 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 475/510 125/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 18229742 m, 53961 m/sec, 162332192 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1525 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 480/510 127/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 18485678 m, 51187 m/sec, 164103901 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1530 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 485/510 128/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 18686252 m, 40114 m/sec, 165827296 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1535 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 490/510 129/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 18876404 m, 38030 m/sec, 167544065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1540 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 495/510 131/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 19084926 m, 41704 m/sec, 169334341 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1545 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 500/510 133/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 19346498 m, 52314 m/sec, 171165366 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1550 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 505/510 134/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 19575416 m, 45783 m/sec, 172898860 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1555 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 510/510 135/2000 QuasiCertifProtocol-COL-32-LTLFireability-02 19772082 m, 39333 m/sec, 174622126 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1560 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][W] CANCELED task # 7 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-02 (local timeout)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 1 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1565 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 4 (type EXCL) for 3 QuasiCertifProtocol-COL-32-LTLFireability-01
[[35mlola[0m][I] time limit : 508 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] LAUNCH task # 7 (type EXCL) for 6 QuasiCertifProtocol-COL-32-LTLFireability-02
[[35mlola[0m][I] time limit : 2035 sec
[[35mlola[0m][I] memory limit: 5 pages
[[35mlola[0m][I] FINISHED task # 4 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-01
[[35mlola[0m][I] result : false
[[35mlola[0m][I] markings : 36
[[35mlola[0m][I] fired transitions : 36
[[35mlola[0m][I] time used : 0
[[35mlola[0m][I] memory pages used : 1
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 5/508 3/5 QuasiCertifProtocol-COL-32-LTLFireability-02 272334 m, -3899949 m/sec, 1895711 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1570 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 7 LTL EXCL 10/508 5/5 QuasiCertifProtocol-COL-32-LTLFireability-02 526600 m, 50853 m/sec, 3681289 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1575 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] CANCELED task # 7 (type EXCL) for QuasiCertifProtocol-COL-32-LTLFireability-02 (memory limit exceeded)
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1580 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] LAUNCH task # 1 (type EXCL) for 0 QuasiCertifProtocol-COL-32-LTLFireability-00
[[35mlola[0m][I] time limit : 673 sec
[[35mlola[0m][I] memory limit: 2000 pages
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 5/673 3/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 271915 m, 54383 m/sec, 1893024 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1585 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 10/673 4/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 527641 m, 51145 m/sec, 3687423 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1590 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 15/673 6/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 741679 m, 42807 m/sec, 5423488 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1595 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 20/673 7/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 930014 m, 37667 m/sec, 7150934 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1600 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 25/673 8/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 1132326 m, 40462 m/sec, 8931651 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1605 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 30/673 10/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 1396879 m, 52910 m/sec, 10783447 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1610 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 35/673 12/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 1640087 m, 48641 m/sec, 12528265 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1615 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 40/673 13/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 1836549 m, 39292 m/sec, 14250431 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1620 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 45/673 14/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 2018666 m, 36423 m/sec, 15968536 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1625 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 50/673 16/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 2254529 m, 47172 m/sec, 17804658 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1630 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 55/673 18/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 2511467 m, 51387 m/sec, 19601060 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1635 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 60/673 19/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 2726580 m, 43022 m/sec, 21331292 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1640 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 65/673 21/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 2917413 m, 38166 m/sec, 23056882 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1645 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 70/673 22/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 3110500 m, 38617 m/sec, 24815927 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1650 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 75/673 24/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 3372720 m, 52444 m/sec, 26651611 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1655 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 80/673 25/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 3606465 m, 46749 m/sec, 28390952 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1660 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 85/673 27/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 3803608 m, 39428 m/sec, 30111055 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1665 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 90/673 28/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 3979136 m, 35105 m/sec, 31823420 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1670 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 95/673 29/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 4228024 m, 49777 m/sec, 33657036 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1675 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 100/673 31/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 4474888 m, 49372 m/sec, 35410187 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1680 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 105/673 32/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 4668896 m, 38801 m/sec, 37129003 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1685 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 110/673 34/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 4855894 m, 37399 m/sec, 38844857 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1690 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 115/673 35/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 5080991 m, 45019 m/sec, 40642065 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1695 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 120/673 37/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 5333942 m, 50590 m/sec, 42401080 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1700 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 125/673 38/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 5528843 m, 38980 m/sec, 44114996 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1705 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 130/673 39/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 5719547 m, 38140 m/sec, 45831416 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1710 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 135/673 41/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 5930911 m, 42272 m/sec, 47611018 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1715 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 140/673 43/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 6184728 m, 50763 m/sec, 49373854 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1720 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 145/673 44/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 6380241 m, 39102 m/sec, 51088585 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1725 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 150/673 45/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 6570425 m, 38036 m/sec, 52802823 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1730 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 155/673 47/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 6780847 m, 42084 m/sec, 54572479 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1735 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 160/673 48/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 7027437 m, 49318 m/sec, 56321527 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1740 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 165/673 50/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 7220979 m, 38708 m/sec, 58036001 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1745 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 170/673 51/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 7408732 m, 37550 m/sec, 59748949 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1750 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 175/673 52/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 7628750 m, 44003 m/sec, 61519700 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1755 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 180/673 54/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 7862457 m, 46741 m/sec, 63249919 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1760 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 185/673 55/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 8058636 m, 39235 m/sec, 64963551 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1765 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 190/673 56/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 8233821 m, 35037 m/sec, 66667836 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1770 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 195/673 58/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 8471710 m, 47577 m/sec, 68434635 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1775 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 200/673 59/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 8687022 m, 43062 m/sec, 70152318 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1780 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 205/673 61/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 8876153 m, 37826 m/sec, 71864586 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1785 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 210/673 62/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 9063006 m, 37370 m/sec, 73588695 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1790 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 215/673 63/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 9306137 m, 48626 m/sec, 75328469 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1795 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 220/673 65/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 9499746 m, 38721 m/sec, 77038123 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1800 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 225/673 66/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 9682096 m, 36470 m/sec, 78744710 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1805 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 230/673 67/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 9901451 m, 43871 m/sec, 80476353 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1810 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 235/673 69/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 10111725 m, 42054 m/sec, 82183141 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1815 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 240/673 70/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 10296778 m, 37010 m/sec, 83886403 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1820 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 245/673 71/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 10486535 m, 37951 m/sec, 85593770 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1825 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 250/673 73/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 10713361 m, 45365 m/sec, 87305926 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1830 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 255/673 74/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 10904110 m, 38149 m/sec, 89003589 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1835 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 260/673 75/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 11072948 m, 33767 m/sec, 90698919 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1840 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 265/673 77/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 11302440 m, 45898 m/sec, 92408764 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1845 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 270/673 78/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 11496707 m, 38853 m/sec, 94103383 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1850 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 275/673 79/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 11670688 m, 34796 m/sec, 95793537 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1855 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 280/673 80/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 11885973 m, 43057 m/sec, 97492761 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1860 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 285/673 82/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 12078027 m, 38410 m/sec, 99176154 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1865 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 290/673 83/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 12253708 m, 35136 m/sec, 100858802 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1870 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 295/673 84/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 12456744 m, 40607 m/sec, 102542128 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1875 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 300/673 85/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 12649403 m, 38531 m/sec, 104217189 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1880 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 305/673 86/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 12820415 m, 34202 m/sec, 105883491 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1885 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 310/673 88/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 13029451 m, 41807 m/sec, 107580490 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1890 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 315/673 89/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 13220185 m, 38146 m/sec, 109268843 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1895 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 320/673 90/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 13390957 m, 34154 m/sec, 110946308 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1900 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 325/673 91/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 13596926 m, 41193 m/sec, 112632166 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1905 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 330/673 93/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 13791954 m, 39005 m/sec, 114312956 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1910 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 335/673 94/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 13984053 m, 38419 m/sec, 115981214 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1915 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 340/673 95/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 14143772 m, 31943 m/sec, 117649459 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1920 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-04: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-05: CONJ false skeleton: preprocessing[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-07: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-08: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-09: LTL false LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-10: CONJ false LTL model checker[0m
[[35mlola[0m][.] [1m[32mQuasiCertifProtocol-COL-32-LTLFireability-11: LTL true LTL model checker[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-15: AG false state equation[0m
[[35mlola[0m][.]
[[35mlola[0m][.] [1m PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS[0m
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-00: LTL 0 0 1 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-02: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-03: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-12: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
[[35mlola[0m][.] QuasiCertifProtocol-COL-32-LTLFireability-14: LTL 0 0 0 0 1 0 1 0
[[35mlola[0m][.]
[[35mlola[0m][.] [1m TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS[0m
[[35mlola[0m][.] 1 LTL EXCL 345/673 96/2000 QuasiCertifProtocol-COL-32-LTLFireability-00 14308449 m, 32935 m/sec, 119321666 t fired, .
[[35mlola[0m][.]
[[35mlola[0m][.] Time elapsed: 1925 secs. Pages in use: 214
[[35mlola[0m][.] # running tasks: 1 of 4. Visible: 16
[[35mlola[0m][I] [1m FINISHED FORMULA: CATEGORY VALUE PRODUCED BY[0m
[[35mlola[0m][.] [1m[31mQuasiCertifProtocol-COL-32-LTLFireability-01: LTL false LTL model checker[0m
========== file over 1MB has been truncated ======
retrieve it from the run archives if needed
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-COL-32"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is QuasiCertifProtocol-COL-32, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r313-tall-171662339600052"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-COL-32.tgz
mv QuasiCertifProtocol-COL-32 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;