Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2024-input.r313-tall-171662339500010.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2024-input.qcow2 backing_fmt=qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................
=====================================================================
Generated by BenchKit 2-5568
Executing tool lola
Input is QuasiCertifProtocol-COL-06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r313-tall-171662339500010
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 528K
-rw-r--r-- 1 mcc users 7.7K Apr 13 03:51 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K Apr 13 03:51 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Apr 13 03:49 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Apr 13 03:49 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 18 16:43 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K May 18 16:43 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Apr 23 07:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Apr 23 07:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 23 07:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 23 07:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Apr 13 03:55 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 116K Apr 13 03:55 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.7K Apr 13 03:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Apr 13 03:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 23 07:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 23 07:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 18 16:43 equiv_pt
-rw-r--r-- 1 mcc users 3 May 18 16:43 instance
-rw-r--r-- 1 mcc users 5 May 18 16:43 iscolored
-rw-r--r-- 1 mcc users 61K May 18 16:43 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-00
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-01
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-02
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-03
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-04
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-05
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-06
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-07
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-08
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-09
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-10
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-11
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-12
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-13
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-14
FORMULA_NAME QuasiCertifProtocol-COL-06-CTLFireability-2024-15

=== Now, execution of the tool begins

BK_START 1717230746242

FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA QuasiCertifProtocol-COL-06-CTLFireability-2024-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
[lola] FINAL RESULTS
[lola]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL true CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ false DISJ
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL false CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL false CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL false CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL false CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL true CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL false CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL false CTL model checker
[lola] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL true CTL model checker
[lola]
[lola] Time elapsed: 149 secs. Pages in use: 10

BK_STOP 1717230895752

--------------------
content from stderr:

[lola][I] LoLA will run for 3600 seconds at most (--timelimit)
[lola][W] unknown unit in memory specification: using default
[lola][I] MEM LIMIT 5
[lola][I] NET
[lola][I] reading net from model.pnml
[lola][I] input: PNML file (--pnmlnet)
[lola][I] reading pnml
[lola][I] PNML file contains High-Level net
[lola][I] closed net file model.pnml
[lola][I] finished parsing
[lola][I] Reading HL formula in XML format (--xmlformula)
[lola][I] reading formula from CTLFireability.xml
[lola][I] NOTDEADLOCKFREE
[lola][I] nonmoderate token usage
[lola][I] nonmoderate token usage
[lola][I] nonmoderate token usage
[lola][I] NOTDEADLOCKFREE
[lola][I] NOTDEADLOCKFREE
[lola][I] LAUNCH task # 82 (type SKEL/FNDP) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 83 (type SKEL/EQUN) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 84 (type SKEL/SRCH) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 84 (type SKEL/SRCH) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : true
[lola][I] markings : 20
[lola][I] fired transitions : 19
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][W] CANCELED task # 82 (type FNDP) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12 (obsolete)
[lola][W] CANCELED task # 83 (type EQUN) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12 (obsolete)
[lola][I] FINISHED task # 82 (type SKEL/FNDP) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][I] Places: 270, Transitions: 116
[lola][W] findlow criterion violated for transition 22
[lola][I] FINISHED task # 83 (type SKEL/EQUN) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : true
[lola][W] findlow criterion violated for transition 21
[lola][I] nonmoderate token usage
[lola][I] nonmoderate token usage
[lola][I] nonmoderate token usage
[lola][I] Rule S: 0 transitions removed,0 places removed
[lola][I] LAUNCH task # 15 (type EXCL) for 14 QuasiCertifProtocol-COL-06-CTLFireability-2024-02
[lola][I] time limit : 133 sec
[lola][I] memory limit: 2000 pages
[lola][I] LAUNCH task # 93 (type EQUN) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 95 (type EQUN) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] LAUNCH task # 86 (type FNDP) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 86 (type FNDP) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : true
[lola][I] tried executions : 1
[lola][I] time used : 0
[lola][I] memory pages used : 0
[lola][W] CANCELED task # 93 (type EQUN) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12 (obsolete)
[lola][W] CANCELED task # 95 (type EQUN) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12 (obsolete)
[lola][I] FINISHED task # 93 (type EQUN) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : unknown
[lola][I] FINISHED task # 15 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-02
[lola][I] result : false
[lola][I] markings : 14596
[lola][I] fired transitions : 72016
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] FINISHED task # 95 (type EQUN) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : true
[lola][I] LAUNCH task # 67 (type EXCL) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 156 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 67 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : false
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 63 (type EXCL) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 171 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 63 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : true
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 42 (type EXCL) for 41 QuasiCertifProtocol-COL-06-CTLFireability-2024-11
[lola][I] time limit : 180 sec
[lola][I] memory limit: 2000 pages
[lola][W] findlow criterion violated for transition 16
[lola][W] findlow criterion violated for 9 clusters
[lola][I] Time for checking findlow: 1
[lola][I] LAUNCH task # 96 (type SKEL/SRCH) for 3 QuasiCertifProtocol-COL-06-CTLFireability-2024-01
[lola][I] time limit : 32000000 sec
[lola][I] memory limit: 5 pages
[lola][I] FINISHED task # 96 (type SKEL/SRCH) for QuasiCertifProtocol-COL-06-CTLFireability-2024-01
[lola][I] result : false
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ 0 2 0 0 3 0 0 1
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ 0 3 0 0 13 0 0 4
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 42 CTL EXCL 5/200 2/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-11 405385 m, 81077 m/sec, 4464340 t fired, .
[lola][.]
[lola][.] Time elapsed: 5 secs. Pages in use: 2
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ 0 2 0 0 3 0 0 1
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ 0 3 0 0 13 0 0 4
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 42 CTL EXCL 10/200 4/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-11 740191 m, 66961 m/sec, 8871533 t fired, .
[lola][.]
[lola][.] Time elapsed: 10 secs. Pages in use: 4
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ 0 2 0 0 3 0 0 1
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ 0 3 0 0 13 0 0 4
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 42 CTL EXCL 15/200 5/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-11 1062018 m, 64365 m/sec, 13319561 t fired, .
[lola][.]
[lola][.] Time elapsed: 15 secs. Pages in use: 5
[lola][.] # running tasks: 1 of 4. Visible: 16
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ 0 2 0 0 3 0 0 1
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL 0 0 1 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ 0 3 0 0 13 0 0 4
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 42 CTL EXCL 20/200 6/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-11 1364536 m, 60503 m/sec, 17736014 t fired, .
[lola][.]
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[lola][I] FINISHED task # 36 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-09
[lola][I] result : false
[lola][I] markings : 18698
[lola][I] fired transitions : 90050
[lola][I] time used : 1
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 33 (type EXCL) for 32 QuasiCertifProtocol-COL-06-CTLFireability-2024-08
[lola][I] time limit : 235 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 33 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-08
[lola][I] result : true
[lola][I] markings : 16514
[lola][I] fired transitions : 102867
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 24 (type EXCL) for 23 QuasiCertifProtocol-COL-06-CTLFireability-2024-05
[lola][I] time limit : 251 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 24 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-05
[lola][I] result : false
[lola][I] markings : 17720
[lola][I] fired transitions : 113471
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 21 (type EXCL) for 20 QuasiCertifProtocol-COL-06-CTLFireability-2024-04
[lola][I] time limit : 271 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ 0 2 0 0 3 0 0 1
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL 0 0 1 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ 0 3 0 0 13 0 0 4
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 21 CTL EXCL 0/271 1/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-04 38544 m, 7708 m/sec, 214373 t fired, .
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[lola][I] FINISHED task # 21 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-04
[lola][I] result : false
[lola][I] markings : 194989
[lola][I] fired transitions : 1216524
[lola][I] time used : 1
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 18 (type EXCL) for 17 QuasiCertifProtocol-COL-06-CTLFireability-2024-03
[lola][I] time limit : 293 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 18 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-03
[lola][I] result : false
[lola][I] markings : 165
[lola][I] fired transitions : 256
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 10 (type EXCL) for 3 QuasiCertifProtocol-COL-06-CTLFireability-2024-01
[lola][I] time limit : 320 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 10 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-01
[lola][I] result : false
[lola][I] markings : 8
[lola][I] fired transitions : 7
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 6 (type EXCL) for 3 QuasiCertifProtocol-COL-06-CTLFireability-2024-01
[lola][I] time limit : 352 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ 0 0 1 0 4 0 0 1
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ 0 3 0 0 13 0 0 4
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 6 CTL EXCL 4/352 3/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-01 545049 m, 109009 m/sec, 3678219 t fired, .
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ 0 0 1 0 4 0 0 1
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ 0 3 0 0 13 0 0 4
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 6 CTL EXCL 9/352 5/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-01 1111073 m, 113204 m/sec, 8379357 t fired, .
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ 0 0 1 0 4 0 0 1
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ 0 3 0 0 13 0 0 4
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 6 CTL EXCL 14/352 8/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-01 1640088 m, 105803 m/sec, 12908965 t fired, .
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ 0 0 1 0 4 0 0 1
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ 0 3 0 0 13 0 0 4
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 6 CTL EXCL 19/352 9/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-01 2066910 m, 85364 m/sec, 17218258 t fired, .
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[lola][I] FINISHED task # 6 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-01
[lola][I] result : false
[lola][I] markings : 2196376
[lola][I] fired transitions : 18335836
[lola][I] time used : 20
[lola][I] memory pages used : 10
[lola][I] LAUNCH task # 1 (type EXCL) for 0 QuasiCertifProtocol-COL-06-CTLFireability-2024-00
[lola][I] time limit : 389 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 1 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-00
[lola][I] result : true
[lola][I] markings : 18710
[lola][I] fired transitions : 108762
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 75 (type EXCL) for 74 QuasiCertifProtocol-COL-06-CTLFireability-2024-14
[lola][I] time limit : 438 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 75 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-14
[lola][I] result : false
[lola][I] markings : 138
[lola][I] fired transitions : 241
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 69 (type EXCL) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 500 sec
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[lola][I] FINISHED task # 69 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : false
[lola][I] markings : 2
[lola][I] fired transitions : 3
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 53 (type EXCL) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 584 sec
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[lola][I] FINISHED task # 53 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : true
[lola][I] markings : 1
[lola][I] fired transitions : 1
[lola][I] time used : 0
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[lola][I] LAUNCH task # 49 (type EXCL) for 44 QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] time limit : 700 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 49 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-12
[lola][I] result : true
[lola][I] markings : 12
[lola][I] fired transitions : 25
[lola][I] time used : 0
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 30 (type EXCL) for 29 QuasiCertifProtocol-COL-06-CTLFireability-2024-07
[lola][I] time limit : 876 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ false DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL false CTL model checker
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[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 30 CTL EXCL 4/876 2/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-07 446022 m, 89204 m/sec, 3538054 t fired, .
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 30 CTL EXCL 9/876 4/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-07 815537 m, 73903 m/sec, 8082155 t fired, .
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 30 CTL EXCL 14/876 6/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-07 1279762 m, 92845 m/sec, 12632814 t fired, .
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ false DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL 0 0 1 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 30 CTL EXCL 19/876 8/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-07 1651828 m, 74413 m/sec, 16940594 t fired, .
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ false DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-06: CTL 0 1 0 0 1 0 0 0
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL 0 1 0 0 1 0 0 0
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 30 CTL EXCL 24/876 9/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-07 1955623 m, 60759 m/sec, 21008342 t fired, .
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[lola][I] result : true
[lola][I] markings : 2271960
[lola][I] fired transitions : 25172150
[lola][I] time used : 29
[lola][I] memory pages used : 10
[lola][I] LAUNCH task # 72 (type EXCL) for 71 QuasiCertifProtocol-COL-06-CTLFireability-2024-13
[lola][I] time limit : 1158 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ false DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-15: CTL 0 1 0 0 1 0 0 0
[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 72 CTL EXCL 0/1158 1/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-13 68379 m, 13675 m/sec, 426410 t fired, .
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[lola][I] markings : 195000
[lola][I] fired transitions : 1118109
[lola][I] time used : 1
[lola][I] memory pages used : 1
[lola][I] LAUNCH task # 78 (type EXCL) for 77 QuasiCertifProtocol-COL-06-CTLFireability-2024-15
[lola][I] time limit : 1737 sec
[lola][I] memory limit: 2000 pages
[lola][I]  FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-00: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-01: DISJ false DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-03: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-04: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-05: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 78 CTL EXCL 4/1737 3/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-15 557928 m, 111585 m/sec, 4323013 t fired, .
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-09: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL false CTL model checker
[lola][.]
[lola][.]  PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 78 CTL EXCL 9/1737 5/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-15 1091311 m, 106676 m/sec, 9121704 t fired, .
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-02: CTL false CTL model checker
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-07: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-08: CTL true CTL model checker
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-11: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL false CTL model checker
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-14: CTL false CTL model checker
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[lola][.]
[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 78 CTL EXCL 14/1737 7/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-15 1601446 m, 102027 m/sec, 13800644 t fired, .
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-10: CTL true CTL model checker
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[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-12: DISJ true DISJ
[lola][.] QuasiCertifProtocol-COL-06-CTLFireability-2024-13: CTL false CTL model checker
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[lola][.]  TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
[lola][.] 78 CTL EXCL 19/1737 9/2000 QuasiCertifProtocol-COL-06-CTLFireability-2024-15 2030394 m, 85789 m/sec, 18179527 t fired, .
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[lola][I] result : true
[lola][I] markings : 2196377
[lola][I] fired transitions : 19993039
[lola][I] time used : 21
[lola][I] memory pages used : 10
[lola][I] LAUNCH task # 27 (type EXCL) for 26 QuasiCertifProtocol-COL-06-CTLFireability-2024-06
[lola][I] time limit : 3453 sec
[lola][I] memory limit: 2000 pages
[lola][I] FINISHED task # 27 (type EXCL) for QuasiCertifProtocol-COL-06-CTLFireability-2024-06
[lola][I] result : false
[lola][I] markings : 321216
[lola][I] fired transitions : 2210181
[lola][I] time used : 2
[lola][I] memory pages used : 2
[lola][I] Portfolio finished: no open formulas

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-COL-06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5568"
echo " Executing tool lola"
echo " Input is QuasiCertifProtocol-COL-06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r313-tall-171662339500010"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-COL-06.tgz
mv QuasiCertifProtocol-COL-06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;